include/grlib/grpci2.h

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /*  GRLIB GRPCI2 PCI HOST driver.
0004  *
0005  *  COPYRIGHT (c) 2011
0006  *  Cobham Gaisler AB.
0007  *
0008  * Redistribution and use in source and binary forms, with or without
0009  * modification, are permitted provided that the following conditions
0010  * are met:
0011  * 1. Redistributions of source code must retain the above copyright
0012  *    notice, this list of conditions and the following disclaimer.
0013  * 2. Redistributions in binary form must reproduce the above copyright
0014  *    notice, this list of conditions and the following disclaimer in the
0015  *    documentation and/or other materials provided with the distribution.
0016  *
0017  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0018  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0020  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0021  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0022  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0023  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0024  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0025  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0026  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0027  * POSSIBILITY OF SUCH DAMAGE.
0028  */
0029
0030 #ifndef __GRPCI2_H__
0031 #define __GRPCI2_H__
0032
0033 #ifdef __cplusplus
0034 extern "C" {
0035 #endif
0036
0037 extern void grpci2_register_drv(void);
0038
0039 /* Driver Resources:
0040  *
0041  * PCI Interrupts
0042  * ==============
0043  * The interrupt settings are normally autodetected from Plyg&Play, however
0044  * if IRQs are routed using custom GPIO pins in order to reduce the PIN count
0045  * reserved for PCI, the options below can be used to tell GRPCI2 driver which
0046  * System IRQ a PCI interrupt is connected to.
0047  * Name="INTA#", Type=INT, System Interrupt number that PCI INTA is connected to
0048  * Name="INTB#", Type=INT, System Interrupt number that PCI INTB is connected to
0049  * Name="INTC#", Type=INT, System Interrupt number that PCI INTC is connected to
0050  * Name="INTD#", Type=INT, System Interrupt number that PCI INTD is connected to
0051  *
0052  * Name="IRQmask", Type=INT,
0053  *
0054  * PCI Bytetwisting (endianess)
0055  * ============================
0056  * Name="byteTwisting", Type=INT, Enable/Disable Bytetwisting by hardware
0057  *
0058  * PCI Latency timer
0059  * ============================
0060  * Name="latencyTimer", Type=INT, Set the latency timer
0061  *
0062  * PCI Host's Target BARs setup
0063  * ============================
0064  * The Host's BARs are not configured by the configuration routines, by default
0065  * the BARs are configured disabled (BAR=0) except for BAR0 which is mapped to
0066  * the Main Memory for the Host.
0067  * Name="tgtBarCfg", Type=PTR (*grpci2_pcibar_cfg), Target PCI BARs of Host
0068  */
0069
0070 /* When the Host acts as a target on the PCI bus, the PCI BARs of the host's
0071  * configuration space determine at which PCI address the Host will be accessed
0072  * at and when accessing a BAR which AMBA address it will be translated to.
0073  */
0074 struct grpci2_pcibar_cfg {
0075     unsigned int pciadr;    /* PCI address of BAR (BAR content) */
0076     unsigned int ahbadr;    /* 'pciadr' translated to this AHB Address */
0077     unsigned int barsize;   /* PCI BAR Size, must be a power of 2 */
0078 };
0079
0080 #ifdef __cplusplus
0081 }
0082 #endif
0083
0084 #endif