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File indexing completed on 2025-05-11 08:23:43

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002 
0003 /*
0004  *  GRIOMMU Driver Interface
0005  *
0006  *  COPYRIGHT (c) 2017
0007  *  Cobham Gaisler AB
0008  *
0009  * Redistribution and use in source and binary forms, with or without
0010  * modification, are permitted provided that the following conditions
0011  * are met:
0012  * 1. Redistributions of source code must retain the above copyright
0013  *    notice, this list of conditions and the following disclaimer.
0014  * 2. Redistributions in binary form must reproduce the above copyright
0015  *    notice, this list of conditions and the following disclaimer in the
0016  *    documentation and/or other materials provided with the distribution.
0017  *
0018  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0019  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0020  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0021  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0022  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0023  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0024  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0025  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0026  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0027  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0028  * POSSIBILITY OF SUCH DAMAGE.
0029  *
0030  *  OVERVIEW
0031  *  ========
0032  *  This driver controls the GRIOMMU device located 
0033  *  at an on-chip AMBA.
0034  */
0035 
0036 #ifndef __GRIOMMU_H__
0037 #define __GRIOMMU_H__
0038 
0039 #include <stdint.h>
0040 #include <stdio.h>
0041 
0042 #ifdef __cplusplus
0043 extern "C" {
0044 #endif
0045 
0046 extern void griommu_register_drv(void);
0047 
0048 #define GRIOMMU_ERR_OK 0
0049 #define GRIOMMU_ERR_NOINIT -1
0050 #define GRIOMMU_ERR_EINVAL -2
0051 #define GRIOMMU_ERR_IMPLEMENTED -3
0052 #define GRIOMMU_ERR_NOTFOUND -4
0053 
0054 /* Size of APV (has to be divided by page size in bytes) */
0055 #define GRIOMMU_APV_SIZE 0x20000000
0056 
0057 /* Alignment of APV */
0058 #define GRIOMMU_APV_ALIGN 0x10
0059 
0060 /* IOMMU APV allocation helper functions */
0061 extern void * griommu_apv_new(void);
0062 extern void griommu_apv_delete(void * apv);
0063 
0064 /* IOMMU Master Setup */
0065 
0066 /* IOMMU Master find */
0067 /*
0068  * GRIOMMU MASTER register fields 
0069  */
0070 #define MASTER_VENDOR (0xff << MASTER_VENDOR_BIT)
0071 #define MASTER_DEVICE (0xfff << MASTER_DEVICE_BIT)
0072 #define MASTER_BS (0x1 << MASTER_BS_BIT)
0073 #define MASTER_GROUP (0xf << MASTER_GROUP_BIT)
0074 
0075 #define MASTER_VENDOR_BIT 24
0076 #define MASTER_DEVICE_BIT 12
0077 #define MASTER_BS_BIT 4
0078 #define MASTER_GROUP_BIT 0
0079 
0080 #define GRIOMMU_OPTIONS_BUS0 0
0081 #define GRIOMMU_OPTIONS_BUS1 1
0082 extern int griommu_master_setup(int master, int group, int options);
0083 extern int griommu_master_find(int vendor, int device, int instance);
0084 extern int griommu_master_info(int master, uint32_t * info);
0085 #define griommu_get_master_vendor(info) \
0086     ((info & MASTER_VENDOR) >> MASTER_VENDOR_BIT)
0087 #define griommu_get_master_device(info) \
0088     ((info & MASTER_DEVICE) >> MASTER_DEVICE_BIT)
0089 #define griommu_get_master_routing(info) \
0090     ((info & MASTER_BS) >> MASTER_BS_BIT)
0091 #define griommu_get_master_group(info) \
0092     ((info & MASTER_GROUP) >> MASTER_GROUP_BIT)
0093 
0094 /* IOMMU Group Setup */
0095 #define GRIOMMU_OPTIONS_GROUP_PASSTHROUGH 2
0096 #define GRIOMMU_OPTIONS_GROUP_ENABLE 1
0097 #define GRIOMMU_OPTIONS_GROUP_DISABLE 0
0098 extern int griommu_group_setup(int group, void * apv, int options);
0099 extern int griommu_group_info(int group, uint32_t * info);
0100 #define GRIOMMU_OPTIONS_APV_ALLOW 0x1
0101 #define GRIOMMU_OPTIONS_APV_DONTALLOW 0x0
0102 extern int griommu_group_apv_init(int group, int options);
0103 extern int griommu_group_apv_address_set(int group, uint32_t addr, int size, 
0104         int options);
0105 extern int griommu_group_apv_page_set(int group, int index, int size, 
0106         int options);
0107 extern int griommu_group_apv_flush(int group);
0108 
0109 /* IOMMU Setup */
0110 /*
0111  * GRIOMMU CTRL register fields 
0112  */
0113 #define CTRL_PGSZ (0x7 << CTRL_PGSZ_BIT)
0114 #define CTRL_LB (0x1 << CTRL_LB_BIT)
0115 #define CTRL_SP (0x1 << CTRL_SP_BIT)
0116 #define CTRL_ITR (0xf << CTRL_ITR_BIT)
0117 #define CTRL_DP (0x1 << CTRL_DP_BIT)
0118 #define CTRL_SIV (0x1 << CTRL_SIV_BIT)
0119 #define CTRL_HPROT (0x3 << CTRL_HPROT_BIT)
0120 #define CTRL_AU (0x1 << CTRL_AU_BIT)
0121 #define CTRL_WP (0x1 << CTRL_WP_BIT)
0122 #define CTRL_DM (0x1 << CTRL_DM_BIT)
0123 #define CTRL_GS (0x1 << CTRL_GS_BIT)
0124 #define CTRL_CE (0x1 << CTRL_CE_BIT)
0125 #define CTRL_PM (0x3 << CTRL_PM_BIT)
0126 #define CTRL_PM_APV (0x0 << CTRL_PM_BIT)
0127 #define CTRL_PM_IOMMU (0x1 << CTRL_PM_BIT)
0128 #define CTRL_EN (0x1 << CTRL_EN_BIT)
0129 
0130 #define CTRL_PGSZ_BIT 18
0131 #define CTRL_LB_BIT 17
0132 #define CTRL_SP_BIT 16
0133 #define CTRL_ITR_BIT 12
0134 #define CTRL_DP_BIT 11
0135 #define CTRL_SIV_BIT 10
0136 #define CTRL_HPROT_BIT 8
0137 #define CTRL_AU_BIT 7
0138 #define CTRL_WP_BIT 6
0139 #define CTRL_DM_BIT 5
0140 #define CTRL_GS_BIT 4
0141 #define CTRL_CE_BIT 3
0142 #define CTRL_PM_BIT 1
0143 #define CTRL_EN_BIT 0
0144 
0145 #define GRIOMMU_OPTIONS_LOOKUPBUS_BUS0 0
0146 #define GRIOMMU_OPTIONS_LOOKUPBUS_BUS1 CTRL_LB
0147 #define GRIOMMU_OPTIONS_CACHE_DISABLE 0
0148 #define GRIOMMU_OPTIONS_CACHE_ENABLE CTRL_CE
0149 #define GRIOMMU_OPTIONS_GROUPADDRESSING_DISABLE 0
0150 #define GRIOMMU_OPTIONS_GROUPADDRESSING_ENABLE CTRL_GS
0151 #define GRIOMMU_OPTIONS_WPROTONLY_DISABLE 0
0152 #define GRIOMMU_OPTIONS_WPROTONLY_ENABLE CTRL_WP
0153 #define GRIOMMU_OPTIONS_AHBUPDATE_DISABLE 0
0154 #define GRIOMMU_OPTIONS_AHBUPDATE_ENABLE CTRL_AU
0155 #define GRIOMMU_OPTIONS_PREFETCH_DISABLE CTRL_DP
0156 #define GRIOMMU_OPTIONS_PREFETCH_ENABLE 0
0157 #define GRIOMMU_OPTIONS_PAGESIZE_4KIB 0
0158 #define GRIOMMU_OPTIONS_PAGESIZE_8KIB (0x1 << CTRL_PGSZ_BIT)
0159 #define GRIOMMU_OPTIONS_PAGESIZE_16KIB (0x2 << CTRL_PGSZ_BIT)
0160 #define GRIOMMU_OPTIONS_PAGESIZE_32KIB (0x3 << CTRL_PGSZ_BIT)
0161 #define GRIOMMU_OPTIONS_PAGESIZE_64KIB (0x4 << CTRL_PGSZ_BIT)
0162 #define GRIOMMU_OPTIONS_PAGESIZE_128KIB (0x5 << CTRL_PGSZ_BIT)
0163 #define GRIOMMU_OPTIONS_PAGESIZE_256KIB (0x6 << CTRL_PGSZ_BIT)
0164 #define GRIOMMU_OPTIONS_PAGESIZE_512KIB (0x7 << CTRL_PGSZ_BIT)
0165 extern int griommu_setup(int options);
0166 extern int griommu_status(void);
0167 
0168 #define GRIOMMU_MODE_IOMMU 1
0169 #define GRIOMMU_MODE_GROUPAPV 0
0170 extern int griommu_enable(int mode);
0171 extern int griommu_disable(void);
0172 
0173 /* IOMMU APV setup */
0174 extern int griommu_apv_flush(void);
0175 extern int griommu_apv_init(void * apv, int options);
0176 extern int griommu_apv_address_set(void * apv, uint32_t addr, int size, 
0177         int options);
0178 extern int griommu_apv_page_set(void * apv, int index, int size, int options);
0179 
0180 /* GRIOMMU Interrupts */
0181 /* Function Interrupt-Code ISR callback prototype.
0182  * arg     - Custom arg provided by user
0183  * access  - AHB Access that failed
0184  * status  - Error status register of the GRIOMMU core
0185  */
0186 typedef void (*griommu_isr_t)(void *arg, uint32_t access, uint32_t status);
0187 #define GRIOMMU_INTERRUPT_ALL (0x2f << 0)
0188 #define GRIOMMU_INTERRUPT_PARITY_ERROR (0x1 << 5)
0189 #define GRIOMMU_INTERRUPT_FLUSH_COMPLETED (0x1 << 3)
0190 #define GRIOMMU_INTERRUPT_FLUSH_START (0x1 << 2)
0191 #define GRIOMMU_INTERRUPT_ACCESS_DENIED (0x1 << 1)
0192 #define GRIOMMU_INTERRUPT_TRANSLATION_ERROR (0x1 << 0)
0193 extern int griommu_isr_register(griommu_isr_t isr, void * arg, int options);
0194 extern int griommu_isr_unregister(void);
0195 extern int griommu_interrupt_unmask(int options);
0196 extern int griommu_interrupt_mask(int options);
0197 
0198 extern int griommu_error_status(uint32_t * access);
0199 
0200 extern int griommu_print(void);
0201 
0202 #ifdef __cplusplus
0203 }
0204 #endif
0205 
0206 #endif /* __GRIOMMU_H__ */