include/grlib/grctm.h

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /*  GRCTM - CCSDS Time Manager - register driver interface.
0004  *
0005  *  COPYRIGHT (c) 2009.
0006  *  Cobham Gaisler AB
0007  *
0008  * Redistribution and use in source and binary forms, with or without
0009  * modification, are permitted provided that the following conditions
0010  * are met:
0011  * 1. Redistributions of source code must retain the above copyright
0012  *    notice, this list of conditions and the following disclaimer.
0013  * 2. Redistributions in binary form must reproduce the above copyright
0014  *    notice, this list of conditions and the following disclaimer in the
0015  *    documentation and/or other materials provided with the distribution.
0016  *
0017  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0018  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0020  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0021  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0022  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0023  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0024  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0025  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0026  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0027  * POSSIBILITY OF SUCH DAMAGE.
0028  */
0029
0030 #ifndef __GRCTM_H__
0031 #define __GRCTM_H__
0032
0033 #define DAT0_IRQ    0x1
0034 #define DAT1_IRQ    0x2
0035 #define DAT2_IRQ    0x4
0036 #define PULSE0_IRQ  0x10
0037 #define PULSE1_IRQ  0x20
0038 #define PULSE2_IRQ  0x40
0039 #define PULSE3_IRQ  0x80
0040 #define PULSE4_IRQ  0x100
0041 #define PULSE5_IRQ  0x200
0042 #define PULSE6_IRQ  0x400
0043 #define PULSE7_IRQ  0x800
0044
0045 struct grctm_regs {
0046     volatile unsigned int grr;
0047     volatile unsigned int gcr;
0048     volatile unsigned int gsr;
0049     volatile unsigned int unused[2];
0050     volatile unsigned int pfr;
0051     volatile unsigned int etcr;
0052     volatile unsigned int etfr;
0053     volatile unsigned int dcr0;
0054     volatile unsigned int dfr0;
0055     volatile unsigned int dcr1;
0056     volatile unsigned int dfr1;
0057     volatile unsigned int dcr2;
0058     volatile unsigned int dfr2;
0059     volatile unsigned int stcr;
0060     volatile unsigned int stfr;
0061     volatile unsigned int pdr[8];
0062     volatile unsigned int pimsr;
0063     volatile unsigned int pimr;
0064     volatile unsigned int pisr;
0065     volatile unsigned int pir;
0066     volatile unsigned int imr;
0067     volatile unsigned int picr;
0068     volatile unsigned int unused1[2];
0069     volatile unsigned int etir;
0070     volatile unsigned int fsir;
0071     volatile unsigned int serconf;
0072     volatile unsigned int unused2;
0073     volatile unsigned int twsc;
0074     volatile unsigned int twadj;
0075     volatile unsigned int twtx;
0076     volatile unsigned int twrx;
0077 };
0078
0079 struct grctm_stats {
0080
0081     /* IRQ Stats */
0082     unsigned int nirqs;
0083     unsigned int pulse;
0084 };
0085
0086 /* Function ISR callback prototype */
0087 typedef void (*grctm_isr_t)(unsigned int pimr, void *data);
0088
0089 /* Open a GRCTM device by minor number. */
0090 extern void *grctm_open(int minor);
0091
0092 /* Close a previously opened GRCTM device */
0093 extern void grctm_close(void *spwcuc);
0094
0095 /* Hardware Reset of GRCTM */
0096 extern int grctm_reset(void *grctm);
0097
0098 /* Enable Interrupts at Interrupt controller */
0099 extern void grctm_int_enable(void *grctm);
0100
0101 /* Disable Interrupts at Interrupt controller */
0102 extern void grctm_int_disable(void *grctm);
0103
0104 /* Clear Statistics gathered by the driver */
0105 extern void grctm_clr_stats(void *grctm);
0106
0107 /* Get Statistics gathered by the driver */
0108 extern void grctm_get_stats(void *grctm, struct grctm_stats *stats);
0109
0110 /* Register an Interrupt handler and custom data, the function call is
0111  * removed by setting func to NULL.
0112  */
0113 extern void grctm_int_register(void *grctm, grctm_isr_t func, void *data);
0114
0115 /* Enable external synchronisation (from spwcuc) */
0116 extern void grctm_enable_ext_sync(void *grctm);
0117
0118 /* Disable external synchronisation (from spwcuc) */
0119 extern void grctm_disable_ext_sync(void *grctm);
0120
0121 /* Enable TimeWire synchronisation */
0122 extern void grctm_enable_tw_sync(void *grctm);
0123
0124 /* Disable TimeWire synchronisation */
0125 extern void grctm_disable_tw_sync(void *grctm);
0126
0127 /* Disable frequency synthesizer from driving ET */
0128 extern void grctm_disable_fs(void *grctm);
0129
0130 /* Enable frequency synthesizer to drive ET */
0131 extern void grctm_enable_fs(void *grctm);
0132
0133 /* Return elapsed coarse time */
0134 extern unsigned int grctm_get_et_coarse(void *grctm);
0135
0136 /* Return elapsed fine time */
0137 extern unsigned int grctm_get_et_fine(void *grctm);
0138
0139 /* Return elapsed time (coarse and fine) */
0140 extern unsigned long long grctm_get_et(void *grctm);
0141
0142 /* Return 1 if specified datation has been latched */
0143 extern int grctm_is_dat_latched(void *grctm, int dat);
0144
0145 /* Set triggering edge of datation input */
0146 extern void grctm_set_dat_edge(void *grctm, int dat, int edge);
0147
0148 /* Return latched datation coarse time */
0149 extern unsigned int grctm_get_dat_coarse(void *grctm, int dat);
0150
0151 /* Return latched datation fine time */
0152 extern unsigned int grctm_get_dat_fine(void *grctm, int dat);
0153
0154 /* Return latched datation ET */
0155 extern unsigned long long grctm_get_dat_et(void *grctm, int dat);
0156
0157 /* Return current pulse configuration */
0158 extern unsigned int grctm_get_pulse_reg(void *grctm, int pulse);
0159
0160 /* Set pulse register */
0161 extern void grctm_set_pulse_reg(void *grctm, int pulse, unsigned int val);
0162
0163 /* Configure pulse: pp = period, pw = width, pl = level, en = enable */
0164 extern void grctm_cfg_pulse(void *grctm, int pulse, int pp, int pw, int pl, int en);
0165
0166 /* Enable pulse output */
0167 extern void grctm_enable_pulse(void *grctm, int pulse);
0168
0169 /* Disable pulse output */
0170 extern void grctm_disable_pulse(void *grctm, int pulse);
0171
0172 /* Clear interrupts */
0173 extern void grctm_clear_irqs(void *grctm, int irqs);
0174
0175 /* Enable interrupts */
0176 extern void grctm_enable_irqs(void *grctm, int irqs);
0177
0178 /* Set Frequency synthesizer increment */
0179 void grctm_set_fs_incr(void *grctm, int incr);
0180
0181 /* Set ET increment */
0182 void grctm_set_et_incr(void *grctm, int incr);
0183
0184 /* Get register base address */
0185 struct grctm_regs *grctm_get_regs(void *grctm);
0186
0187 /* Register the GRCTM driver to Driver Manager */
0188 extern void grctm_register(void);
0189
0190 #endif