include/grlib/gradcdac.h

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /*  ADC / DAC (GRADCDAC) interface
0004  *
0005  *  COPYRIGHT (c) 2009.
0006  *  Cobham Gaisler AB.
0007  *
0008  * Redistribution and use in source and binary forms, with or without
0009  * modification, are permitted provided that the following conditions
0010  * are met:
0011  * 1. Redistributions of source code must retain the above copyright
0012  *    notice, this list of conditions and the following disclaimer.
0013  * 2. Redistributions in binary form must reproduce the above copyright
0014  *    notice, this list of conditions and the following disclaimer in the
0015  *    documentation and/or other materials provided with the distribution.
0016  *
0017  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0018  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0020  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0021  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0022  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0023  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0024  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0025  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0026  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0027  * POSSIBILITY OF SUCH DAMAGE.
0028  */
0029
0030 #ifndef __GRADCDAC_H__
0031 #define __GRADCDAC_H__
0032
0033 #ifdef __cplusplus
0034 extern "C" {
0035 #endif
0036
0037 struct gradcdac_regs {
0038     volatile unsigned int config;      /* 0x00 Configuration Register */
0039     volatile unsigned int status;      /* 0x04 Status Register */
0040     int unused0[2];
0041     volatile unsigned int adc_din;     /* 0x10 ADC Data Input Register */
0042     volatile unsigned int dac_dout;    /* 0x14 DAC Data Output Register */
0043     int unused1[2];
0044     volatile unsigned int adrin;       /* 0x20 Address Input Register */
0045     volatile unsigned int adrout;      /* 0x24 Address Output Register */
0046     volatile unsigned int adrdir;      /* 0x28 Address Direction Register */
0047     int unused2[1];
0048     volatile unsigned int data_in;     /* 0x30 Data Input Register  */
0049     volatile unsigned int data_out;    /* 0x34 Data Output Register */
0050     volatile unsigned int data_dir;    /* 0x38 Data Direction Register */
0051 };
0052
0053 #define GRADCDAC_CFG_DACWS    0x00f80000
0054 #define GRADCDAC_CFG_WRPOL    0x00040000
0055 #define GRADCDAC_CFG_DACDW    0x00030000
0056 #define GRADCDAC_CFG_ADCWS    0x0000f800
0057 #define GRADCDAC_CFG_RCPOL    0x00000400
0058 #define GRADCDAC_CFG_CSMODE   0x00000300
0059 #define GRADCDAC_CFG_CSPOL    0x00000080
0060 #define GRADCDAC_CFG_RDYMODE  0x00000040
0061 #define GRADCDAC_CFG_RDYPOL   0x00000020
0062 #define GRADCDAC_CFG_TRIGPOL  0x00000010
0063 #define GRADCDAC_CFG_TRIGMODE 0x0000000c
0064 #define GRADCDAC_CFG_ADCDW    0x00000003
0065
0066 #define GRADCDAC_CFG_DACWS_BIT    19
0067 #define GRADCDAC_CFG_WRPOL_BIT    18
0068 #define GRADCDAC_CFG_DACDW_BIT    16
0069 #define GRADCDAC_CFG_ADCWS_BIT    11
0070 #define GRADCDAC_CFG_RCPOL_BIT    10
0071 #define GRADCDAC_CFG_CSMODE_BIT    8
0072 #define GRADCDAC_CFG_CSPOL_BIT     7
0073 #define GRADCDAC_CFG_RDYMODE_BIT   6
0074 #define GRADCDAC_CFG_RDYPOL_BIT    5
0075 #define GRADCDAC_CFG_TRIGPOL_BIT   4
0076 #define GRADCDAC_CFG_TRIGMODE_BIT  2
0077 #define GRADCDAC_CFG_ADCDW_BIT     0
0078
0079 #define GRADCDAC_STATUS_DACNO   0x40
0080 #define GRADCDAC_STATUS_DACRDY  0x20
0081 #define GRADCDAC_STATUS_DACON   0x10
0082 #define GRADCDAC_STATUS_ADCTO   0x08
0083 #define GRADCDAC_STATUS_ADCNO   0x04
0084 #define GRADCDAC_STATUS_ADCRDY  0x02
0085 #define GRADCDAC_STATUS_ADCON   0x01
0086
0087 #define GRADCDAC_STATUS_DACNO_BIT  6
0088 #define GRADCDAC_STATUS_DACRDY_BIT 5
0089 #define GRADCDAC_STATUS_DACON_BIT  4
0090 #define GRADCDAC_STATUS_ADCTO_BIT  3
0091 #define GRADCDAC_STATUS_ADCNO_BIT  2
0092 #define GRADCDAC_STATUS_ADCRDY_BIT 1
0093 #define GRADCDAC_STATUS_ADCON_BIT  0
0094
0095 #define GRADCDAC_IRQ_DAC 1
0096 #define GRADCDAC_IRQ_ADC 0
0097
0098 struct gradcdac_config {
0099     unsigned char dac_ws;
0100     char wr_pol;
0101     unsigned char dac_dw;
0102     unsigned char adc_ws;
0103     char rc_pol;
0104     unsigned char cs_mode;
0105     char cs_pol;
0106     char ready_mode;
0107     char ready_pol;
0108     char trigg_pol;
0109     unsigned char trigg_mode;
0110     unsigned char adc_dw;
0111 };
0112
0113 extern void *gradcdac_open(char *devname);
0114
0115 extern void gradcdac_set_config(void *cookie, struct gradcdac_config *cfg);
0116
0117 extern void gradcdac_get_config(void *cookie, struct gradcdac_config *cfg);
0118
0119 extern void gradcdac_set_cfg(void *cookie, unsigned int config);
0120
0121 extern unsigned int gradcdac_get_cfg(void *cookie);
0122
0123 extern unsigned int gradcdac_get_status(void *cookie);
0124
0125 static int __inline__ gradcdac_DAC_ReqRej(unsigned int status)
0126 {
0127     return (status & GRADCDAC_STATUS_DACNO);
0128 }
0129
0130 static int __inline__ gradcdac_DAC_isCompleted(unsigned int status)
0131 {
0132     return (status & GRADCDAC_STATUS_DACRDY);
0133 }
0134
0135 static int __inline__ gradcdac_DAC_isOngoing(unsigned int status)
0136 {
0137     return (status & GRADCDAC_STATUS_DACON);
0138 }
0139
0140 static int __inline__ gradcdac_ADC_isTimeouted(unsigned int status)
0141 {
0142     return (status & GRADCDAC_STATUS_ADCTO);
0143 }
0144
0145 static int __inline__ gradcdac_ADC_ReqRej(unsigned int status)
0146 {
0147     return (status & GRADCDAC_STATUS_ADCNO);
0148 }
0149
0150 static int __inline__ gradcdac_ADC_isCompleted(unsigned int status)
0151 {
0152     return (status & GRADCDAC_STATUS_ADCRDY);
0153 }
0154
0155 static int __inline__ gradcdac_ADC_isOngoing(unsigned int status)
0156 {
0157     return (status & GRADCDAC_STATUS_ADCON);
0158 }
0159
0160 #define GRADCDAC_ISR_BOTH 3
0161 #define GRADCDAC_ISR_DAC 2
0162 #define GRADCDAC_ISR_ADC 1
0163
0164 /* Install IRQ handler for ADC and/or DAC interrupt.
0165  * The installed IRQ handler(ISR) must read the status
0166  * register to clear the pending interrupt avoiding multiple
0167  * entries to the ISR caused by the same IRQ.
0168  *
0169  * \param adc  1=ADC interrupt, 2=ADC interrupt, 3=ADC and DAC interrupt
0170  * \param isr  Interrupt service routine called when IRQ is fired
0171  * \param arg  custom argument passed to ISR when called.
0172  */
0173 extern int gradcdac_install_irq_handler
0174     (void *cookie, int adc, void (*isr)(void *cookie, void *arg), void *arg);
0175
0176 extern void gradcdac_uninstall_irq_handler(void *cookie, int adc);
0177
0178 /* Make the ADC circuitry initialize a analogue to digital
0179  * conversion. The result can be read out by gradcdac_adc_convert_try
0180  * or gradcdac_adc_convert.
0181  */
0182 extern void gradcdac_adc_convert_start(void *cookie);
0183
0184 /* Tries to read the conversion result. If the circuitry is busy
0185  * converting the function return a non-zero value, if the conversion
0186  * has successfully finished the function return zero.
0187  *
0188  * \param digital_value the resulting converted value is placed here
0189  * \return zero     = ADC conversion complete, digital_value contain current conversion result
0190  *         positive = ADC busy, digital_value contain previous conversion result
0191  *         negative = Conversion request failed.
0192  */
0193 extern int gradcdac_adc_convert_try(void *cookie, unsigned short *digital_value);
0194
0195 /* Waits until the ADC circuity has finished a digital to analogue
0196  * conversion. The Waiting is implemented as a busy loop utilizing
0197  * 100% CPU load.
0198  *
0199  * \return zero     = Conversion ok
0200  *         negative = Conversion request failed.
0201  */
0202 extern int gradcdac_adc_convert(void *cookie, unsigned short *digital_value);
0203
0204 /* Try to make the DAC circuitry initialize a digital to analogue
0205  * conversion. If the circuitry is busy by a previous conversion
0206  * the function return a non-zero value, if the conversion is
0207  * successfully initialized the function return zero.
0208  */
0209 extern int gradcdac_dac_convert_try(void *cookie, unsigned short digital_value);
0210
0211 /* Initializes a digital to analogue conversion by waiting until
0212  * previous conversions is finished before procceding with the
0213  * conversion. The Waiting is implemented as a busy loop utilizing
0214  * 100% CPU load.
0215  */
0216 extern void gradcdac_dac_convert(void *cookie, unsigned short digital_value);
0217
0218 extern unsigned int gradcdac_get_adrinput(void *cookie);
0219 extern void gradcdac_set_adrinput(void *cookie, unsigned int input);
0220
0221 extern unsigned int gradcdac_get_adroutput(void *cookie);
0222 extern void gradcdac_set_adroutput(void *cookie, unsigned int output);
0223
0224 extern unsigned int gradcdac_get_adrdir(void *cookie);
0225 extern void gradcdac_set_adrdir(void *cookie, unsigned int dir);
0226
0227 extern unsigned int gradcdac_get_datainput(void *cookie);
0228 extern void gradcdac_set_datainput(void *cookie, unsigned int input);
0229
0230 extern unsigned int gradcdac_get_dataoutput(void *cookie);
0231 extern void gradcdac_set_dataoutput(void *cookie, unsigned int output);
0232
0233 extern unsigned int gradcdac_get_datadir(void *cookie);
0234 extern void gradcdac_set_datadir(void *cookie, unsigned int dir);
0235
0236 /* Show one or all GRADCDAC cores. If cookie is NULL all GRADCDAC's are shown */
0237 extern void grAdcDacShow(void *cookie);
0238
0239 /* Register Driver routine */
0240 extern void gradcdac_register_drv (void);
0241
0242 #ifdef __cplusplus
0243 }
0244 #endif
0245
0246 #endif