dev/spi/xilinx-axi-spi.h

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /*
0004  * Copyright (C) 2021 Jan Sommer, German Aerospace Center (DLR)
0005  *
0006  * Redistribution and use in source and binary forms, with or without
0007  * modification, are permitted provided that the following conditions
0008  * are met:
0009  * 1. Redistributions of source code must retain the above copyright
0010  *    notice, this list of conditions and the following disclaimer.
0011  * 2. Redistributions in binary form must reproduce the above copyright
0012  *    notice, this list of conditions and the following disclaimer in the
0013  *    documentation and/or other materials provided with the distribution.
0014  *
0015  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0016  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0017  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0018  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0019  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0020  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0021  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0022  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0023  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0024  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0025  * POSSIBILITY OF SUCH DAMAGE.
0026  */
0027
0028 #ifndef LIBBSP_ARM_XILINX_AXI_SPI_H
0029 #define LIBBSP_ARM_XILINX_AXI_SPI_H
0030
0031 #include <rtems.h>
0032
0033 #ifdef __cplusplus
0034 extern "C" {
0035 #endif /* __cplusplus */
0036
0037 /**
0038  * Register Xilinx AXI SPI device
0039  *
0040  * Note:
0041  *   The Xilinx Quad SPI device is very versatile and
0042  *   supports many options. This driver assumes the
0043  *   following setup:
0044  *     - Standard SPI mode and AXI Lite interface
0045  *     - FIFO available (driver might also work without FIFOs)
0046  *
0047  * @param bus_path path for the new device node (e.g. "/dev/spi0")
0048  * @param register_base base address of the device
0049  * @param fifo_size Configured fifo size. Either 0, 16 or 256
0050  * @param num_cs Number of configured CS lines (0-32)
0051  *
0052  * @return 0 on success. Negative number otherwise.
0053  *
0054  */
0055 int spi_bus_register_xilinx_axi(
0056   const char *bus_path,
0057   uintptr_t register_base,
0058   uint32_t fifo_size,
0059   uint32_t num_cs,
0060   rtems_vector_number irq
0061 );
0062
0063 #ifdef __cplusplus
0064 }
0065 #endif /* __cplusplus */
0066
0067 #endif /* LIBBSP_ARM_XILINX_AXI_SPI_H */