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File indexing completed on 2025-05-11 08:23:42

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002 
0003 /*
0004  * Copyright (C) 2021 Jan Sommer, German Aerospace Center (DLR)
0005  *
0006  * Redistribution and use in source and binary forms, with or without
0007  * modification, are permitted provided that the following conditions
0008  * are met:
0009  * 1. Redistributions of source code must retain the above copyright
0010  *    notice, this list of conditions and the following disclaimer.
0011  * 2. Redistributions in binary form must reproduce the above copyright
0012  *    notice, this list of conditions and the following disclaimer in the
0013  *    documentation and/or other materials provided with the distribution.
0014  *
0015  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0016  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0017  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0018  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0019  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0020  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0021  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0022  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0023  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0024  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0025  * POSSIBILITY OF SUCH DAMAGE.
0026  */
0027 
0028 #ifndef LIBBSP_ARM_XILINX_ZYNQ_CADENCE_SPI_H
0029 #define LIBBSP_ARM_XILINX_ZYNQ_CADENCE_SPI_H
0030 
0031 #include <rtems.h>
0032 
0033 #ifdef __cplusplus
0034 extern "C" {
0035 #endif /* __cplusplus */
0036 
0037 /**
0038  * Register the cadence-spi device with rtems
0039  *
0040  * @param bus_path path of the new device (e.g. /dev/spi0)
0041  * @register_base Address of the first (i.e. config) register
0042  * @input_clock Configured frequency of the input clock
0043  *
0044  * @return RTEMS_SUCCESSFUL on success, negative number on failure
0045  *
0046  * Note: The spi frequencies the cadence spi device can achieve
0047  *       are the @p input_clock divided by a power of 2 between
0048  *       4 and 256.
0049  *       The driver tries to find a divider which yields a spi
0050  *       frequency equal to or lower than the desired bus frequency.
0051  */
0052 int spi_bus_register_cadence(
0053   const char *bus_path,
0054   uintptr_t register_base,
0055   uint32_t input_clock,
0056   rtems_vector_number irq
0057 );
0058 
0059 #ifdef __cplusplus
0060 }
0061 #endif /* __cplusplus */
0062 
0063 #endif /* LIBBSP_ARM_XILINX_ZYNQ_CADENCE_SPI_H */