shared/pci/pci_io.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * PCI Support when Configuration Space is in I/O
0007  */
0008
0009 /*
0010  *  COPYRIGHT (c) 2016.
0011  *  On-Line Applications Research Corporation (OAR).
0012  *
0013  * Redistribution and use in source and binary forms, with or without
0014  * modification, are permitted provided that the following conditions
0015  * are met:
0016  * 1. Redistributions of source code must retain the above copyright
0017  *    notice, this list of conditions and the following disclaimer.
0018  * 2. Redistributions in binary form must reproduce the above copyright
0019  *    notice, this list of conditions and the following disclaimer in the
0020  *    documentation and/or other materials provided with the distribution.
0021  *
0022  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0023  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0024  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0025  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0026  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0027  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0028  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0029  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0030  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0031  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0032  * POSSIBILITY OF SUCH DAMAGE.
0033  */
0034
0035 #include <rtems.h>
0036 #include <bsp.h>
0037 #include <bsp/bspimpl.h>
0038
0039 static int pci_io_initialized = 0;
0040
0041 /*
0042  * Forward reference. Initialized at bottom.
0043  */
0044 static const pci_config_access_functions pci_io_indirect_functions;
0045
0046 /*
0047  * Detects presense of PCI Configuration is in I/O space. If so, return
0048  * pointer to accessor methods.
0049  *
0050  * NOTE: TBD to determine if (a) PCI Bus exists and (b) this is the
0051  *       access method.
0052  */
0053 const pci_config_access_functions *pci_io_initialize(void)
0054 {
0055   pci_io_initialized = 1;
0056
0057   printk( "PCI I/O Support Initialized\n" );
0058
0059   return &pci_io_indirect_functions;
0060 }
0061
0062 /*
0063  * Build PCI Address
0064  */
0065 static inline uint32_t pci_io_build_address(
0066   uint16_t  bus,
0067   uint16_t  slot,
0068   uint16_t  function,
0069   uint16_t  offset
0070 )
0071 {
0072   uint32_t bus_u32      = (uint32_t)bus;
0073   uint32_t slot_u32     = (uint32_t)slot;
0074   uint32_t function_u32 = (uint32_t)function;
0075   uint32_t address;
0076
0077   /*
0078    * create configuration address as per figure at
0079    *   http://wiki.osdev.org/PCI#Configuration_Space_Access_Mechanism_.231
0080    */
0081   address  = (uint32_t) 0x80000000;  /* Bit  31    - Enable Bit */
0082                                      /* Bits 30-24 - Reserved */
0083   address |= bus_u32 << 16;          /* Bits 23-16 - Bus Number */
0084   address |= slot_u32 << 11;         /* Bits 15-11 - Device/Slot Number */
0085   address |= function_u32 << 8;      /* Bits 10-8  - Function Number */
0086   address |= offset & 0xfc;          /* Bits 7-2   - Offset/Register Number */
0087                                      /* Bits 1-0   - Reserved 0 */
0088   return address;
0089 }
0090
0091 static int BSP_pci_read_config_byte(
0092   unsigned char bus,
0093   unsigned char slot,
0094   unsigned char function,
0095   unsigned char offset,
0096   unsigned char *value
0097 )
0098 {
0099   uint32_t address;
0100   uint32_t tmp;
0101
0102   address = pci_io_build_address( bus, slot, function, offset );
0103
0104   /* write out the address */
0105   outport_long(0xCF8, address);
0106
0107   /* read in the data */
0108   inport_long(0xCFC, tmp);
0109
0110   /* (offset & 3) * 8) = 0 will choose the first byte of the 32 bits register */
0111   *value = (uint16_t)(tmp >> ((offset & 3) * 8)) & 0xff;
0112   return PCIBIOS_SUCCESSFUL;
0113 }
0114
0115 static int BSP_pci_read_config_word(
0116   unsigned char bus,
0117   unsigned char slot,
0118   unsigned char function,
0119   unsigned char offset,
0120   unsigned short *value
0121 )
0122 {
0123   uint32_t address;
0124   uint32_t tmp;
0125
0126   address = pci_io_build_address( bus, slot, function, offset );
0127
0128   /* write out the address */
0129   outport_long(0xCF8, address);
0130
0131   /* read in the data */
0132   inport_long(0xCFC, tmp);
0133
0134   /* (offset & 2) * 8) = 0 will choose the first word of the 32 bits register */
0135   *value = (uint16_t)(tmp >> ((offset & 2) * 8)) & 0xffff;
0136   return PCIBIOS_SUCCESSFUL;
0137 }
0138
0139 static int BSP_pci_read_config_dword(
0140   unsigned char bus,
0141   unsigned char slot,
0142   unsigned char function,
0143   unsigned char offset,
0144   uint32_t     *value
0145 )
0146 {
0147   uint32_t address;
0148   uint32_t tmp;
0149
0150   address = pci_io_build_address( bus, slot, function, offset );
0151
0152   /* write out the address */
0153   outport_long(0xCF8, address);
0154
0155   /* read in the data */
0156   inport_long(0xCFC, tmp);
0157
0158   *value = tmp;
0159   return PCIBIOS_SUCCESSFUL;
0160 }
0161
0162 static int BSP_pci_write_config_byte(
0163   unsigned char bus,
0164   unsigned char slot,
0165   unsigned char function,
0166   unsigned char offset,
0167   unsigned char value
0168 )
0169 {
0170   uint32_t address;
0171
0172   address = pci_io_build_address( bus, slot, function, offset );
0173
0174   /* write out the address */
0175   outport_long(0xCF8, address);
0176
0177   /* read in the data */
0178   outport_byte(0xCFC, value);
0179
0180   return PCIBIOS_SUCCESSFUL;
0181 }
0182
0183 static int BSP_pci_write_config_word(
0184   unsigned char bus,
0185   unsigned char slot,
0186   unsigned char function,
0187   unsigned char offset,
0188   unsigned short value
0189 )
0190 {
0191   uint32_t address;
0192
0193   address = pci_io_build_address( bus, slot, function, offset );
0194
0195   /* write out the address */
0196   outport_long(0xCF8, address);
0197
0198   /* read in the data */
0199   outport_word(0xCFC, value);
0200
0201   return PCIBIOS_SUCCESSFUL;
0202 }
0203
0204 static int BSP_pci_write_config_dword(
0205   unsigned char bus,
0206   unsigned char slot,
0207   unsigned char function,
0208   unsigned char offset,
0209   uint32_t      value
0210 )
0211 {
0212   uint32_t address;
0213
0214   address = pci_io_build_address( bus, slot, function, offset );
0215
0216   /* write out the address */
0217   outport_long(0xCF8, address);
0218
0219   /* read in the data */
0220   outport_long(0xCFC, value);
0221
0222   return PCIBIOS_SUCCESSFUL;
0223 }
0224
0225 static const pci_config_access_functions pci_io_indirect_functions = {
0226   BSP_pci_read_config_byte,
0227   BSP_pci_read_config_word,
0228   BSP_pci_read_config_dword,
0229   BSP_pci_write_config_byte,
0230   BSP_pci_write_config_word,
0231   BSP_pci_write_config_dword
0232 };