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File indexing completed on 2025-05-11 08:23:41

0001 /*
0002  *  Cache Management Support Routines for the i386
0003  */
0004 
0005 #include <rtems.h>
0006 #include <rtems/score/cpu.h>
0007 #include <libcpu/page.h>
0008 
0009 #define I386_CACHE_ALIGNMENT 16
0010 #define CPU_DATA_CACHE_ALIGNMENT I386_CACHE_ALIGNMENT
0011 #define CPU_INSTRUCTION_CACHE_ALIGNMENT I386_CACHE_ALIGNMENT
0012 
0013 void _CPU_disable_cache(void)
0014 {
0015   unsigned int regCr0;
0016 
0017   regCr0 = i386_get_cr0();
0018   regCr0 |= CR0_PAGE_LEVEL_CACHE_DISABLE;
0019   regCr0 |= CR0_NO_WRITE_THROUGH;
0020   i386_set_cr0( regCr0 );
0021   rtems_cache_flush_entire_data();
0022 }
0023 
0024 /*
0025  * Enable the entire cache
0026  */
0027 
0028 void _CPU_enable_cache(void)
0029 {
0030   unsigned int regCr0;
0031 
0032   regCr0 = i386_get_cr0();
0033   regCr0 &= ~(CR0_PAGE_LEVEL_CACHE_DISABLE);
0034   regCr0 &= ~(CR0_NO_WRITE_THROUGH);
0035   i386_set_cr0( regCr0 );
0036   /*rtems_cache_flush_entire_data();*/
0037 }
0038 
0039 /*
0040  * CACHE MANAGER: The following functions are CPU-specific.
0041  * They provide the basic implementation for the rtems_* cache
0042  * management routines. If a given function has no meaning for the CPU,
0043  * it does nothing by default.
0044  *
0045  * FIXME: The routines below should be implemented per CPU,
0046  *        to accomodate the capabilities of each.
0047  */
0048 
0049 #if defined(I386_CACHE_ALIGNMENT)
0050 static void _CPU_cache_flush_1_data_line(const void *d_addr) {}
0051 static void _CPU_cache_invalidate_1_data_line(const void *d_addr) {}
0052 static void _CPU_cache_freeze_data(void) {}
0053 static void _CPU_cache_unfreeze_data(void) {}
0054 static void _CPU_cache_flush_entire_data(void)
0055 {
0056   __asm__ volatile ("wbinvd");
0057 }
0058 
0059 static void _CPU_cache_invalidate_entire_data(void)
0060 {
0061   __asm__ volatile ("invd");
0062 }
0063 
0064 static void _CPU_cache_invalidate_entire_instruction(void)
0065 {
0066   __asm__ volatile ("invd");
0067 }
0068 
0069 static void _CPU_cache_invalidate_1_instruction_line(const void *i_addr)
0070 {
0071   _CPU_cache_invalidate_entire_instruction();
0072 }
0073 
0074 static void _CPU_cache_enable_data(void)
0075 {
0076   _CPU_enable_cache();
0077 }
0078 
0079 static void _CPU_cache_disable_data(void)
0080 {
0081   _CPU_disable_cache();
0082 }
0083 
0084 static void _CPU_cache_enable_instruction(void)
0085 {
0086   _CPU_enable_cache();
0087 }
0088 
0089 static void _CPU_cache_disable_instruction(void)
0090 {
0091   _CPU_disable_cache();
0092 }
0093 
0094 static void _CPU_cache_freeze_instruction(void)
0095 {
0096 }
0097 
0098 static void _CPU_cache_unfreeze_instruction(void)
0099 {
0100 }
0101 
0102 #endif
0103 
0104 #include "../../../shared/cache/cacheimpl.h"