pc386/start/start.S

0001 /*-------------------------------------------------------------------------+
0002 | start.s v1.1 - PC386 BSP - 1997/08/07
0003 +--------------------------------------------------------------------------+
0004 | This file contains the entry point for the application.
0005 | The name of this entry point is compiler dependent.
0006 | It jumps to the BSP which is responsible for performing all initialization.
0007 +--------------------------------------------------------------------------+
0008 | (C) Copyright 1997 -
0009 | - NavIST Group - Real-Time Distributed Systems and Industrial Automation
0010 |
0011 | http://pandora.ist.utl.pt
0012 |
0013 | Instituto Superior Tecnico * Lisboa * PORTUGAL
0014 +--------------------------------------------------------------------------+
0015 | Modified the 20/05/1998  by valette@crf.canon.fr in order to give a working
0016 | example of eraly stage debugging via the DEBUG_EARLY_START define.
0017 +--------------------------------------------------------------------------+
0018 | Disclaimer:
0019 |
0020 | This file is provided "AS IS" without warranty of any kind, either
0021 | expressed or implied.
0022 +--------------------------------------------------------------------------+
0023 | This code is based on an earlier generation RTEMS i386 start.s and the
0024 | following copyright applies:
0025 |
0026 | **************************************************************************
0027 | *  COPYRIGHT (c) 1989-2012.
0028 | *  On-Line Applications Research Corporation (OAR).
0029 | *
0030 | *  The license and distribution terms for this file may be
0031 | *  found in the file LICENSE in this distribution or at
0032 | *  http://www.rtems.org/license/LICENSE.
0033 | **************************************************************************
0034 +--------------------------------------------------------------------------*/
0035
0036 /*
0037  * The most trivial start.s possible. It does not know anything
0038  * about system it is running on, so it will jump to appropriate
0039  * place in BSP specific place to do things it knows nothing about
0040  */
0041
0042 #include <rtems/asm.h>
0043 #include <rtems/score/cpu.h>
0044 #include <bspopts.h>
0045
0046 /*----------------------------------------------------------------------------+
0047 | Size of heap and stack:
0048 +----------------------------------------------------------------------------*/
0049
0050 #ifndef CPU_STACK_ALIGNMENT
0051 #error  "Missing header ? CPU_STACK_ALIGNMENT NOT DEFINED"
0052 #endif
0053
0054 /*----------------------------------------------------------------------------+
0055 | CODE section
0056 +----------------------------------------------------------------------------*/
0057
0058 BEGIN_CODE
0059
0060     PUBLIC (start)      # GNU default entry point
0061
0062     EXTERN (boot_card)
0063 #if USE_VBE_RM
0064         EXTERN (vesa_realmode_bootup_init)
0065 #endif
0066     EXTERN (_load_segments)
0067     EXTERN (_return_to_monitor)
0068     EXTERN (_IBMPC_initVideo)
0069     EXTERN (debugPollingGetChar)
0070     EXTERN (checkCPUtypeSetCr0)
0071     EXTERN (printk)
0072 #ifdef __SSE__
0073     EXTERN (x86_capability)
0074 #ifdef __SSE3__
0075     EXTERN (x86_capability_x)
0076 #endif
0077 #endif
0078
0079 /*
0080  * In case this crashes on your machine and this is not due
0081  * to video mode set by the loader, you may try to define
0082  * the following variable:
0083  */
0084 /* #define DEBUG_EARLY_START */
0085
0086 SYM (start):
0087         /*
0088          *  When things are really, REALLY!, bad -- turn on the speaker and
0089          *  lock up.  This shows whether or not we make it to a certain
0090          *  location.
0091          */
0092 #if 0
0093         inb     $0x61, al
0094         orb     $0x03, al
0095         outb    al, $0x61       # enable the speaker
0096 speakl: jmp speakl             # and SPIN!!!
0097 #endif
0098
0099         nop
0100         cli         # DISABLE INTERRUPTS!!!
0101     cld
0102
0103     /* Save multiboot info if we detect a multiboot loader */
0104     cmp     $0x2badb002,eax
0105     jne 2f
0106
0107     /* We have multiboot info; let's hope DS and ES are OK... */
0108     movl    ebx, SYM(_boot_multiboot_info_p)
0109     /* Check for memory size info and save */
0110     movl    ebx, esi
0111     movl    (esi), eax
0112     movl    eax, ebx
0113     movl    $SYM(_boot_multiboot_info), edi
0114         /* save flags, always present */
0115     movsd
0116     /* flag 1 is memory */
0117     and $1, eax
0118     je  1f
0119     movl    $2, ecx
0120     rep movsd
0121     /* flag 2 is the command line */
0122 1:  movl    ebx, eax
0123     and $4, eax
0124     je  3f
0125     movl    (_boot_multiboot_info_p), eax
0126     movl    16(eax), esi
0127     movl    $255, ecx
0128 2:  movzbl  (esi), eax
0129     test    al, al
0130     je  3f
0131     movb    al, (edi)
0132     inc edi
0133     inc esi
0134     dec ecx
0135     je  3f
0136     jmp 2b
0137 3:  xor al, al
0138     movb    al, (edi)
0139 #ifdef DEBUG_EARLY_START
0140     /*
0141      * Must get video attribute to have a working printk.
0142      * Note that the following code assume we already have
0143      * valid segments and a stack. It should be true for
0144      * any loader starting RTEMS in protected mode (or
0145      * at least I hope so : -)).
0146      */
0147     call _IBMPC_initVideo
0148     /*
0149      * try printk and a getchar in polling mode ASAP
0150      */
0151     movl    $welcome_msg, 0(esp)
0152     call    printk
0153     addl    $4, esp
0154
0155     /* call debugPollingGetChar */
0156
0157 #endif
0158
0159 /*----------------------------------------------------------------------------+
0160 | Load the segment registers (this is done by the board's BSP) and perform any
0161 | other board specific initialization procedures, this piece of code
0162 | does not know anything about
0163 |
0164 | NOTE: Upon return, gs will contain the segment descriptor for a segment which
0165 |       maps directly to all of physical memory.
0166 +----------------------------------------------------------------------------*/
0167
0168     jmp SYM (_load_segments)    # load board dependent segments
0169
0170 /*----------------------------------------------------------------------------+
0171 | Set up the stack
0172 +----------------------------------------------------------------------------*/
0173
0174     PUBLIC (_establish_stack)
0175 SYM (_establish_stack):
0176
0177     movl    $_ISR_Stack_area_begin, eax # eax = end of bss/start of heap
0178     addl    $_ISR_Stack_size, eax   # make room for stack
0179     subl    $4, eax         # reserve room for arg to 'boot_card'
0180     andl    $ - CPU_STACK_ALIGNMENT, eax    # align SP on CPU_STACK_ALIGNMENT boundary
0181     movl    eax, esp        # set stack pointer
0182     movl    eax, ebp        # set base pointer
0183
0184 /*----------------------------------------------------------------------------+
0185 | Zero out the BSS segment
0186 +----------------------------------------------------------------------------*/
0187
0188 SYM (zero_bss):
0189     cld             # make direction flag count up
0190     movl    $ SYM (_end), ecx   # find end of .bss
0191     movl    $ SYM (__bss_start), edi # edi = beginning of .bss
0192     subl    edi, ecx        # ecx = size of .bss in bytes
0193     shrl    ecx         # size of .bss in longs
0194     shrl    ecx
0195     xorl    eax, eax        # value to clear out memory
0196     repne               # while ecx != 0
0197     stosl               #   clear a long in the bss
0198
0199 #if BSP_ENABLE_VGA
0200 /*-------------------------------------------------------------------+
0201 | Initialize the video because zero_bss has cleared initVideo parameters
0202 | if it was called earlier
0203 | So from now we can use printk
0204 +-------------------------------------------------------------------*/
0205     call _IBMPC_initVideo
0206
0207 #if USE_VBE_RM
0208         call    vesa_realmode_bootup_init
0209 #endif
0210 #endif
0211
0212 /*---------------------------------------------------------------------+
0213 | Check CPU type. Enable Cache and init coprocessor if needed.
0214 +---------------------------------------------------------------------*/
0215     call checkCPUtypeSetCr0
0216
0217 #ifdef __SSE__
0218     call SYM(enable_sse)
0219 #endif
0220
0221 /*---------------------------------------------------------------------+
0222 | Transfer control to User's Board Support Package
0223 | Note: at the top we reserved space for the argument
0224 |       so that
0225 |          initial_esp = ( TOS - 4 ) & ~(CPU_STACK_ALIGNMENT-1)
0226 |       this ensures that
0227 |       1) esp is now aligned
0228 |       2) there is space for the cmdline pointer which we just
0229 |          may store at *(esp)
0230 +---------------------------------------------------------------------*/
0231
0232     movl    $SYM(_boot_multiboot_cmdline), (esp)
0233     call    SYM (boot_card)
0234
0235     cli # stops interrupts from being processed after hlt!
0236     hlt # shutdown
0237
0238 #ifdef __SSE__
0239 /*--------------------------------------------------------------------+
0240  | Enable SSE; we really only care about fxsave/fxrstor and leave
0241  | The only feature *we* (as an OS) use is fxsave/fxrstor.
0242  | But as a courtesy we make sure we don't execute on hardware
0243  | that doesn't support features possibly used by the compiler.
0244 +---------------------------------------------------------------------*/
0245     PUBLIC (enable_sse)
0246 SYM(enable_sse):
0247     movl    SYM (x86_capability), eax
0248     testl   $0x01000000, eax
0249     jne     1f
0250     movl    $SYM (no_fxsave_msg), 0(esp)
0251     jmp     SYM(_sse_panic)
0252 1:
0253     testl   $0x02000000, eax
0254     jne     1f
0255     movl    $SYM (no_sse_msg), 0(esp)
0256     jmp     SYM(_sse_panic)
0257 1:
0258 #ifdef __SSE2__
0259     testl   $0x04000000, eax
0260     jne     1f
0261     movl    $SYM (no_sse2_msg), 0(esp)
0262     jmp     SYM(_sse_panic)
0263 1:
0264 #endif
0265 #ifdef __SSE3__
0266     movl    SYM (x86_capability_x), eax
0267     testl   $1, eax
0268     jne     1f
0269     movl    $SYM (no_sse3_msg), 0(esp)
0270     jmp     SYM(_sse_panic)
0271 1:
0272 #endif
0273     mov     cr4, eax        # OK to enable now
0274     or      $0x600, eax
0275     mov     eax, cr4
0276     ret
0277
0278 SYM(_sse_panic):
0279     call SYM(printk)
0280 1:  hlt
0281     jmp 1b
0282 #endif
0283
0284 END_CODE
0285
0286 BEGIN_DATA
0287     PUBLIC(_boot_multiboot_info_p)
0288 SYM(_boot_multiboot_info_p):
0289     .long 0
0290
0291     PUBLIC(_boot_multiboot_info)
0292     PUBLIC(_boot_multiboot_flags)
0293     PUBLIC(_boot_multiboot_memory)
0294     PUBLIC(_boot_multiboot_cmdline)
0295 SYM(_boot_multiboot_info):
0296 SYM(_boot_multiboot_flags):
0297     .long 0 /* flags */
0298 SYM(_boot_multiboot_memory):
0299     .long 0 /* mem_lower */
0300     .long 0 /* mem_upper */
0301 SYM(_boot_multiboot_cmdline):
0302     .rept 256 /* cmd line */
0303     .byte 0
0304     .endr
0305
0306 #ifdef DEBUG_EARLY_START
0307
0308     PUBLIC (welcome_msg)
0309 SYM (welcome_msg) :
0310     .string "Ready to debug RTEMS ?\nEnter <CR>\n"
0311
0312     PUBLIC (hex_msg)
0313 SYM (hex_msg) :
0314     .string "0x%x\n"
0315
0316     PUBLIC (made_it_msg)
0317 SYM (made_it_msg) :
0318     .string "made it to %d\n"
0319
0320 #endif
0321
0322 #ifdef __SSE__
0323 SYM (no_fxsave_msg) :
0324     .string "PANIC: compiled for SSE but CPU seems to have no FXSAVE/FXRSTOR support (which I need)\n"
0325 SYM (no_sse_msg) :
0326     .string "PANIC: compiled for SSE but your CPU seems to have no SSE support\n"
0327 #ifdef __SSE2__
0328 SYM (no_sse2_msg) :
0329     .string "PANIC: compiled for SSE2 but your CPU seems to have no SSE2 support\n"
0330 #endif
0331 #ifdef __SSE3__
0332 SYM (no_sse3_msg) :
0333     .string "PANIC: compiled for SSE3 but your CPU seems to have no SSE3 support\n"
0334 #endif
0335 #endif
0336
0337 END_DATA
0338
0339 END