pc386/console/vgainit.c

0001 /*
0002  * Copyright (c) 1999 Greg Haerr <greg@censoft.com>
0003  * Copyright (c) 1991 David I. Bell
0004  * Permission is granted to use, distribute, or modify this source,
0005  * provided that this copyright notice remains intact.
0006  *
0007  * Alternate EGA/VGA Screen Driver Init, direct hw programming
0008  */
0009 #include <i386_io.h>
0010
0011 #ifdef __rtems__
0012 #define ROMFONT     0   /* =0 no bios rom fonts available*/
0013 #else
0014 #define ROMFONT     1   /* =1 uses PC rom fonts */
0015 #endif
0016
0017 /* defines are defined in device.h of the MicroWindows package */
0018 #define MODE_SET    0   /* draw pixels as given (default) */
0019 #define MODE_XOR    1   /* draw pixels using XOR */
0020 #define MODE_OR 2   /* draw pixels using OR (notimp)*/
0021 #define MODE_AND    3   /* draw pixels using AND (notimp)*/
0022 #define  MODE_MAX   3
0023 typedef int MODE;    /* drawing mode*/
0024
0025 /* Define one and only one of the following to be nonzero*/
0026 #define VGA_ET4000  0   /* TSENG LABS ET4000 chip 800x600*/
0027 #define VGA_STANDARD    1   /* standard VGA 640x480*/
0028 #define EGA_STANDARD    0   /* standard EGA 640x350*/
0029
0030 #define DONE    0
0031 #define IN  1
0032 #define OUT 2
0033
0034 #define RAM_SCAN_LINES  32  /* number of scan lines in fonts in RAM */
0035 #define FONT_CHARS  256 /* number of characters in font tables */
0036 #define CHAR_WIDTH  8   /* number of pixels for character width */
0037
0038 #define PALREG  0x3c0
0039 #define SEQREG  0x3c4
0040 #define SEQVAL  0x3c5
0041 #define GRREG   0x3ce
0042 #define GRVAL   0x3cf
0043 #define ATTRREG 0x3da
0044 #define CRTCREG 0x3d4
0045 #define CRTCVAL 0x3d5
0046
0047 #define GENREG1 0x3c2
0048 #define GENREG2 0x3cc
0049 #define GENREG3 0x3ca
0050
0051 #define DATA_ROTATE 3   /* register number for data rotate */
0052
0053 typedef struct {
0054   int action;
0055   int port1;
0056   int data1;
0057   int port2;
0058   int data2;
0059 } REGIO;
0060
0061 #if ROMFONT
0062 extern FARADDR      rom_char_addr;      /* address of ROM font*/
0063 extern int      ROM_CHAR_HEIGHT;    /* ROM character height*/
0064 #endif
0065
0066 /* local data*/
0067 static REGIO        graphics_on[];
0068 static REGIO        graph_off[];
0069
0070 /* entry points*/
0071 void        ega_hwinit(void);
0072 void        ega_hwterm(void);
0073
0074 /* local routines*/
0075 static void writeregs(REGIO *rp);
0076 static void out_word(unsigned int p,unsigned int d);
0077 static void setmode(MODE mode);
0078
0079 void
0080 ega_hwinit(void)
0081 {
0082     writeregs(graphics_on);
0083 }
0084
0085 void
0086 ega_hwterm(void)
0087 {
0088   setmode(MODE_SET);
0089
0090   /* Copy character table from ROM back into bit plane 2 before turning
0091    * off graphics.
0092    */
0093   out_word(SEQREG, 0x0100); /* syn reset */
0094   out_word(SEQREG, 0x0402); /* cpu writes only to map 2 */
0095   out_word(SEQREG, 0x0704); /* sequential addressing */
0096   out_word(SEQREG, 0x0300); /* clear synchronous reset */
0097
0098   out_word(GRREG, 0x0204);  /* select map 2 for CPU reads */
0099   out_word(GRREG, 0x0005);  /* disable odd-even addressing */
0100
0101 #if ROMFONT
0102   {
0103       FARADDR   srcoffset;
0104       FARADDR   destoffset;
0105       int       data;
0106       int       ch;
0107       int       row;
0108
0109       srcoffset = rom_char_addr;
0110       destoffset = EGA_BASE;
0111       for (ch = 0; ch < FONT_CHARS; ch++) {
0112         for(row = 0; row < ROM_CHAR_HEIGHT; row++) {
0113             data = GETBYTE_FP(srcoffset++);
0114             PUTBYTE_FP(destoffset++, data);
0115         }
0116         destoffset += (RAM_SCAN_LINES - ROM_CHAR_HEIGHT);
0117       }
0118   }
0119 #endif
0120
0121   /* Finally set the registers back for text mode. */
0122   writeregs(graph_off);
0123 }
0124
0125 /* Set the graphics registers as indicated by the given table */
0126 static void
0127 writeregs(REGIO *rp)
0128 {
0129   for (; rp->action != DONE; rp++) {
0130     switch (rp->action) {
0131         case IN:
0132             inp(rp->port1);
0133             break;
0134         case OUT:
0135             outp(rp->port1, rp->data1);
0136             if (rp->port2)
0137                 outp(rp->port2, rp->data2);
0138             break;
0139     }
0140   }
0141 }
0142
0143 /* Output a word to an I/O port. */
0144 static void
0145 out_word(unsigned int p,unsigned int d)
0146 {
0147   outp(p, d & 0xff);
0148   outp(p + 1, (d >> 8) & 0xff);
0149 }
0150
0151 /* Values for the data rotate register to implement drawing modes. */
0152 static unsigned char mode_table[MODE_MAX + 1] = {
0153   0x00, 0x18, 0x10, 0x08
0154 };
0155
0156 /* Set the drawing mode.
0157  * This is either SET, OR, AND, or XOR.
0158  */
0159 static void
0160 setmode(MODE mode)
0161 {
0162   if (mode > MODE_MAX)
0163     return;
0164   outp(GRREG, DATA_ROTATE);
0165   outp(GRVAL, mode_table[mode]);
0166 }
0167
0168 #if VGA_ET4000
0169
0170 /* VGA 800x600 16-color graphics (BIOS mode 0x29).
0171  */
0172 REGIO graphics_on[] = {
0173   /* Reset attr F/F */
0174   IN, ATTRREG, 0, 0, 0,
0175
0176   /* Disable palette */
0177   OUT, PALREG, 0, 0, 0,
0178
0179   /* Reset sequencer regs */
0180   OUT, SEQREG, 0, SEQVAL, 0,
0181   OUT, SEQREG, 1, SEQVAL, 1,
0182   OUT, SEQREG, 2, SEQVAL, 0x0f,
0183   OUT, SEQREG, 3, SEQVAL, 0,
0184   OUT, SEQREG, 4, SEQVAL, 6,
0185
0186   /* Misc out reg */
0187   OUT, GENREG1, 0xe3, 0, 0,
0188
0189   /* Sequencer enable */
0190   OUT, SEQREG, 0, SEQVAL, 0x03,
0191
0192   /* Unprotect crtc regs 0-7 */
0193   OUT, CRTCREG, 0x11, CRTCVAL, 0,
0194
0195   /* Crtc */
0196   OUT, CRTCREG, 0, CRTCVAL, 0x7a,
0197   OUT, CRTCREG, 1, CRTCVAL, 0x63,
0198   OUT, CRTCREG, 2, CRTCVAL, 0x64,
0199   OUT, CRTCREG, 3, CRTCVAL, 0x1d,
0200   OUT, CRTCREG, 4, CRTCVAL, 0x68,
0201   OUT, CRTCREG, 5, CRTCVAL, 0x9a,
0202   OUT, CRTCREG, 6, CRTCVAL, 0x78,
0203   OUT, CRTCREG, 7, CRTCVAL, 0xf0,
0204   OUT, CRTCREG, 8, CRTCVAL, 0x00,
0205   OUT, CRTCREG, 9, CRTCVAL, 0x60,
0206   OUT, CRTCREG, 10, CRTCVAL, 0x00,
0207   OUT, CRTCREG, 11, CRTCVAL, 0x00,
0208   OUT, CRTCREG, 12, CRTCVAL, 0x00,
0209   OUT, CRTCREG, 13, CRTCVAL, 0x00,
0210   OUT, CRTCREG, 14, CRTCVAL, 0x00,
0211   OUT, CRTCREG, 15, CRTCVAL, 0x00,
0212   OUT, CRTCREG, 16, CRTCVAL, 0x5c,
0213   OUT, CRTCREG, 17, CRTCVAL, 0x8e,
0214   OUT, CRTCREG, 18, CRTCVAL, 0x57,
0215   OUT, CRTCREG, 19, CRTCVAL, 0x32,
0216   OUT, CRTCREG, 20, CRTCVAL, 0x00,
0217   OUT, CRTCREG, 21, CRTCVAL, 0x5b,
0218   OUT, CRTCREG, 22, CRTCVAL, 0x75,
0219   OUT, CRTCREG, 23, CRTCVAL, 0xc3,
0220   OUT, CRTCREG, 24, CRTCVAL, 0xff,
0221
0222   /* Graphics controller */
0223   OUT, GENREG2, 0x00, 0, 0,
0224   OUT, GENREG3, 0x01, 0, 0,
0225   OUT, GRREG, 0, GRVAL, 0x00,
0226   OUT, GRREG, 1, GRVAL, 0x00,
0227   OUT, GRREG, 2, GRVAL, 0x00,
0228   OUT, GRREG, 3, GRVAL, 0x00,
0229   OUT, GRREG, 4, GRVAL, 0x00,
0230   OUT, GRREG, 5, GRVAL, 0x00,
0231   OUT, GRREG, 6, GRVAL, 0x05,
0232   OUT, GRREG, 7, GRVAL, 0x0f,
0233   OUT, GRREG, 8, GRVAL, 0xff,
0234
0235   /* Reset attribute flip/flop */
0236   IN, ATTRREG, 0, 0, 0,
0237
0238   /* Palette */
0239   OUT, PALREG, 0, PALREG, 0x00,
0240   OUT, PALREG, 1, PALREG, 0x01,
0241   OUT, PALREG, 2, PALREG, 0x02,
0242   OUT, PALREG, 3, PALREG, 0x03,
0243   OUT, PALREG, 4, PALREG, 0x04,
0244   OUT, PALREG, 5, PALREG, 0x05,
0245   OUT, PALREG, 6, PALREG, 0x06,
0246   OUT, PALREG, 7, PALREG, 0x07,
0247   OUT, PALREG, 8, PALREG, 0x38,
0248   OUT, PALREG, 9, PALREG, 0x39,
0249   OUT, PALREG, 10, PALREG, 0x3a,
0250   OUT, PALREG, 11, PALREG, 0x3b,
0251   OUT, PALREG, 12, PALREG, 0x3c,
0252   OUT, PALREG, 13, PALREG, 0x3d,
0253   OUT, PALREG, 14, PALREG, 0x3e,
0254   OUT, PALREG, 15, PALREG, 0x3f,
0255   OUT, PALREG, 16, PALREG, 0x01,
0256   OUT, PALREG, 17, PALREG, 0x00,
0257   OUT, PALREG, 18, PALREG, 0x0f,
0258   OUT, PALREG, 19, PALREG, 0x00,
0259
0260   /* Enable palette */
0261   OUT, PALREG, 0x20, 0, 0,
0262
0263   /* End of table */
0264   DONE, 0, 0, 0, 0
0265 };
0266
0267 /* VGA 80x25 text (BIOS mode 3).
0268  */
0269 static REGIO graph_off[] = {
0270   /* Reset attr F/F */
0271   IN, ATTRREG, 0, 0, 0,
0272
0273   /* Disable palette */
0274   OUT, PALREG, 0, 0, 0,
0275
0276   /* Reset sequencer regs */
0277   OUT, SEQREG, 0, SEQVAL, 1,
0278   OUT, SEQREG, 1, SEQVAL, 1,
0279   OUT, SEQREG, 2, SEQVAL, 3,
0280   OUT, SEQREG, 3, SEQVAL, 0,
0281   OUT, SEQREG, 4, SEQVAL, 2,
0282
0283   /* Misc out reg */
0284   OUT, GENREG1, 0x63, 0, 0,
0285
0286   /* Sequencer enable */
0287   OUT, SEQREG, 0, SEQVAL, 3,
0288
0289   /* Unprotect crtc regs 0-7 */
0290   OUT, CRTCREG, 0x11, CRTCVAL, 0,
0291
0292   /* Crtc */
0293   OUT, CRTCREG, 0, CRTCVAL, 0x5f,   /* horiz total */
0294   OUT, CRTCREG, 1, CRTCVAL, 0x4f,   /* horiz end */
0295   OUT, CRTCREG, 2, CRTCVAL, 0x50,   /* horiz blank */
0296   OUT, CRTCREG, 3, CRTCVAL, 0x82,   /* end blank */
0297   OUT, CRTCREG, 4, CRTCVAL, 0x55,   /* horiz retrace */
0298   OUT, CRTCREG, 5, CRTCVAL, 0x81,   /* end retrace */
0299   OUT, CRTCREG, 6, CRTCVAL, 0xbf,   /* vert total */
0300   OUT, CRTCREG, 7, CRTCVAL, 0x1f,   /* overflows */
0301   OUT, CRTCREG, 8, CRTCVAL, 0x00,   /* row scan */
0302   OUT, CRTCREG, 9, CRTCVAL, 0x4f,   /* max scan line */
0303   OUT, CRTCREG, 10, CRTCVAL, 0x00,  /* cursor start */
0304   OUT, CRTCREG, 11, CRTCVAL, 0x0f,  /* cursor end */
0305   OUT, CRTCREG, 12, CRTCVAL, 0x0e,  /* start high addr */
0306   OUT, CRTCREG, 13, CRTCVAL, 0xb0,  /* low addr */
0307   OUT, CRTCREG, 14, CRTCVAL, 0x16,  /* cursor high */
0308   OUT, CRTCREG, 15, CRTCVAL, 0x30,  /* cursor low */
0309   OUT, CRTCREG, 16, CRTCVAL, 0x9c,  /* vert retrace */
0310   OUT, CRTCREG, 17, CRTCVAL, 0x8e,  /* retrace end */
0311   OUT, CRTCREG, 18, CRTCVAL, 0x8f,  /* vert end */
0312   OUT, CRTCREG, 19, CRTCVAL, 0x28,  /* offset */
0313   OUT, CRTCREG, 20, CRTCVAL, 0x1f,  /* underline */
0314   OUT, CRTCREG, 21, CRTCVAL, 0x96,  /* vert blank */
0315   OUT, CRTCREG, 22, CRTCVAL, 0xb9,  /* end blank */
0316   OUT, CRTCREG, 23, CRTCVAL, 0xa3,  /* crt mode */
0317   OUT, CRTCREG, 24, CRTCVAL, 0xff,  /* line compare */
0318
0319   /* Graphics controller */
0320   OUT, GENREG2, 0x00, 0, 0,
0321   OUT, GENREG3, 0x01, 0, 0,
0322   OUT, GRREG, 0, GRVAL, 0x00,
0323   OUT, GRREG, 1, GRVAL, 0x00,
0324   OUT, GRREG, 2, GRVAL, 0x00,
0325   OUT, GRREG, 3, GRVAL, 0x00,
0326   OUT, GRREG, 4, GRVAL, 0x00,
0327   OUT, GRREG, 5, GRVAL, 0x10,
0328   OUT, GRREG, 6, GRVAL, 0x0e,
0329   OUT, GRREG, 7, GRVAL, 0x00,
0330   OUT, GRREG, 8, GRVAL, 0xff,
0331
0332   /* Reset attribute flip/flop */
0333   IN, ATTRREG, 0, 0, 0,
0334
0335   /* Palette */
0336   OUT, PALREG, 0, PALREG, 0x00,
0337   OUT, PALREG, 1, PALREG, 0x01,
0338   OUT, PALREG, 2, PALREG, 0x02,
0339   OUT, PALREG, 3, PALREG, 0x03,
0340   OUT, PALREG, 4, PALREG, 0x04,
0341   OUT, PALREG, 5, PALREG, 0x05,
0342   OUT, PALREG, 6, PALREG, 0x06,
0343   OUT, PALREG, 7, PALREG, 0x07,
0344   OUT, PALREG, 8, PALREG, 0x10,
0345   OUT, PALREG, 9, PALREG, 0x11,
0346   OUT, PALREG, 10, PALREG, 0x12,
0347   OUT, PALREG, 11, PALREG, 0x13,
0348   OUT, PALREG, 12, PALREG, 0x14,
0349   OUT, PALREG, 13, PALREG, 0x15,
0350   OUT, PALREG, 14, PALREG, 0x16,
0351   OUT, PALREG, 15, PALREG, 0x17,
0352   OUT, PALREG, 16, PALREG, 0x08,
0353   OUT, PALREG, 17, PALREG, 0x00,
0354   OUT, PALREG, 18, PALREG, 0x0f,
0355   OUT, PALREG, 19, PALREG, 0x00,
0356
0357   /* Enable palette */
0358   OUT, PALREG, 0x20, 0, 0,
0359
0360   /* End of table */
0361   DONE, 0, 0, 0, 0
0362 };
0363
0364 #endif
0365
0366 #if VGA_STANDARD
0367
0368 /* VGA 640x480 16-color graphics (BIOS mode 0x12).
0369  */
0370 static REGIO graphics_on[] = {
0371   /* Reset attr F/F */
0372   { IN, ATTRREG, 0, 0, 0 },
0373
0374   /* Disable palette */
0375   { OUT, PALREG, 0, 0, 0 },
0376
0377   /* Reset sequencer regs */
0378   { OUT, SEQREG, 0, SEQVAL, 0 },
0379   { OUT, SEQREG, 1, SEQVAL, 1 },
0380   { OUT, SEQREG, 2, SEQVAL, 0x0f },
0381   { OUT, SEQREG, 3, SEQVAL, 0 },
0382   { OUT, SEQREG, 4, SEQVAL, 6 },
0383
0384   /* Misc out reg */
0385   { OUT, GENREG1, 0xe3, 0, 0 },
0386
0387   /* Sequencer enable */
0388   { OUT, SEQREG, 0, SEQVAL, 0x03 },
0389
0390   /* Unprotect crtc regs 0-7 */
0391   { OUT, CRTCREG, 0x11, CRTCVAL, 0 },
0392
0393   /* Crtc */
0394   { OUT, CRTCREG, 0, CRTCVAL, 0x5f },
0395   { OUT, CRTCREG, 1, CRTCVAL, 0x4f },
0396   { OUT, CRTCREG, 2, CRTCVAL, 0x50 },
0397   { OUT, CRTCREG, 3, CRTCVAL, 0x82 },
0398   { OUT, CRTCREG, 4, CRTCVAL, 0x54 },
0399   { OUT, CRTCREG, 5, CRTCVAL, 0x80 },
0400   { OUT, CRTCREG, 6, CRTCVAL, 0x0b },
0401   { OUT, CRTCREG, 7, CRTCVAL, 0x3e },
0402   { OUT, CRTCREG, 8, CRTCVAL, 0x00 },
0403   { OUT, CRTCREG, 9, CRTCVAL, 0x40 },
0404   { OUT, CRTCREG, 10, CRTCVAL, 0x00 },
0405   { OUT, CRTCREG, 11, CRTCVAL, 0x00 },
0406   { OUT, CRTCREG, 12, CRTCVAL, 0x00 },
0407   { OUT, CRTCREG, 13, CRTCVAL, 0x00 },
0408   { OUT, CRTCREG, 14, CRTCVAL, 0x00 },
0409   { OUT, CRTCREG, 15, CRTCVAL, 0x59 },
0410   { OUT, CRTCREG, 16, CRTCVAL, 0xea },
0411   { OUT, CRTCREG, 17, CRTCVAL, 0x8c },
0412   { OUT, CRTCREG, 18, CRTCVAL, 0xdf },
0413   { OUT, CRTCREG, 19, CRTCVAL, 0x28 },
0414   { OUT, CRTCREG, 20, CRTCVAL, 0x00 },
0415   { OUT, CRTCREG, 21, CRTCVAL, 0xe7 },
0416   { OUT, CRTCREG, 22, CRTCVAL, 0x04 },
0417   { OUT, CRTCREG, 23, CRTCVAL, 0xe3 },
0418   { OUT, CRTCREG, 24, CRTCVAL, 0xff },
0419
0420   /* Graphics controller */
0421   { OUT, GENREG2, 0x00, 0, 0 },
0422   { OUT, GENREG3, 0x01, 0, 0 },
0423   { OUT, GRREG, 0, GRVAL, 0x00 },
0424   { OUT, GRREG, 1, GRVAL, 0x00 },
0425   { OUT, GRREG, 2, GRVAL, 0x00 },
0426   { OUT, GRREG, 3, GRVAL, 0x00 },
0427   { OUT, GRREG, 4, GRVAL, 0x00 },
0428   { OUT, GRREG, 5, GRVAL, 0x00 },
0429   { OUT, GRREG, 6, GRVAL, 0x05 },
0430   { OUT, GRREG, 7, GRVAL, 0x0f },
0431   { OUT, GRREG, 8, GRVAL, 0xff },
0432
0433   /* Reset attribute flip/flop */
0434   { IN, ATTRREG, 0, 0, 0 },
0435
0436   /* Palette */
0437   { OUT, PALREG, 0, PALREG, 0x00 },
0438   { OUT, PALREG, 1, PALREG, 0x01 },
0439   { OUT, PALREG, 2, PALREG, 0x02 },
0440   { OUT, PALREG, 3, PALREG, 0x03 },
0441   { OUT, PALREG, 4, PALREG, 0x04 },
0442   { OUT, PALREG, 5, PALREG, 0x05 },
0443   { OUT, PALREG, 6, PALREG, 0x06 },
0444   { OUT, PALREG, 7, PALREG, 0x07 },
0445   { OUT, PALREG, 8, PALREG, 0x38 },
0446   { OUT, PALREG, 9, PALREG, 0x39 },
0447   { OUT, PALREG, 10, PALREG, 0x3a },
0448   { OUT, PALREG, 11, PALREG, 0x3b },
0449   { OUT, PALREG, 12, PALREG, 0x3c },
0450   { OUT, PALREG, 13, PALREG, 0x3d },
0451   { OUT, PALREG, 14, PALREG, 0x3e },
0452   { OUT, PALREG, 15, PALREG, 0x3f },
0453   { OUT, PALREG, 16, PALREG, 0x01 },
0454   { OUT, PALREG, 17, PALREG, 0x00 },
0455   { OUT, PALREG, 18, PALREG, 0x0f },
0456   { OUT, PALREG, 19, PALREG, 0x00 },
0457
0458   /* Enable palette */
0459   { OUT, PALREG, 0x20, 0, 0 },
0460
0461   /* End of table */
0462   { DONE, 0, 0, 0, 0 }
0463 };
0464
0465 /* VGA 80x25 text (BIOS mode 3).
0466  */
0467 static REGIO graph_off[] = {
0468   /* Reset attr F/F */
0469   { IN, ATTRREG, 0, 0, 0 },
0470
0471   /* Disable palette */
0472   { OUT, PALREG, 0, 0, 0 },
0473
0474   /* Reset sequencer regs */
0475   { OUT, SEQREG, 0, SEQVAL, 1 },
0476   { OUT, SEQREG, 1, SEQVAL, 1 },
0477   { OUT, SEQREG, 2, SEQVAL, 3 },
0478   { OUT, SEQREG, 3, SEQVAL, 0 },
0479   { OUT, SEQREG, 4, SEQVAL, 2 },
0480
0481   /* Misc out reg */
0482   { OUT, GENREG1, 0x63, 0, 0 },
0483
0484   /* Sequencer enable */
0485   { OUT, SEQREG, 0, SEQVAL, 3 },
0486
0487   /* Unprotect crtc regs 0-7 */
0488   { OUT, CRTCREG, 0x11, CRTCVAL, 0 },
0489
0490   /* Crtc */
0491   { OUT, CRTCREG, 0, CRTCVAL, 0x5f },   /* horiz total */
0492   { OUT, CRTCREG, 1, CRTCVAL, 0x4f },   /* horiz end */
0493   { OUT, CRTCREG, 2, CRTCVAL, 0x50 },   /* horiz blank */
0494   { OUT, CRTCREG, 3, CRTCVAL, 0x82 },   /* end blank */
0495   { OUT, CRTCREG, 4, CRTCVAL, 0x55 },   /* horiz retrace */
0496   { OUT, CRTCREG, 5, CRTCVAL, 0x81 },   /* end retrace */
0497   { OUT, CRTCREG, 6, CRTCVAL, 0xbf },   /* vert total */
0498   { OUT, CRTCREG, 7, CRTCVAL, 0x1f },   /* overflows */
0499   { OUT, CRTCREG, 8, CRTCVAL, 0x00 },   /* row scan */
0500   { OUT, CRTCREG, 9, CRTCVAL, 0x4f },   /* max scan line */
0501   { OUT, CRTCREG, 10, CRTCVAL, 0x00 },  /* cursor start */
0502   { OUT, CRTCREG, 11, CRTCVAL, 0x0f },  /* cursor end */
0503   { OUT, CRTCREG, 12, CRTCVAL, 0x0e },  /* start high addr */
0504   { OUT, CRTCREG, 13, CRTCVAL, 0xb0 },  /* low addr */
0505   { OUT, CRTCREG, 14, CRTCVAL, 0x16 },  /* cursor high */
0506   { OUT, CRTCREG, 15, CRTCVAL, 0x30 },  /* cursor low */
0507   { OUT, CRTCREG, 16, CRTCVAL, 0x9c },  /* vert retrace */
0508   { OUT, CRTCREG, 17, CRTCVAL, 0x8e },  /* retrace end */
0509   { OUT, CRTCREG, 18, CRTCVAL, 0x8f },  /* vert end */
0510   { OUT, CRTCREG, 19, CRTCVAL, 0x28 },  /* offset */
0511   { OUT, CRTCREG, 20, CRTCVAL, 0x1f },  /* underline */
0512   { OUT, CRTCREG, 21, CRTCVAL, 0x96 },  /* vert blank */
0513   { OUT, CRTCREG, 22, CRTCVAL, 0xb9 },  /* end blank */
0514   { OUT, CRTCREG, 23, CRTCVAL, 0xa3 },  /* crt mode */
0515   { OUT, CRTCREG, 24, CRTCVAL, 0xff },  /* line compare */
0516
0517   /* Graphics controller */
0518   { OUT, GENREG2, 0x00, 0, 0 },
0519   { OUT, GENREG3, 0x01, 0, 0 },
0520   { OUT, GRREG, 0, GRVAL, 0x00 },
0521   { OUT, GRREG, 1, GRVAL, 0x00 },
0522   { OUT, GRREG, 2, GRVAL, 0x00 },
0523   { OUT, GRREG, 3, GRVAL, 0x00 },
0524   { OUT, GRREG, 4, GRVAL, 0x00 },
0525   { OUT, GRREG, 5, GRVAL, 0x10 },
0526   { OUT, GRREG, 6, GRVAL, 0x0e },
0527   { OUT, GRREG, 7, GRVAL, 0x00 },
0528   { OUT, GRREG, 8, GRVAL, 0xff },
0529
0530   /* Reset attribute flip/flop */
0531   { IN, ATTRREG, 0, 0, 0 },
0532
0533   /* Palette */
0534   { OUT, PALREG, 0, PALREG, 0x00 },
0535   { OUT, PALREG, 1, PALREG, 0x01 },
0536   { OUT, PALREG, 2, PALREG, 0x02 },
0537   { OUT, PALREG, 3, PALREG, 0x03 },
0538   { OUT, PALREG, 4, PALREG, 0x04 },
0539   { OUT, PALREG, 5, PALREG, 0x05 },
0540   { OUT, PALREG, 6, PALREG, 0x06 },
0541   { OUT, PALREG, 7, PALREG, 0x07 },
0542   { OUT, PALREG, 8, PALREG, 0x10 },
0543   { OUT, PALREG, 9, PALREG, 0x11 },
0544   { OUT, PALREG, 10, PALREG, 0x12 },
0545   { OUT, PALREG, 11, PALREG, 0x13 },
0546   { OUT, PALREG, 12, PALREG, 0x14 },
0547   { OUT, PALREG, 13, PALREG, 0x15 },
0548   { OUT, PALREG, 14, PALREG, 0x16 },
0549   { OUT, PALREG, 15, PALREG, 0x17 },
0550   { OUT, PALREG, 16, PALREG, 0x08 },
0551   { OUT, PALREG, 17, PALREG, 0x00 },
0552   { OUT, PALREG, 18, PALREG, 0x0f },
0553   { OUT, PALREG, 19, PALREG, 0x00 },
0554
0555   /* Enable palette */
0556   { OUT, PALREG, 0x20, 0, 0 },
0557
0558   /* End of table */
0559   { DONE, 0, 0, 0, 0 }
0560 };
0561
0562 #endif
0563
0564 #if EGA_STANDARD
0565
0566 /* EGA 640x350 16-color graphics (BIOS mode 0x10).
0567  */
0568 static REGIO graphics_on[] = {
0569   /* Reset attr F/F */
0570   IN, ATTRREG, 0, 0, 0,
0571
0572   /* Disable palette */
0573   OUT, PALREG, 0, 0, 0,
0574
0575   /* Reset sequencer regs */
0576   OUT, SEQREG, 0, SEQVAL, 0,
0577   OUT, SEQREG, 1, SEQVAL, 1,
0578   OUT, SEQREG, 2, SEQVAL, 0x0f,
0579   OUT, SEQREG, 3, SEQVAL, 0,
0580   OUT, SEQREG, 4, SEQVAL, 6,
0581
0582   /* Misc out reg */
0583   OUT, GENREG1, 0xa7, 0, 0,
0584
0585   /* Sequencer enable */
0586   OUT, SEQREG, 0, SEQVAL, 0x03,
0587
0588   /* Unprotect crtc regs 0-7 */
0589   OUT, CRTCREG, 0x11, CRTCVAL, 0,
0590
0591   /* Crtc */
0592   OUT, CRTCREG, 0, CRTCVAL, 0x5b,
0593   OUT, CRTCREG, 1, CRTCVAL, 0x4f,
0594   OUT, CRTCREG, 2, CRTCVAL, 0x53,
0595   OUT, CRTCREG, 3, CRTCVAL, 0x37,
0596   OUT, CRTCREG, 4, CRTCVAL, 0x52,
0597   OUT, CRTCREG, 5, CRTCVAL, 0x00,
0598   OUT, CRTCREG, 6, CRTCVAL, 0x6c,
0599   OUT, CRTCREG, 7, CRTCVAL, 0x1f,
0600   OUT, CRTCREG, 8, CRTCVAL, 0x00,
0601   OUT, CRTCREG, 9, CRTCVAL, 0x00,
0602   OUT, CRTCREG, 10, CRTCVAL, 0x00,
0603   OUT, CRTCREG, 11, CRTCVAL, 0x00,
0604   OUT, CRTCREG, 12, CRTCVAL, 0x00,
0605   OUT, CRTCREG, 13, CRTCVAL, 0x00,
0606   OUT, CRTCREG, 14, CRTCVAL, 0x00,
0607   OUT, CRTCREG, 15, CRTCVAL, 0x00,
0608   OUT, CRTCREG, 16, CRTCVAL, 0x5e,
0609   OUT, CRTCREG, 17, CRTCVAL, 0x2b,
0610   OUT, CRTCREG, 18, CRTCVAL, 0x5d,
0611   OUT, CRTCREG, 19, CRTCVAL, 0x28,
0612   OUT, CRTCREG, 20, CRTCVAL, 0x0f,
0613   OUT, CRTCREG, 21, CRTCVAL, 0x5f,
0614   OUT, CRTCREG, 22, CRTCVAL, 0x0a,
0615   OUT, CRTCREG, 23, CRTCVAL, 0xe3,
0616   OUT, CRTCREG, 24, CRTCVAL, 0xff,
0617
0618   /* Graphics controller */
0619   OUT, GENREG2, 0x00, 0, 0,
0620   OUT, GENREG3, 0x01, 0, 0,
0621   OUT, GRREG, 0, GRVAL, 0x00,
0622   OUT, GRREG, 1, GRVAL, 0x00,
0623   OUT, GRREG, 2, GRVAL, 0x00,
0624   OUT, GRREG, 3, GRVAL, 0x00,
0625   OUT, GRREG, 4, GRVAL, 0x00,
0626   OUT, GRREG, 5, GRVAL, 0x00,
0627   OUT, GRREG, 6, GRVAL, 0x05,
0628   OUT, GRREG, 7, GRVAL, 0x0f,
0629   OUT, GRREG, 8, GRVAL, 0xff,
0630
0631   /* Reset attribute flip/flop */
0632   IN, ATTRREG, 0, 0, 0,
0633
0634   /* Palette */
0635   OUT, PALREG, 0, PALREG, 0x00,
0636   OUT, PALREG, 1, PALREG, 0x01,
0637   OUT, PALREG, 2, PALREG, 0x02,
0638   OUT, PALREG, 3, PALREG, 0x03,
0639   OUT, PALREG, 4, PALREG, 0x04,
0640   OUT, PALREG, 5, PALREG, 0x05,
0641   OUT, PALREG, 6, PALREG, 0x06,
0642   OUT, PALREG, 7, PALREG, 0x07,
0643   OUT, PALREG, 8, PALREG, 0x38,
0644   OUT, PALREG, 9, PALREG, 0x39,
0645   OUT, PALREG, 10, PALREG, 0x3a,
0646   OUT, PALREG, 11, PALREG, 0x3b,
0647   OUT, PALREG, 12, PALREG, 0x3c,
0648   OUT, PALREG, 13, PALREG, 0x3d,
0649   OUT, PALREG, 14, PALREG, 0x3e,
0650   OUT, PALREG, 15, PALREG, 0x3f,
0651   OUT, PALREG, 16, PALREG, 0x01,
0652   OUT, PALREG, 17, PALREG, 0x00,
0653   OUT, PALREG, 18, PALREG, 0x0f,
0654   OUT, PALREG, 19, PALREG, 0x00,
0655
0656   /* Enable palette */
0657   OUT, PALREG, 0x20, 0, 0,
0658
0659   /* End of table */
0660   DONE, 0, 0, 0, 0
0661 };
0662
0663 /* EGA 80x25 text (BIOS mode 3).
0664  */
0665 static REGIO graph_off[] = {
0666   /* Reset attr F/F */
0667   IN, ATTRREG, 0, 0, 0,
0668
0669   /* Disable palette */
0670   OUT, PALREG, 0, 0, 0,
0671
0672   /* Reset sequencer regs */
0673   OUT, SEQREG, 0, SEQVAL, 1,
0674   OUT, SEQREG, 1, SEQVAL, 1,
0675   OUT, SEQREG, 2, SEQVAL, 3,
0676   OUT, SEQREG, 3, SEQVAL, 0,
0677   OUT, SEQREG, 4, SEQVAL, 3,
0678
0679   /* Misc out reg */
0680   OUT, GENREG1, 0xa7, 0, 0,
0681
0682   /* Sequencer enable */
0683   OUT, SEQREG, 0, SEQVAL, 3,
0684
0685   /* Crtc */
0686   OUT, CRTCREG, 0, CRTCVAL, 0x5b,   /* horiz total */
0687   OUT, CRTCREG, 1, CRTCVAL, 0x4f,   /* horiz end */
0688   OUT, CRTCREG, 2, CRTCVAL, 0x53,   /* horiz blank */
0689   OUT, CRTCREG, 3, CRTCVAL, 0x37,   /* end blank */
0690   OUT, CRTCREG, 4, CRTCVAL, 0x51,   /* horiz retrace */
0691   OUT, CRTCREG, 5, CRTCVAL, 0x5b,   /* end retrace */
0692   OUT, CRTCREG, 6, CRTCVAL, 0x6c,   /* vert total */
0693   OUT, CRTCREG, 7, CRTCVAL, 0x1f,   /* overflows */
0694   OUT, CRTCREG, 8, CRTCVAL, 0x00,   /* row scan */
0695   OUT, CRTCREG, 9, CRTCVAL, 0x0d,   /* max scan line */
0696   OUT, CRTCREG, 10, CRTCVAL, 0x00,  /* cursor start */
0697   OUT, CRTCREG, 11, CRTCVAL, 0x0f,  /* cursor end */
0698   OUT, CRTCREG, 12, CRTCVAL, 0x00,  /* start high addr */
0699   OUT, CRTCREG, 13, CRTCVAL, 0x00,  /* low addr */
0700   OUT, CRTCREG, 14, CRTCVAL, 0x00,  /* cursor high */
0701   OUT, CRTCREG, 15, CRTCVAL, 0x00,  /* cursor low */
0702   OUT, CRTCREG, 16, CRTCVAL, 0x5e,  /* vert retrace */
0703   OUT, CRTCREG, 17, CRTCVAL, 0x2b,  /* retrace end */
0704   OUT, CRTCREG, 18, CRTCVAL, 0x5d,  /* vert end */
0705   OUT, CRTCREG, 19, CRTCVAL, 0x28,  /* offset */
0706   OUT, CRTCREG, 20, CRTCVAL, 0x0f,  /* underline */
0707   OUT, CRTCREG, 21, CRTCVAL, 0x5e,  /* vert blank */
0708   OUT, CRTCREG, 22, CRTCVAL, 0x0a,  /* end blank */
0709   OUT, CRTCREG, 23, CRTCVAL, 0xa3,  /* crt mode */
0710   OUT, CRTCREG, 24, CRTCVAL, 0xff,  /* line compare */
0711
0712   /* Graphics controller */
0713   OUT, GENREG2, 0x00, 0, 0,
0714   OUT, GENREG3, 0x01, 0, 0,
0715   OUT, GRREG, 0, GRVAL, 0x00,
0716   OUT, GRREG, 1, GRVAL, 0x00,
0717   OUT, GRREG, 2, GRVAL, 0x00,
0718   OUT, GRREG, 3, GRVAL, 0x00,
0719   OUT, GRREG, 4, GRVAL, 0x00,
0720   OUT, GRREG, 5, GRVAL, 0x10,
0721   OUT, GRREG, 6, GRVAL, 0x0e,
0722   OUT, GRREG, 7, GRVAL, 0x00,
0723   OUT, GRREG, 8, GRVAL, 0xff,
0724
0725   /* Reset attribute flip/flop */
0726   IN, ATTRREG, 0, 0, 0,
0727
0728   /* Palette */
0729   OUT, PALREG, 0, PALREG, 0x00,
0730   OUT, PALREG, 1, PALREG, 0x01,
0731   OUT, PALREG, 2, PALREG, 0x02,
0732   OUT, PALREG, 3, PALREG, 0x03,
0733   OUT, PALREG, 4, PALREG, 0x04,
0734   OUT, PALREG, 5, PALREG, 0x05,
0735   OUT, PALREG, 6, PALREG, 0x14,
0736   OUT, PALREG, 7, PALREG, 0x07,
0737   OUT, PALREG, 8, PALREG, 0x38,
0738   OUT, PALREG, 9, PALREG, 0x39,
0739   OUT, PALREG, 10, PALREG, 0x3a,
0740   OUT, PALREG, 11, PALREG, 0x3b,
0741   OUT, PALREG, 12, PALREG, 0x3c,
0742   OUT, PALREG, 13, PALREG, 0x3d,
0743   OUT, PALREG, 14, PALREG, 0x3e,
0744   OUT, PALREG, 15, PALREG, 0x3f,
0745   OUT, PALREG, 16, PALREG, 0x08,
0746   OUT, PALREG, 17, PALREG, 0x00,
0747   OUT, PALREG, 18, PALREG, 0x0f,
0748   OUT, PALREG, 19, PALREG, 0x00,
0749
0750   /* Enable palette */
0751   OUT, PALREG, 0x20, 0, 0,
0752
0753   /* End of table */
0754   DONE, 0, 0, 0, 0
0755 };
0756
0757 #endif