include/bsp/apic.h

0001 /**
0002  * @file
0003  * @ingroup i386_apic
0004  * @brief Local and I/O APIC definitions
0005  */
0006
0007 /*
0008  * Author: Erich Boleyn  <erich@uruk.org>
0009  *         http://www.uruk.org/~erich/
0010  *
0011  * Copyright (c) 1997-2011 Erich Boleyn.  All rights reserved.
0012  *
0013  * Redistribution and use in source and binary forms, with or without
0014  * modification, are permitted provided that the following conditions
0015  * are met:
0016  * 1. Redistributions of source code must retain the above copyright
0017  *    notice, this list of conditions and the following disclaimer.
0018  * 2. Redistributions in binary form must reproduce the above copyright
0019  *    notice, this list of conditions and the following disclaimer in the
0020  *    documentation and/or other materials provided with the distribution.
0021  * 3. The name of the author may not be used to endorse or promote products
0022  *    derived from this software without specific prior written permission.
0023  *
0024  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
0025  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
0026  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
0027  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
0028  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
0029  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
0030  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
0031  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0032  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
0033  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0034  */
0035
0036 /**
0037  * @defgroup i386_apci
0038  * @ingroup i386_pci
0039  * @brief Intel Architecture local and I/O APIC definitions
0040  * @{
0041  */
0042
0043 /*
0044  *  Header file for Intel Architecture local and I/O APIC definitions.
0045  *
0046  *  This file was created from information in the Intel Pentium Pro
0047  *  Family Developer's Manual, Volume 3: Operating System Writer's
0048  *  Manual, order number 242692-001, which can be ordered from the
0049  *  Intel literature center.
0050  */
0051
0052 #ifndef _APIC_H
0053 #define _APIC_H
0054
0055 /*
0056  *  APIC Defines.
0057  */
0058
0059 /*
0060  * Recommendation:  Don't use this except for MSI interrupt delivery.
0061  * In general, the "Destination Mode" can be used to control this, since
0062  * it is DIFFERENT (0xF) for Pentium and P6, but not on the same APIC
0063  * version for AMD Opteron.
0064  */
0065 #define APIC_BCAST_ID                           0xFF
0066
0067 /*
0068  *  APIC register definitions
0069  */
0070
0071 /*
0072  *  Shared defines for I/O and local APIC definitions
0073  */
0074 /** @brief APIC version register */
0075 #define APIC_VERSION(x)                         ((x) & 0xFF)
0076 #define APIC_MAXREDIR(x)                        (((x) >> 16) & 0xFF)
0077 /** @brief APIC id register */
0078 #define APIC_ID(x)                              ((x) >> 24)
0079 #define APIC_VER_NEW                            0x10
0080
0081 #define IOAPIC_REGSEL                           0
0082 #define IOAPIC_RW                               0x10
0083 #define         IOAPIC_ID                       0
0084 #define         IOAPIC_VER                      1
0085 #define         IOAPIC_REDIR                    0x10
0086
0087 #define LAPIC_ID                                0x20
0088 #define LAPIC_VER                               0x30
0089 #define LAPIC_TPR                               0x80
0090 #define LAPIC_APR                               0x90
0091 #define LAPIC_PPR                               0xA0
0092 #define LAPIC_EOI                               0xB0
0093 #define LAPIC_LDR                               0xD0
0094 #define LAPIC_DFR                               0xE0
0095 #define LAPIC_SPIV                              0xF0
0096 #define         LAPIC_SPIV_ENABLE_APIC          0x100
0097 #define LAPIC_ISR                               0x100
0098 #define LAPIC_TMR                               0x180
0099 #define LAPIC_IRR                               0x200
0100 #define LAPIC_ESR                               0x280
0101 #define LAPIC_ICR                               0x300
0102 #define   LAPIC_ICR_DS_SELF                     0x40000
0103 #define   LAPIC_ICR_DS_ALLINC                   0x80000
0104 #define   LAPIC_ICR_DS_ALLEX                    0xC0000
0105 #define   LAPIC_ICR_TM_LEVEL                    0x8000
0106 #define   LAPIC_ICR_LEVELASSERT                 0x4000
0107 #define   LAPIC_ICR_STATUS_PEND                 0x1000
0108 #define   LAPIC_ICR_DM_LOGICAL                  0x800
0109 #define   LAPIC_ICR_DM_LOWPRI                   0x100
0110 #define   LAPIC_ICR_DM_SMI                      0x200
0111 #define   LAPIC_ICR_DM_NMI                      0x400
0112 #define   LAPIC_ICR_DM_INIT                     0x500
0113 #define   LAPIC_ICR_DM_SIPI                     0x600
0114 #define LAPIC_LVTT                              0x320
0115 #define LAPIC_LVTPC                             0x340
0116 #define LAPIC_LVT0                              0x350
0117 #define LAPIC_LVT1                              0x360
0118 #define LAPIC_LVTE                              0x370
0119 #define LAPIC_TICR                              0x380
0120 #define LAPIC_TCCR                              0x390
0121 #define LAPIC_TDCR                              0x3E0
0122
0123 #endif  /* _APIC_H */
0124
0125 /** @} */