include/libcpu/spiRegs.h

0001 /*  Blackfin SPI Registers
0002  *
0003  *  Copyright (c) 2010 Kallisti Labs, Los Gatos, CA, USA
0004  *             written by Allan Hessenflow <allanh@kallisti.com>
0005  *
0006  *  The license and distribution terms for this file may be
0007  *  found in the file LICENSE in this distribution or at
0008  *  http://www.rtems.org/license/LICENSE.
0009  */
0010
0011 #ifndef _spiRegs_h_
0012 #define _spiRegs_h_
0013
0014
0015 /* register addresses */
0016
0017 #define SPI_CTL_OFFSET                                0x0000
0018 #define SPI_FLG_OFFSET                                0x0004
0019 #define SPI_STAT_OFFSET                               0x0008
0020 #define SPI_TDBR_OFFSET                               0x000c
0021 #define SPI_RDBR_OFFSET                               0x0010
0022 #define SPI_BAUD_OFFSET                               0x0014
0023 #define SPI_SHADOW_OFFSET                             0x0018
0024
0025
0026 /* register fields */
0027
0028 #define SPI_CTL_SPE                                   0x4000
0029 #define SPI_CTL_WOM                                   0x2000
0030 #define SPI_CTL_MSTR                                  0x1000
0031 #define SPI_CTL_CPOL                                  0x0800
0032 #define SPI_CTL_CPHA                                  0x0400
0033 #define SPI_CTL_LSBF                                  0x0200
0034 #define SPI_CTL_SIZE                                  0x0100
0035 #define SPI_CTL_EMISO                                 0x0020
0036 #define SPI_CTL_PSSE                                  0x0010
0037 #define SPI_CTL_GM                                    0x0008
0038 #define SPI_CTL_SZ                                    0x0004
0039 #define SPI_CTL_TIMOD_MASK                            0x0003
0040 #define SPI_CTL_TIMOD_RDBR                            0x0000
0041 #define SPI_CTL_TIMOD_TDBR                            0x0001
0042 #define SPI_CTL_TIMOD_DMA_RDBR                        0x0002
0043 #define SPI_CTL_TIMOD_DMA_TDBR                        0x0003
0044
0045 #define SPI_FLG_FLG7                                  0x8000
0046 #define SPI_FLG_FLG6                                  0x4000
0047 #define SPI_FLG_FLG5                                  0x2000
0048 #define SPI_FLG_FLG4                                  0x1000
0049 #define SPI_FLG_FLG3                                  0x0800
0050 #define SPI_FLG_FLG2                                  0x0400
0051 #define SPI_FLG_FLG1                                  0x0200
0052 #define SPI_FLG_FLS7                                  0x0080
0053 #define SPI_FLG_FLS6                                  0x0040
0054 #define SPI_FLG_FLS5                                  0x0020
0055 #define SPI_FLG_FLS4                                  0x0010
0056 #define SPI_FLG_FLS3                                  0x0008
0057 #define SPI_FLG_FLS2                                  0x0004
0058 #define SPI_FLG_FLS1                                  0x0002
0059
0060 #define SPI_STAT_TXCOL                                0x0040
0061 #define SPI_STAT_RXS                                  0x0020
0062 #define SPI_STAT_RBSY                                 0x0010
0063 #define SPI_STAT_TXS                                  0x0008
0064 #define SPI_STAT_TXE                                  0x0004
0065 #define SPI_STAT_MODF                                 0x0002
0066 #define SPI_STAT_SPIF                                 0x0001
0067
0068
0069 #endif /* _spiRegs_h_ */