include/libcpu/mmuRegs.h

0001 /*  Blackfin MMU Registers
0002  *
0003  *  Copyright (c) 2008 Kallisti Labs, Los Gatos, CA, USA
0004  *             written by Allan Hessenflow <allanh@kallisti.com>
0005  *
0006  *  The license and distribution terms for this file may be
0007  *  found in the file LICENSE in this distribution or at
0008  *  http://www.rtems.org/license/LICENSE.
0009  */
0010
0011 #ifndef _mmuRegs_h_
0012 #define _mmuRegs_h_
0013
0014 /* register addresses */
0015 #define DCPLB_ADDR0                               0xffe00100
0016 #define DCPLB_DATA0                               0xffe00200
0017 #define DCPLB_COUNT                                       16
0018 #define DCPLB_ADDR_PITCH                                   4
0019 #define DCPLB_DATA_PITCH                                   4
0020 #define ICPLB_ADDR0                               0xffe01100
0021 #define ICPLB_DATA0                               0xffe01200
0022 #define ICPLB_COUNT                                       16
0023 #define ICPLB_ADDR_PITCH                                   4
0024 #define ICPLB_DATA_PITCH                                   4
0025
0026
0027 /* register fields */
0028 #define DCPLB_DATA_PAGE_SIZE_MASK                 0x00030000
0029 #define DCPLB_DATA_PAGE_SIZE_1KB                  0x00000000
0030 #define DCPLB_DATA_PAGE_SIZE_4KB                  0x00010000
0031 #define DCPLB_DATA_PAGE_SIZE_1MB                  0x00020000
0032 #define DCPLB_DATA_PAGE_SIZE_4MB                  0x00030000
0033 #define DCPLB_DATA_CPLB_L1_AOW                    0x00008000
0034 #define DCPLB_DATA_CPLB_WT                        0x00004000
0035 #define DCPLB_DATA_CPLB_L1_CHBL                   0x00001000
0036 #define DCPLB_DATA_CPLB_DIRTY                     0x00000080
0037 #define DCPLB_DATA_CPLB_SUPV_WR                   0x00000010
0038 #define DCPLB_DATA_CPLB_USER_WR                   0x00000008
0039 #define DCPLB_DATA_CPLB_USER_RD                   0x00000004
0040 #define DCPLB_DATA_CPLB_LOCK                      0x00000002
0041 #define DCPLB_DATA_CPLB_VALID                     0x00000001
0042
0043 #define ICPLB_DATA_PAGE_SIZE_MASK                 0x00030000
0044 #define ICPLB_DATA_PAGE_SIZE_1KB                  0x00000000
0045 #define ICPLB_DATA_PAGE_SIZE_4KB                  0x00010000
0046 #define ICPLB_DATA_PAGE_SIZE_1MB                  0x00020000
0047 #define ICPLB_DATA_PAGE_SIZE_4MB                  0x00030000
0048 #define ICPLB_DATA_CPLB_L1_CHBL                   0x00001000
0049 #define ICPLB_DATA_CPLB_LRUPRIO                   0x00000100
0050 #define ICPLB_DATA_CPLB_USER_RD                   0x00000004
0051 #define ICPLB_DATA_CPLB_LOCK                      0x00000002
0052 #define ICPLB_DATA_CPLB_VALID                     0x00000001
0053
0054 #endif /* _mmuRegs_h_ */