include/libcpu/interrupt.h

0001 /*
0002  *  RTEMS support for Blackfin interrupt controller
0003  *
0004  *  COPYRIGHT (c) 2008 Kallisti Labs, Los Gatos, CA, USA
0005  *            written by Allan Hessenflow <allanh@kallisti.com>
0006  *
0007  *  The license and distribution terms for this file may be
0008  *  found in the file LICENSE in this distribution or at
0009  *  http://www.rtems.org/license/LICENSE.
0010  */
0011
0012 #ifndef _interrupt_h_
0013 #define _interrupt_h_
0014
0015 /* Some rules for using this module:
0016
0017    SIC_IARx registers must not be changed after calling
0018    bfin_interrupt_init().
0019
0020    The bfin_isr structures must stick around for as long as the isr is
0021    registered.
0022
0023    For any interrupt source (SIC bit) that could be shared, it is only
0024    safe to disable an ISR through this module if the ultimate source is
0025    also disabled (the ultimate source must be disabled prior to disabling
0026    it through this module, and must remain disabled until after enabling
0027    it through this module).
0028
0029    For any source that is shared with modules that cannot be disabled,
0030    give careful thought to the control of those interrupts.
0031    bfin_interrupt_enable_all() or bfin_interrupt_enable_global() can
0032    be used to help solve the problems caused by that.
0033
0034
0035    Note that this module does not provide prioritization.  It is assumed
0036    that the priorities afforded by the CEC are sufficient.  If finer
0037    grained priority control is required then this wlll need to be
0038    redesigned.
0039 */
0040
0041
0042 #ifdef __cplusplus
0043 extern "C" {
0044 #endif
0045
0046 /* source is the source to the SIC (the bit number in SIC_ISR).  isr is
0047    the function that will be called when the interrupt is active. */
0048 typedef struct bfin_isr_s {
0049   int source;
0050   void (*isr)(int source);
0051   /* the following are for internal use only */
0052   uint32_t mask;
0053   int vector;
0054   struct bfin_isr_s *next;
0055 } bfin_isr_t;
0056
0057 /* If non-default mapping is desired, the BSP should set the SIC_IARx
0058    registers prior to calling this. */
0059 void bfin_interrupt_init(void);
0060
0061 /* ISR starts out disabled */
0062 void bfin_interrupt_register(bfin_isr_t *isr);
0063 void bfin_interrupt_unregister(bfin_isr_t *isr);
0064
0065 /* enable/disable specific ISR */
0066 void bfin_interrupt_enable(bfin_isr_t *isr, bool enable);
0067
0068 /* atomically enable/disable all ISRs attached to specified source */
0069 void bfin_interrupt_enable_all(int source, bool enable);
0070
0071 /* disable a source independently of the individual ISR enables (starts
0072    out all enabled) */
0073 void bfin_interrupt_enable_global(int source, bool enable);
0074
0075 #ifdef __cplusplus
0076 }
0077 #endif
0078
0079 #endif /* _interrupt_h_ */
0080