eZKit533/start/bspstart.c

0001 /*  bspstart.c for eZKit533
0002  *
0003  *  This routine does the bulk of the system initialisation.
0004  */
0005
0006 /*
0007  *  Copyright (c) 2006 by Atos Automacao Industrial Ltda.
0008  *             written by Alain Schaefer <alain.schaefer@easc.ch>
0009  *                    and Antonio Giovanini <antonio@atos.com.br>
0010  *
0011  *  The license and distribution terms for this file may be
0012  *  found in the file LICENSE in this distribution or at
0013  *  http://www.rtems.org/license/LICENSE.
0014  */
0015
0016 #include <bsp.h>
0017 #include <bsp/bootcard.h>
0018 #include <cplb.h>
0019 #include <libcpu/interrupt.h>
0020 #include <rtems/sysinit.h>
0021
0022 const unsigned int dcplbs_table[16][2] = {
0023   { 0xFFA00000,   (PAGE_SIZE_1MB | CPLB_D_PAGE_MGMT | CPLB_WT) },
0024   { 0xFF900000,   (PAGE_SIZE_1MB | CPLB_D_PAGE_MGMT | CPLB_WT) }, /* L1 Data B */
0025   { 0xFF800000,   (PAGE_SIZE_1MB | CPLB_D_PAGE_MGMT | CPLB_WT) }, /* L1 Data A */
0026   { 0xFFB00000,   (PAGE_SIZE_1MB | CPLB_DNOCACHE) },
0027   { 0x20300000,   (PAGE_SIZE_1MB | CPLB_DNOCACHE) },      /* Async Memory Bank 3 */
0028   { 0x20200000,   (PAGE_SIZE_1MB | CPLB_DNOCACHE) },      /* Async Memory Bank 2 (Secnd)  */
0029   { 0x20100000,   (PAGE_SIZE_1MB | CPLB_DNOCACHE) },      /* Async Memory Bank 1 (Prim B) */
0030   { 0x20000000,   (PAGE_SIZE_1MB | CPLB_DNOCACHE) },      /* Async Memory Bank 0 (Prim A) */
0031
0032   { 0x02400000,   (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
0033   { 0x02000000,   (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
0034   { 0x00C00000,   (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
0035   { 0x00800000,   (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
0036   { 0x00400000,   (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
0037   { 0x00000000,   (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
0038   { 0xffffffff, 0xffffffff }                 /* end of section - termination */
0039
0040 };
0041
0042
0043 const unsigned int _icplbs_table[16][2] = {
0044   { 0xFFA00000,   (PAGE_SIZE_1MB | CPLB_I_PAGE_MGMT | CPLB_I_PAGE_MGMT | 0x4) },  /* L1 Code */
0045   { 0xEF000000,   (PAGE_SIZE_1MB | CPLB_INOCACHE) },      /* AREA DE BOOT */
0046   { 0xFFB00000,   (PAGE_SIZE_1MB | CPLB_INOCACHE) },
0047   { 0x20300000,   (PAGE_SIZE_1MB | CPLB_INOCACHE) },      /* Async Memory Bank 3 */
0048   { 0x20200000,   (PAGE_SIZE_1MB | CPLB_INOCACHE) },      /* Async Memory Bank 2 (Secnd) */
0049   { 0x20100000,   (PAGE_SIZE_1MB | CPLB_INOCACHE) },      /* Async Memory Bank 1 (Prim B) */
0050   { 0x20000000,   (PAGE_SIZE_1MB | CPLB_INOCACHE) },      /* Async Memory Bank 0 (Prim A) */
0051
0052   { 0x02400000,   (PAGE_SIZE_4MB | CPLB_INOCACHE) },
0053   { 0x02000000,   (PAGE_SIZE_4MB | CPLB_INOCACHE) },
0054   { 0x00C00000,   (PAGE_SIZE_4MB | CPLB_INOCACHE) },
0055   { 0x00800000,   (PAGE_SIZE_4MB | CPLB_INOCACHE) },
0056   { 0x00400000,   (PAGE_SIZE_4MB | CPLB_INOCACHE) },
0057   { 0x00000000,   (PAGE_SIZE_4MB | CPLB_INOCACHE) },
0058   { 0xffffffff, 0xffffffff }               /* end of section - termination */
0059
0060 };
0061
0062 /*
0063  * Init_PLL
0064  *
0065  * Routine to initialize the PLL. The Ezkit uses a 27 Mhz XTAL.
0066  * See "../eZKit533/include/bsp.h" for more information.
0067  */
0068 static void Init_PLL (void)
0069 {
0070   unsigned int n;
0071
0072   /* Configure PLL registers */
0073   *((uint16_t*)PLL_LOCKCNT) = 0x1000;
0074   *((uint16_t*)PLL_DIV) = PLL_CSEL|PLL_SSEL;
0075   *((uint16_t*)PLL_CTL) = PLL_MSEL|PLL_DF;
0076
0077   /* Commands to set PLL values */
0078   __asm__ ("cli r0;");
0079   __asm__ ("idle;");
0080   __asm__ ("sti r0;");
0081
0082   /* Delay for PLL stabilization */
0083   for (n=0; n<200; n++) {}
0084 }
0085
0086 /*
0087  * Init_EBIU
0088  *
0089  * Configure extern memory
0090  */
0091 static void Init_EBIU (void)
0092 {
0093   /* Configure FLASH */
0094   *((uint32_t*)EBIU_AMBCTL0)  = 0x7bb07bb0L;
0095   *((uint32_t*)EBIU_AMBCTL1)  = 0x7bb07bb0L;
0096   *((uint16_t*)EBIU_AMGCTL)   = 0x000f;
0097
0098   /* Configure SDRAM
0099   *((uint32_t*)EBIU_SDGCTL) = 0x0091998d;
0100   *((uint16_t*)EBIU_SDBCTL) = 0x0013;
0101   *((uint16_t*)EBIU_SDRRC)  = 0x0817;
0102   */
0103 }
0104
0105 /*
0106  * Init_Flags
0107  *
0108  * Enable LEDs port
0109  */
0110 static void Init_Flags(void)
0111 {
0112   *((uint16_t*)FIO_INEN)    = 0x0100;
0113   *((uint16_t*)FIO_DIR)     = 0x0000;
0114   *((uint16_t*)FIO_EDGE)    = 0x0100;
0115   *((uint16_t*)FIO_MASKA_D) = 0x0100;
0116
0117   *((uint8_t*)FlashA_PortB_Dir)  = 0x3f;
0118   *((uint8_t*)FlashA_PortB_Data) = 0x00;
0119 }
0120
0121 RTEMS_SYSINIT_ITEM(
0122   bfin_interrupt_init,
0123   RTEMS_SYSINIT_BSP_PRE_DRIVERS,
0124   RTEMS_SYSINIT_ORDER_MIDDLE
0125 );
0126
0127 void bsp_start( void )
0128 {
0129   /* BSP Hardware Initialization*/
0130   Init_RTC();   /* Blackfin Real Time Clock initialization */
0131   Init_PLL();   /* PLL initialization */
0132   Init_EBIU();  /* EBIU initialization */
0133   Init_Flags(); /* GPIO initialization */
0134
0135   int i=0;
0136   for (i=5;i<16;i++) {
0137     set_vector((rtems_isr_entry)bfin_null_isr, i, 1);
0138   }
0139 }
0140
0141 /*
0142  * Helper Function to use the EzKits LEDS.
0143  * Can be used by the Application.
0144  */
0145 void setLED (uint8_t value)
0146 {
0147   *((uint8_t*)FlashA_PortB_Data) = value;
0148 }
0149
0150 /*
0151  * Helper Function to use the EzKits LEDS
0152  */
0153 uint8_t getLED (void)
0154 {
0155   return *((uint8_t*)FlashA_PortB_Data);
0156 }