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File indexing completed on 2025-05-11 08:23:40

0001 /*
0002  * SPDX-License-Identifier: BSD-2-Clause
0003  *
0004  * Copyright (C) 2013 embedded brains GmbH & Co. KG
0005  *
0006  * Copyright (C) 2019 DornerWorks
0007  *
0008  * Written by Jeff Kubascik <jeff.kubascik@dornerworks.com>
0009  *        and Josh Whitehead <josh.whitehead@dornerworks.com>
0010  *
0011  * Redistribution and use in source and binary forms, with or without
0012  * modification, are permitted provided that the following conditions
0013  * are met:
0014  * 1. Redistributions of source code must retain the above copyright
0015  *    notice, this list of conditions and the following disclaimer.
0016  * 2. Redistributions in binary form must reproduce the above copyright
0017  *    notice, this list of conditions and the following disclaimer in the
0018  *    documentation and/or other materials provided with the distribution.
0019  *
0020  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0021  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0022  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0023  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0024  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0025  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0026  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0027  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0028  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0029  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0030  * POSSIBILITY OF SUCH DAMAGE.
0031  */
0032 
0033 #define ARM_CP15_TEXT_SECTION BSP_START_TEXT_SECTION
0034 
0035 #include <bsp.h>
0036 #include <bsp/start.h>
0037 #include <bsp/arm-cp15-start.h>
0038 #include <bsp/arm-a9mpcore-start.h>
0039 
0040 BSP_START_DATA_SECTION static const arm_cp15_start_section_config
0041 zynqmp_mmu_config_table[] = {
0042   ARMV7_CP15_START_DEFAULT_SECTIONS,
0043 #if defined(RTEMS_SMP)
0044   {
0045     .begin = 0xffff0000U,
0046     .end = 0xffffffffU,
0047     .flags = ARMV7_MMU_DEVICE
0048   },
0049 #endif
0050   {
0051     .begin = 0xf9000000U,
0052     .end = 0xf9100000U,
0053     .flags = ARMV7_MMU_DEVICE
0054   }, {
0055     .begin = 0xfd000000U,
0056     .end = 0xffc00000U,
0057     .flags = ARMV7_MMU_DEVICE
0058   }
0059 };
0060 
0061 /*
0062  * Make weak and let the user override.
0063  */
0064 BSP_START_TEXT_SECTION void zynqmp_setup_mmu_and_cache(void) __attribute__ ((weak));
0065 
0066 BSP_START_TEXT_SECTION void zynqmp_setup_mmu_and_cache(void)
0067 {
0068   uint32_t ctrl = arm_cp15_start_setup_mmu_and_cache(
0069     ARM_CP15_CTRL_TRE | ARM_CP15_CTRL_A,
0070     ARM_CP15_CTRL_AFE | ARM_CP15_CTRL_Z
0071   );
0072 
0073   arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache(
0074     ctrl,
0075     (uint32_t *) bsp_translation_table_base,
0076     ARM_MMU_DEFAULT_CLIENT_DOMAIN,
0077     &zynqmp_mmu_config_table[0],
0078     RTEMS_ARRAY_SIZE(zynqmp_mmu_config_table)
0079   );
0080 }