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File indexing completed on 2025-05-11 08:23:39
0001 /** 0002 * @file 0003 * @ingroup zynqmp_interrupt 0004 * @brief Interrupt definitions. 0005 */ 0006 0007 /* 0008 * SPDX-License-Identifier: BSD-2-Clause 0009 * 0010 * Copyright (C) 2013 embedded brains GmbH & Co. KG 0011 * 0012 * Copyright (C) 2019 DornerWorks 0013 * 0014 * Written by Jeff Kubascik <jeff.kubascik@dornerworks.com> 0015 * and Josh Whitehead <josh.whitehead@dornerworks.com> 0016 * 0017 * Redistribution and use in source and binary forms, with or without 0018 * modification, are permitted provided that the following conditions 0019 * are met: 0020 * 1. Redistributions of source code must retain the above copyright 0021 * notice, this list of conditions and the following disclaimer. 0022 * 2. Redistributions in binary form must reproduce the above copyright 0023 * notice, this list of conditions and the following disclaimer in the 0024 * documentation and/or other materials provided with the distribution. 0025 * 0026 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 0027 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 0028 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 0029 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 0030 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 0031 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 0032 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 0033 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 0034 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 0035 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 0036 * POSSIBILITY OF SUCH DAMAGE. 0037 */ 0038 0039 #ifndef LIBBSP_ARM_XILINX_ZYNQMP_IRQ_H 0040 #define LIBBSP_ARM_XILINX_ZYNQMP_IRQ_H 0041 0042 #ifndef ASM 0043 0044 #include <rtems/irq.h> 0045 #include <rtems/irq-extension.h> 0046 0047 #include <dev/irq/arm-gic-irq.h> 0048 0049 #ifdef __cplusplus 0050 extern "C" { 0051 #endif /* __cplusplus */ 0052 0053 /** 0054 * @defgroup zynqmp_interrupt Interrupt Support 0055 * @ingroup RTEMSBSPsARMZynqMP 0056 * @brief Interrupt Support 0057 * @{ 0058 */ 0059 0060 /* PPIs */ 0061 #define ZYNQMP_IRQ_HYP_TIMER 26 0062 #define ZYNQMP_IRQ_VIRT_TIMER 27 0063 #define ZYNQMP_IRQ_S_PHYS_TIMER 29 0064 #define ZYNQMP_IRQ_NS_PHYS_TIMER 30 0065 0066 /* SPIs */ 0067 #define ZYNQMP_IRQ_UART_0 53 0068 #define ZYNQMP_IRQ_UART_1 54 0069 0070 #define BSP_INTERRUPT_VECTOR_COUNT 188 0071 0072 /** @} */ 0073 0074 #ifdef __cplusplus 0075 } 0076 #endif /* __cplusplus */ 0077 0078 #endif /* ASM */ 0079 0080 #endif /* LIBBSP_ARM_XILINX_ZYNQMP_IRQ_H */
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