xilinx-zynqmp-rpu/start/mpu-config.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsARMZynqMPRPU
0007  *
0008  * @brief This source file contains the implementation of
0009  * zynqmp_setup_mpu_and_cache().
0010  */
0011
0012 /*
0013  * Copyright (C) 2023 Reflex Aerospace GmbH
0014  *
0015  * Written by Philip Kirkpatrick <p.kirkpatrick@reflexaerospace.com>
0016  *
0017  * Redistribution and use in source and binary forms, with or without
0018  * modification, are permitted provided that the following conditions
0019  * are met:
0020  * 1. Redistributions of source code must retain the above copyright
0021  *    notice, this list of conditions and the following disclaimer.
0022  * 2. Redistributions in binary form must reproduce the above copyright
0023  *    notice, this list of conditions and the following disclaimer in the
0024  *    documentation and/or other materials provided with the distribution.
0025  *
0026  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0027  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0028  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0029  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0030  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0031  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0032  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0033  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0034  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0035  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0036  * POSSIBILITY OF SUCH DAMAGE.
0037  */
0038
0039 #include <bsp/memory.h>
0040 #include <bsp/start.h>
0041
0042 BSP_START_DATA_SECTION const ARMV7_PMSA_Region
0043 zynqmp_mpu_regions[] = {
0044   {
0045     .begin = (uintptr_t)zynqmp_memory_atcm_begin,
0046     .size = (uintptr_t)zynqmp_memory_atcm_size,
0047     .attributes = ARMV7_PMSA_READ_WRITE_UNCACHED
0048   }, {
0049     .begin = (uintptr_t)zynqmp_memory_btcm_begin,
0050     .size = (uintptr_t)zynqmp_memory_btcm_size,
0051     .attributes = ARMV7_PMSA_READ_WRITE_UNCACHED
0052   }, {
0053     .begin = (uintptr_t)zynqmp_memory_ddr_begin,
0054     .size = (uintptr_t)zynqmp_memory_ddr_size,
0055     .attributes = ARMV7_PMSA_READ_WRITE_CACHED
0056   }, {
0057     .begin = (uintptr_t)zynqmp_memory_devpl_begin,
0058     .size = (uintptr_t)zynqmp_memory_devpl_size,
0059     .attributes = ARMV7_PMSA_SHAREABLE_DEVICE
0060   }, {
0061     .begin = (uintptr_t)zynqmp_memory_devps_begin,
0062     .size = (uintptr_t)zynqmp_memory_devps_size,
0063     .attributes = ARMV7_PMSA_NON_SHAREABLE_DEVICE
0064   }, {
0065     .begin = (uintptr_t)zynqmp_memory_ocm_begin,
0066     .size = (uintptr_t)zynqmp_memory_ocm_size,
0067     .attributes = ARMV7_PMSA_NON_SHAREABLE_DEVICE
0068   }, {
0069     .begin = (uintptr_t)zynqmp_memory_nocache_begin,
0070     .size = (uintptr_t)zynqmp_memory_nocache_size,
0071     .attributes = ARMV7_PMSA_READ_WRITE_UNCACHED
0072   }
0073 };
0074
0075 BSP_START_DATA_SECTION const size_t
0076 zynqmp_mpu_region_count = RTEMS_ARRAY_SIZE(zynqmp_mpu_regions);