xilinx-zynqmp-rpu/start/bspstarthooks.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsARMZynqMPRPU
0007  *
0008  * @brief This source file contains the implementation of bsp_start_hook_0().
0009  */
0010
0011 /*
0012  * Copyright (C) 2024 embedded brains GmbH & Co. KG
0013  * Copyright (C) 2023 Reflex Aerospace GmbH
0014  *
0015  * Redistribution and use in source and binary forms, with or without
0016  * modification, are permitted provided that the following conditions
0017  * are met:
0018  * 1. Redistributions of source code must retain the above copyright
0019  *    notice, this list of conditions and the following disclaimer.
0020  * 2. Redistributions in binary form must reproduce the above copyright
0021  *    notice, this list of conditions and the following disclaimer in the
0022  *    documentation and/or other materials provided with the distribution.
0023  *
0024  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0025  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0026  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0027  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0028  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0029  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0030  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0031  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0032  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0033  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0034  * POSSIBILITY OF SUCH DAMAGE.
0035  */
0036
0037 #include <bsp/start.h>
0038
0039 #define ARM_CP15_TEXT_SECTION BSP_START_TEXT_SECTION
0040 #define ARMV7_PMSA_TEXT_SECTION BSP_START_TEXT_SECTION
0041
0042 #include <bsp/memory.h>
0043 #include <libcpu/arm-cp15.h>
0044
0045 BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
0046 {
0047   /* Do nothing */
0048 }
0049
0050 BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
0051 {
0052   uint32_t index = 0;
0053
0054   for (size_t i = 0; i < zynqmp_mpu_region_count; ++i) {
0055     const ARMV7_PMSA_Region *region = &zynqmp_mpu_regions[i];
0056     index = _ARMV7_PMSA_Add_regions(
0057       index,
0058       region->begin,
0059       region->size,
0060       region->attributes
0061     );
0062   }
0063
0064   arm_cp15_instruction_cache_invalidate();
0065   arm_cp15_data_cache_all_invalidate();
0066   _ARM_Data_synchronization_barrier();
0067   _ARM_Instruction_synchronization_barrier();
0068
0069   uint32_t control = arm_cp15_get_control();
0070   control &= ~ARM_CP15_CTRL_A;
0071   control &= ~ARM_CP15_CTRL_V;
0072   control |= ARM_CP15_CTRL_M;
0073   control |= ARM_CP15_CTRL_C;
0074   control |= ARM_CP15_CTRL_I;
0075   control |= ARM_CP15_CTRL_Z;
0076   arm_cp15_set_control(control);
0077   _ARM_Data_synchronization_barrier();
0078   _ARM_Instruction_synchronization_barrier();
0079
0080   bsp_start_clear_bss();
0081 }