xilinx-zynqmp-rpu/start/bspreset.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsARMZynqMPRPU
0007  *
0008  * @brief This source file contains the implementation of bsp_reset().
0009  */
0010
0011 /*
0012  * Copyright (C) 2024 embedded brains GmbH & Co. KG
0013  * Copyright (C) 2023 Reflex Aerospace GmbH
0014  *
0015  * Redistribution and use in source and binary forms, with or without
0016  * modification, are permitted provided that the following conditions
0017  * are met:
0018  * 1. Redistributions of source code must retain the above copyright
0019  *    notice, this list of conditions and the following disclaimer.
0020  * 2. Redistributions in binary form must reproduce the above copyright
0021  *    notice, this list of conditions and the following disclaimer in the
0022  *    documentation and/or other materials provided with the distribution.
0023  *
0024  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0025  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0026  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0027  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0028  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0029  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0030  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0031  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0032  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0033  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0034  * POSSIBILITY OF SUCH DAMAGE.
0035  */
0036
0037 #include <bsp.h>
0038 #include <bsp/bootcard.h>
0039
0040 void bsp_reset( rtems_fatal_source source, rtems_fatal_code code )
0041 {
0042   /* CRL_APB_RESET_CTRL */
0043   volatile uint32_t *reset_ctrl = (volatile uint32_t *) 0xff5e0218;
0044
0045   (void) source;
0046   (void) code;
0047
0048   zynqmp_debug_console_flush();
0049
0050   /*
0051    * This is a workaround for:
0052    *
0053    * https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108658
0054    */
0055   __asm__ volatile ("");
0056
0057   while (true) {
0058     /*
0059      * Request a soft system reset.  This is a system-level reset which is the
0060      * equivalent to asserting the external PS_SRST_B reset signal pin.
0061      */
0062     *reset_ctrl |= UINT32_C(0x10);
0063   }
0064 }