include/bsp/irq.h

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsARMZynqMPRPU
0007  *
0008  * @brief This header file provides BSP-specific interrupt interfaces.
0009  */
0010
0011 /*
0012  * Copyright (C) 2024 embedded brains GmbH & Co. KG
0013  * Copyright (C) 2023 Reflex Aerospace GmbH
0014  *
0015  * Redistribution and use in source and binary forms, with or without
0016  * modification, are permitted provided that the following conditions
0017  * are met:
0018  * 1. Redistributions of source code must retain the above copyright
0019  *    notice, this list of conditions and the following disclaimer.
0020  * 2. Redistributions in binary form must reproduce the above copyright
0021  *    notice, this list of conditions and the following disclaimer in the
0022  *    documentation and/or other materials provided with the distribution.
0023  *
0024  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0025  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0026  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0027  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0028  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0029  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0030  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0031  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0032  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0033  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0034  * POSSIBILITY OF SUCH DAMAGE.
0035  */
0036
0037 #ifndef LIBBSP_ARM_XILINX_ZYNQMP_RPU_IRQ_H
0038 #define LIBBSP_ARM_XILINX_ZYNQMP_RPU_IRQ_H
0039
0040 #ifndef ASM
0041
0042 #include <rtems.h>
0043
0044 #include <bspopts.h>
0045 #include <dev/irq/arm-gic-irq.h>
0046 #include <peripheral_maps/xilinx_zynqmp.h>
0047
0048 #ifdef __cplusplus
0049 extern "C" {
0050 #endif /* __cplusplus */
0051
0052 #ifndef ZYNQMP_RPU_LOCK_STEP_MODE
0053 #define BSP_IRQ_HAVE_GET_SET_AFFINITY
0054 #endif
0055
0056 #define BSP_INTERRUPT_VECTOR_COUNT 188
0057
0058 /** @} */
0059
0060 #ifdef __cplusplus
0061 }
0062 #endif /* __cplusplus */
0063
0064 #endif /* ASM */
0065
0066 #endif /* LIBBSP_ARM_XILINX_ZYNQMP_RPU_IRQ_H */