xilinx-zynq/start/bspstartmmu.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsARMZynq
0007  *
0008  * @brief This source file contains the implementation of
0009  *   zynq_setup_mmu_and_cache().
0010  */
0011
0012 /*
0013  * Copyright (C) 2013 embedded brains GmbH & Co. KG
0014  *
0015  * Redistribution and use in source and binary forms, with or without
0016  * modification, are permitted provided that the following conditions
0017  * are met:
0018  * 1. Redistributions of source code must retain the above copyright
0019  *    notice, this list of conditions and the following disclaimer.
0020  * 2. Redistributions in binary form must reproduce the above copyright
0021  *    notice, this list of conditions and the following disclaimer in the
0022  *    documentation and/or other materials provided with the distribution.
0023  *
0024  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0025  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0026  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0027  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0028  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0029  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0030  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0031  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0032  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0033  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0034  * POSSIBILITY OF SUCH DAMAGE.
0035  */
0036
0037 #define ARM_CP15_TEXT_SECTION BSP_START_TEXT_SECTION
0038
0039 #include <bsp.h>
0040 #include <bsp/start.h>
0041 #include <bsp/arm-cp15-start.h>
0042 #include <bsp/arm-a9mpcore-start.h>
0043
0044 BSP_START_DATA_SECTION static const arm_cp15_start_section_config
0045 zynq_mmu_config_table[] = {
0046   ARMV7_CP15_START_DEFAULT_SECTIONS,
0047 #if defined(RTEMS_SMP)
0048   {
0049     .begin = 0xffff0000U,
0050     .end = 0xffffffffU,
0051     .flags = ARMV7_MMU_DEVICE
0052   },
0053 #endif
0054   {
0055     .begin = 0xe0000000U,
0056     .end = 0xe0200000U,
0057     .flags = ARMV7_MMU_DEVICE
0058   }, {
0059     .begin = 0xf8000000U,
0060     .end = 0xf9000000U,
0061     .flags = ARMV7_MMU_DEVICE
0062   }
0063 };
0064
0065 /*
0066  * Make weak and let the user override.
0067  */
0068 BSP_START_TEXT_SECTION void zynq_setup_mmu_and_cache(void) __attribute__ ((weak));
0069
0070 BSP_START_TEXT_SECTION void zynq_setup_mmu_and_cache(void)
0071 {
0072   uint32_t ctrl = arm_cp15_start_setup_mmu_and_cache(
0073     ARM_CP15_CTRL_A,
0074     ARM_CP15_CTRL_AFE | ARM_CP15_CTRL_Z
0075   );
0076
0077   arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache(
0078     ctrl,
0079     (uint32_t *) bsp_translation_table_base,
0080     ARM_MMU_DEFAULT_CLIENT_DOMAIN,
0081     &zynq_mmu_config_table[0],
0082     RTEMS_ARRAY_SIZE(zynq_mmu_config_table)
0083   );
0084 }