xilinx-zynq/start/bspstarthooks.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsARMZynq
0007  *
0008  * @brief This source file contains the implementation of bsp_start_hook_0()
0009  *   and bsp_start_hook_1().
0010  */
0011
0012 /*
0013  * Copyright (C) 2013, 2014 embedded brains GmbH & Co. KG
0014  *
0015  * Redistribution and use in source and binary forms, with or without
0016  * modification, are permitted provided that the following conditions
0017  * are met:
0018  * 1. Redistributions of source code must retain the above copyright
0019  *    notice, this list of conditions and the following disclaimer.
0020  * 2. Redistributions in binary form must reproduce the above copyright
0021  *    notice, this list of conditions and the following disclaimer in the
0022  *    documentation and/or other materials provided with the distribution.
0023  *
0024  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0025  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0026  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0027  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0028  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0029  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0030  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0031  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0032  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0033  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0034  * POSSIBILITY OF SUCH DAMAGE.
0035  */
0036
0037 #define ARM_CP15_TEXT_SECTION BSP_START_TEXT_SECTION
0038
0039 #include <bsp.h>
0040 #include <bsp/start.h>
0041 #include <bsp/arm-a9mpcore-start.h>
0042
0043 BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
0044 {
0045   /* CLOCK_DRIVER_USE_ONLY_BOOT_PROCESSOR is an indicator for QEMU BSPs */
0046 #if defined(CLOCK_DRIVER_USE_ONLY_BOOT_PROCESSOR) && defined(RTEMS_SMP)
0047   uint32_t cpu_id = arm_cortex_a9_get_multiprocessor_cpu_id();
0048
0049   /* QEMU starts both cores, so wait until this core is intended to start. */
0050   if (cpu_id != 0) {
0051     volatile uint32_t *kick_address = (uint32_t *)0xfffffff0;
0052     while (*kick_address == 0) {
0053       _ARM_Wait_for_event();
0054     }
0055   }
0056 #endif
0057   arm_a9mpcore_start_hook_0();
0058 }
0059
0060 BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
0061 {
0062   arm_a9mpcore_start_hook_1();
0063   bsp_start_copy_sections();
0064   zynq_setup_mmu_and_cache();
0065
0066 #if !defined(RTEMS_SMP) \
0067   && (defined(BSP_DATA_CACHE_ENABLED) \
0068     || defined(BSP_INSTRUCTION_CACHE_ENABLED))
0069   /* Enable unified L2 cache */
0070   rtems_cache_enable_data();
0071 #endif
0072
0073   bsp_start_clear_bss();
0074 }