dev/spi/zynq-qspi-flash-defs.h

0001 /*
0002  * Copyright (C) 2024 Contemporary Software
0003  *
0004  * Redistribution and use in source and binary forms, with or without
0005  * modification, are permitted provided that the following conditions
0006  * are met:
0007  * 1. Redistributions of source code must retain the above copyright
0008  *    notice, this list of conditions and the following disclaimer.
0009  * 2. Redistributions in binary form must reproduce the above copyright
0010  *    notice, this list of conditions and the following disclaimer in the
0011  *    documentation and/or other materials provided with the distribution.
0012  *
0013  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS AS IS
0014  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0015  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0016  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0017  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0018  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0019  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0020  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0021  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0022  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0023  * POSSIBILITY OF SUCH DAMAGE.
0024  */
0025
0026 #if !defined(_ZYNQ_QSPI_FLASH_DEFS_H_)
0027 #define _ZYNQ_QSPI_FLASH_DEFS_H_
0028
0029 #include <dev/spi/zynq-qspi-flash.h>
0030
0031 #define ZQSPI_QSPI_BASE 0xE000D000
0032
0033 /*
0034  * Flash commands.
0035  */
0036
0037 #define ZQSPI_FLASH_COMMAND_SIZE      1
0038 #if ZQSPI_FLASH_4BYTE_ADDRESSING
0039  #define ZQSPI_FLASH_ADDRESS_SIZE     4
0040  #define ZQSPI_FLASH_WRITE_CMD        0x12
0041  #if ZQSPI_FLASH_FAST_READ
0042   #define ZQSPI_FLASH_READ_CMD        0x0c
0043  #else
0044   #define ZQSPI_FLASH_READ_CMD        0x13
0045  #endif
0046  #define ZQSPI_FLASH_SEC_ERASE_CMD    0xDC
0047 #else
0048  #define ZQSPI_FLASH_ADDRESS_SIZE     3
0049  #define ZQSPI_FLASH_WRITE_CMD        0x02
0050  #if ZQSPI_FLASH_FAST_READ
0051   #define ZQSPI_FLASH_READ_CMD        0x0b
0052  #else
0053   #define ZQSPI_FLASH_READ_CMD        0x03
0054  #endif
0055  #define ZQSPI_FLASH_SEC_ERASE_CMD    0xD8
0056 #endif
0057
0058 #define ZQSPI_FLASH_READ_CONFIG_CMD       0x35
0059 #define ZQSPI_FLASH_WRITE_STATUS_CMD      0x01
0060 #define ZQSPI_FLASH_WRITE_DISABLE_CMD     0x04
0061 #define ZQSPI_FLASH_READ_STATUS_CMD       0x05
0062 #define ZQSPI_FLASH_WRITE_DISABLE_CMD     0x04
0063 #define ZQSPI_FLASH_WRITE_ENABLE_CMD      0x06
0064 #define ZQSPI_FLASH_BULK_ERASE_CMD        0xC7
0065 #define ZQSPI_FLASH_READ_ID               0x9F
0066
0067 #define ZQSPI_FLASH_READ_STATUS_FLAG_CMD  0x05
0068
0069 /*
0070  * QSPI registers.
0071  */
0072 #define ZQSPI_QSPI_REG_CONFIG           0x00000000
0073 #define ZQSPI_QSPI_REG_INTR_STATUS      0x00000004
0074 #define ZQSPI_QSPI_REG_INTR_ENABLE      0x00000008
0075 #define ZQSPI_QSPI_REG_INTR_DISABLE     0x0000000c
0076 #define ZQSPI_QSPI_REG_INTR_MASK        0x00000010
0077 #define ZQSPI_QSPI_REG_EN               0x00000014
0078 #define ZQSPI_QSPI_REG_DELAY            0x00000018
0079 #define ZQSPI_QSPI_REG_TXD0             0x0000001c
0080 #define ZQSPI_QSPI_REG_RX_DATA          0x00000020
0081 #define ZQSPI_QSPI_REG_SLAVE_IDLE_COUNT 0x00000024
0082 #define ZQSPI_QSPI_REG_TX_THRES         0x00000028
0083 #define ZQSPI_QSPI_REG_RX_THRES         0x0000002c
0084 #define ZQSPI_QSPI_REG_GPIO             0x00000030
0085 #define ZQSPI_QSPI_REG_LPBK_DLY_ADJ     0x00000038
0086 #define ZQSPI_QSPI_REG_TXD1             0x00000080
0087 #define ZQSPI_QSPI_REG_TXD2             0x00000084
0088 #define ZQSPI_QSPI_REG_TXD3             0x00000088
0089 #define ZQSPI_QSPI_REG_LSPI_CFG         0x000000a0
0090 #define ZQSPI_QSPI_REG_LSPI_STS         0x000000a4
0091 #define ZQSPI_QSPI_REG_MOD_ID           0x000000fc
0092
0093 /*
0094  * TX FIFO depth in words.
0095  */
0096 #define ZQSPI_QSPI_FIFO_DEPTH   (63)
0097
0098 /*
0099  * Control register.
0100  */
0101 #define ZQSPI_QSPI_CR_HOLDB_DR        (1 << 19)
0102 #define ZQSPI_QSPI_CR_MANSTRT         (1 << 16)
0103 #define ZQSPI_QSPI_CR_MANSTRTEN       (1 << 15)
0104 #define ZQSPI_QSPI_CR_SSFORCE         (1 << 14)
0105 #define ZQSPI_QSPI_CR_PCS             (1 << 10)
0106 #define ZQSPI_QSPI_CR_BAUD_RATE_DIV_2 (0 << 3)
0107 #define ZQSPI_QSPI_CR_BAUD_RATE_DIV_4 (1 << 3)
0108 #define ZQSPI_QSPI_CR_BAUD_RATE_DIV_8 (2 << 3)
0109 #define ZQSPI_QSPI_CR_MODE_SEL        (1 << 0)
0110
0111 /*
0112  * Fast clock rate of 100MHz for fast reads.
0113  */
0114 #define ZQSPI_QSPI_CR_BAUD_RATE_FAST ZQSPI_QSPI_CR_BAUD_RATE_DIV_2
0115
0116 /*
0117  * Status register.
0118  */
0119 #define ZQSPI_QSPI_IXR_TXUF      (1 << 6)
0120 #define ZQSPI_QSPI_IXR_RXFULL    (1 << 5)
0121 #define ZQSPI_QSPI_IXR_RXNEMPTY  (1 << 4)
0122 #define ZQSPI_QSPI_IXR_TXFULL    (1 << 3)
0123 #define ZQSPI_QSPI_IXR_TXOW      (1 << 2)
0124 #define ZQSPI_QSPI_INTR_RXOVR    (1 << 0)
0125
0126 /*
0127  * Enable register.
0128  */
0129 #define ZQSPI_QSPI_EN_SPI_ENABLE  (1 << 0)
0130
0131 /*
0132  * Clock rate is 200MHz and 50MHz is the normal rate and 100MHz the fast rate.
0133  */
0134 #if FLASH_FAST_READ
0135  #define ZQSPI_QSPI_CR_BAUD_RATE ZQSPI_QSPI_CR_BAUD_RATE_DIV_2
0136 #else
0137  #define ZQSPI_QSPI_CR_BAUD_RATE ZQSPI_QSPI_CR_BAUD_RATE_DIV_4
0138 #endif
0139
0140 /*
0141  * Flash Status bits.
0142  */
0143 #define ZQSPI_FLASH_SR_WIP   (1 << 0)
0144 #define ZQSPI_FLASH_SR_WEL   (1 << 1)
0145 #define ZQSPI_FLASH_SR_BP0   (1 << 2)
0146 #define ZQSPI_FLASH_SR_BP1   (1 << 3)
0147 #define ZQSPI_FLASH_SR_BP2   (1 << 4)
0148 #define ZQSPI_FLASH_SR_E_ERR (1 << 5)
0149 #define ZQSPI_FLASH_SR_P_ERR (1 << 6)
0150 #define ZQSPI_FLASH_SR_SRWD  (1 << 7)
0151
0152
0153 void zqspi_write_unlock(zqspiflash *driver);
0154
0155 void zqspi_write_lock(zqspiflash *driver);
0156
0157 zqspi_error zqspi_transfer(zqspi_transfer_buffer* transfer, bool *initialised);
0158
0159 void zqspi_transfer_intr(zqspiflash *driver);
0160
0161 #endif /* _ZYNQ_QSPI_FLASH_DEFS_H_ */