tms570/start/tms570_selftest_par_mibspi.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsARMTMS570
0007  *
0008  * @brief This source file contains the MibSPI module parity based protection
0009  *   support.
0010  *
0011  * Algorithms are based on Ti manuals and Ti HalCoGen generated
0012  * code.
0013  */
0014
0015 /*
0016  * Copyright (C) 2016 Pavel Pisa <pisa@cmp.felk.cvut.cz>
0017  *
0018  * Czech Technical University in Prague
0019  * Zikova 1903/4
0020  * 166 36 Praha 6
0021  * Czech Republic
0022  *
0023  * Redistribution and use in source and binary forms, with or without
0024  * modification, are permitted provided that the following conditions
0025  * are met:
0026  * 1. Redistributions of source code must retain the above copyright
0027  *    notice, this list of conditions and the following disclaimer.
0028  * 2. Redistributions in binary form must reproduce the above copyright
0029  *    notice, this list of conditions and the following disclaimer in the
0030  *    documentation and/or other materials provided with the distribution.
0031  *
0032  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0033  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0034  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0035  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0036  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0037  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0038  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0039  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0040  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0041  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0042  * POSSIBILITY OF SUCH DAMAGE.
0043  */
0044
0045 #include <stdint.h>
0046 #include <stddef.h>
0047 #include <bsp/tms570.h>
0048 #include <bsp/tms570_selftest.h>
0049 #include <bsp/tms570_selftest_parity.h>
0050
0051 /**
0052  * @brief run test to check that parity protection works for MibSPI modules RAM
0053  *
0054  * @param[in] desc module registers addresses end ESM channels descriptor
0055  *
0056  * @return Void, in the case of error invokes bsp_selftest_fail_notification()
0057  *
0058  * The descriptor provides address of the module registers and address
0059  * of internal RAM memory and corresponding parity area test access window.
0060  */
0061 void tms570_selftest_par_check_mibspi( const tms570_selftest_par_desc_t *desc )
0062 {
0063   volatile uint32_t      test_read_data;
0064   volatile tms570_spi_t *spi_regs = (volatile tms570_spi_t *) desc->fnc_data;
0065   uint32_t               mibspie_bak;
0066   uint32_t               uerrctl_bak;
0067   int                    perr;
0068   int                    wait_timeout = 10000;
0069
0070   /* wait for MibSPI RAM to complete initialization */
0071   while ( ( spi_regs->FLG & TMS570_SPI_FLG_BUFINITACTIVE ) ==
0072           TMS570_SPI_FLG_BUFINITACTIVE ) {
0073     if ( !wait_timeout-- ) {
0074       bsp_selftest_fail_notification( desc->fail_code );
0075     }
0076   }
0077
0078   /* Store previous configuration of MibSPI */
0079   mibspie_bak = spi_regs->MIBSPIE;
0080   uerrctl_bak = spi_regs->UERRCTRL;
0081
0082   /* enable multi-buffered mode */
0083   spi_regs->MIBSPIE = TMS570_SPI_MIBSPIE_MSPIENA;
0084
0085   /* enable parity error detection */
0086   spi_regs->UERRCTRL = TMS570_SPI_UERRCTRL_EDEN_SET( spi_regs->UERRCTRL,
0087                                                     TMS570_SELFTEST_PAR_CR_KEY );
0088
0089   /* enable parity test mode */
0090   spi_regs->UERRCTRL |= TMS570_SPI_UERRCTRL_PTESTEN;
0091
0092   /* flip parity bit */
0093   *desc->par_loc ^= desc->par_xor;
0094
0095   /* disable parity TEST mode */
0096   spi_regs->UERRCTRL &= ~TMS570_SPI_UERRCTRL_PTESTEN;
0097
0098   /* read to cause parity error */
0099   test_read_data = *desc->ram_loc;
0100   (void) test_read_data;
0101
0102   /* check if ESM channel is flagged */
0103   perr = tms570_esm_channel_sr_get( desc->esm_prim_grp, desc->esm_prim_chan );
0104
0105   if ( !perr ) {
0106     /* RAM parity error was not flagged to ESM. */
0107     bsp_selftest_fail_notification( desc->fail_code );
0108   } else {
0109     /* clear parity error flags */
0110     spi_regs->UERRSTAT = TMS570_SPI_UERRSTAT_EDFLG1 |
0111                          TMS570_SPI_UERRSTAT_EDFLG0;
0112
0113     /* clear ESM flag */
0114     tms570_esm_channel_sr_clear( desc->esm_prim_grp, desc->esm_prim_chan );
0115
0116     /* enable parity test mode */
0117     spi_regs->UERRCTRL |= TMS570_SPI_UERRCTRL_PTESTEN;
0118
0119     /* Revert back to correct data by flipping parity location */
0120     *desc->par_loc ^= desc->par_xor;
0121   }
0122
0123   /* Restore MIBSPI control registers */
0124   spi_regs->UERRCTRL = uerrctl_bak;
0125   spi_regs->MIBSPIE = mibspie_bak;
0126 }