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File indexing completed on 2025-05-11 08:23:39

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002 
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsARMTMS570
0007  *
0008  * @brief This source file contains the bsp_start() implementation.
0009  */
0010 
0011 /*
0012  * Copyright (C) 2014 Premysl Houdek <kom541000@gmail.com>
0013  *
0014  * Google Summer of Code 2014 at
0015  * Czech Technical University in Prague
0016  * Zikova 1903/4
0017  * 166 36 Praha 6
0018  * Czech Republic
0019  *
0020  * Redistribution and use in source and binary forms, with or without
0021  * modification, are permitted provided that the following conditions
0022  * are met:
0023  * 1. Redistributions of source code must retain the above copyright
0024  *    notice, this list of conditions and the following disclaimer.
0025  * 2. Redistributions in binary form must reproduce the above copyright
0026  *    notice, this list of conditions and the following disclaimer in the
0027  *    documentation and/or other materials provided with the distribution.
0028  *
0029  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0030  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0031  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0032  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0033  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0034  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0035  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0036  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0037  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0038  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0039  * POSSIBILITY OF SUCH DAMAGE.
0040  */
0041 
0042 #include <bsp/tms570-pom.h>
0043 #include <bsp/irq-generic.h>
0044 #include <bsp/bootcard.h>
0045 #include <bsp/linker-symbols.h>
0046 
0047 void bsp_start( void )
0048 {
0049   void *need_remap_ptr;
0050   unsigned int need_remap_int;
0051 
0052   tms570_pom_initialize_and_clear();
0053 
0054   /*
0055    * If RTEMS image does not start at address 0x00000000
0056    * then first level exception table at memory begin has
0057    * to be replaced to point to RTEMS handlers addresses.
0058    *
0059    * There is no VBAR or other option because Cortex-R
0060    * does provides only fixed address 0x00000000 for exceptions
0061    * (0xFFFF0000-0xFFFF001C alternative SCTLR.V = 1 cannot
0062    * be used because target area corersponds to PMM peripheral
0063    * registers on TMS570).
0064    *
0065    * Alternative is to use jumps over SRAM based trampolines
0066    * but that is not compatible with
0067    *   Check TCRAM1 ECC error detection logic
0068    * which intentionally introduces data abort during startup
0069    * to check SRAM and if exception processing goes through
0070    * SRAM then it leads to CPU error halt.
0071    *
0072    * So use of POM to replace jumps to vectors target
0073    * addresses seems to be the best option for now.
0074    *
0075    * The passing of linker symbol (represented as start address
0076    * of global array) through dummy asm block ensures that C compiler
0077    * cannot optimize comparison out on premise that reference cannot
0078    * evaluate to NULL definition in standard.
0079    */
0080   need_remap_ptr = bsp_start_vector_table_begin;
0081   asm volatile ("\n": "=r" (need_remap_int): "0" (need_remap_ptr));
0082   if ( need_remap_int != 0 ) {
0083     tms570_pom_remap();
0084   }
0085 
0086   /* Interrupts */
0087   bsp_interrupt_initialize();
0088 
0089 }