include/bsp/tms570_selftest_parity.h

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsARMTMS570
0007  *
0008  * @brief This header file provides interfaces of the parity selftest support.
0009  */
0010
0011 /*
0012  * Copyright (C) 2016 Pavel Pisa <pisa@cmp.felk.cvut.cz>
0013  *
0014  * Czech Technical University in Prague
0015  * Zikova 1903/4
0016  * 166 36 Praha 6
0017  * Czech Republic
0018  *
0019  * Redistribution and use in source and binary forms, with or without
0020  * modification, are permitted provided that the following conditions
0021  * are met:
0022  * 1. Redistributions of source code must retain the above copyright
0023  *    notice, this list of conditions and the following disclaimer.
0024  * 2. Redistributions in binary form must reproduce the above copyright
0025  *    notice, this list of conditions and the following disclaimer in the
0026  *    documentation and/or other materials provided with the distribution.
0027  *
0028  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0029  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0030  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0031  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0032  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0033  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0034  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0035  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0036  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0037  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0038  * POSSIBILITY OF SUCH DAMAGE.
0039  */
0040
0041 #ifndef LIBBSP_ARM_TMS570_SELFTEST_PARITY_H
0042 #define LIBBSP_ARM_TMS570_SELFTEST_PARITY_H
0043
0044 #include <stdint.h>
0045
0046 /**
0047  * The magic number used to switch most of the peripherals
0048  * into parity protection test mode
0049  */
0050 #define TMS570_SELFTEST_PAR_CR_KEY 0xA
0051
0052 typedef struct tms570_selftest_par_desc tms570_selftest_par_desc_t;
0053
0054 typedef void tms570_selftest_par_fnc_t( const tms570_selftest_par_desc_t *desc );
0055
0056 /**
0057  * Decriptor specifying registers addresses and values used to test
0058  * that parity protection is working for given hardware
0059  * module/peripheral. It is used during initial chip self-tests.
0060  */
0061 struct tms570_selftest_par_desc {
0062   unsigned char esm_prim_grp;    /**< ESM primary signalling group number. */
0063   unsigned char esm_prim_chan;   /**< ESM primary signalling channel number. */
0064   unsigned char esm_sec_grp;     /**< ESM optional/alternative signalling group. */
0065   unsigned char esm_sec_chan;    /**< ESM optional/alternative signalling channel. */
0066   int fail_code;                 /**< Error code reported to
0067                   bsp_selftest_fail_notification() in the case of the test failure. */
0068   volatile uint32_t *ram_loc;    /**< Address of memory protected by parity. */
0069   volatile uint32_t *par_loc;    /**< Address of mapping of parity bits into CPU
0070                                   * address space. */
0071   uint32_t par_xor;              /**< Bitmask used to alter parity to cause
0072                                   * intentional parity failure. */
0073   volatile uint32_t *par_cr_reg; /**< Address of module parity test control register. */
0074   uint32_t par_cr_test;          /**< Mask of bit which cause switch to a test mode. */
0075   volatile uint32_t *par_st_reg; /**< Optional module parity status register which. */
0076   uint32_t par_st_clear;         /**< Optional value which is written to status register
0077                                   * to clear error. */
0078   tms570_selftest_par_fnc_t *partest_fnc; /**< Function which specialized for given kind
0079                                   * of peripheral/module mechanism testing. */
0080   volatile void *fnc_data;       /**< Pointer to the base of tested peripheral registers.
0081                                   * It is required by some test functions (CAN and MibSPI) */
0082 };
0083
0084 extern const tms570_selftest_par_desc_t
0085   tms570_selftest_par_het1_desc;
0086 extern const tms570_selftest_par_desc_t
0087   tms570_selftest_par_htu1_desc;
0088 extern const tms570_selftest_par_desc_t
0089   tms570_selftest_par_het2_desc;
0090 extern const tms570_selftest_par_desc_t
0091   tms570_selftest_par_htu2_desc;
0092 extern const tms570_selftest_par_desc_t
0093   tms570_selftest_par_adc1_desc;
0094 extern const tms570_selftest_par_desc_t
0095   tms570_selftest_par_adc2_desc;
0096 extern const tms570_selftest_par_desc_t
0097   tms570_selftest_par_can1_desc;
0098 extern const tms570_selftest_par_desc_t
0099   tms570_selftest_par_can2_desc;
0100 extern const tms570_selftest_par_desc_t
0101   tms570_selftest_par_can3_desc;
0102 extern const tms570_selftest_par_desc_t
0103   tms570_selftest_par_vim_desc;
0104 extern const tms570_selftest_par_desc_t
0105   tms570_selftest_par_dma_desc;
0106 extern const tms570_selftest_par_desc_t
0107   tms570_selftest_par_spi1_desc;
0108 extern const tms570_selftest_par_desc_t
0109   tms570_selftest_par_spi3_desc;
0110 extern const tms570_selftest_par_desc_t
0111   tms570_selftest_par_spi5_desc;
0112
0113 extern const tms570_selftest_par_desc_t *const
0114 tms570_selftest_par_list[];
0115
0116 extern const int tms570_selftest_par_list_size;
0117
0118 void tms570_selftest_par_check_std( const tms570_selftest_par_desc_t *desc );
0119
0120 void tms570_selftest_par_check_can( const tms570_selftest_par_desc_t *desc );
0121
0122 void tms570_selftest_par_check_mibspi( const tms570_selftest_par_desc_t *desc );
0123
0124 void tms570_selftest_par_run(
0125   const tms570_selftest_par_desc_t *
0126   const *desc_arr,
0127   int    desc_cnt
0128 );
0129
0130 #endif /* LIBBSP_ARM_TMS570_SELFTEST_PARITY_H */