bsp/ti_herc/reg_pcr.h

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsARMTMS570
0007  *
0008  * @brief This header file provides PCR interfaces.
0009  */
0010
0011 /* The header file is generated by make_header.py from PCR.json */
0012 /* Current script's version can be found at: */
0013 /* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
0014
0015 /*
0016  * Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
0017  *
0018  * Czech Technical University in Prague
0019  * Zikova 1903/4
0020  * 166 36 Praha 6
0021  * Czech Republic
0022  *
0023  * All rights reserved.
0024  *
0025  * Redistribution and use in source and binary forms, with or without
0026  * modification, are permitted provided that the following conditions are met:
0027  *
0028  * 1. Redistributions of source code must retain the above copyright notice, this
0029  *    list of conditions and the following disclaimer.
0030  * 2. Redistributions in binary form must reproduce the above copyright notice,
0031  *    this list of conditions and the following disclaimer in the documentation
0032  *    and/or other materials provided with the distribution.
0033  *
0034  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
0035  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
0036  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
0037  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
0038  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0039  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
0040  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
0041  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0042  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0043  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0044  *
0045  * The views and conclusions contained in the software and documentation are those
0046  * of the authors and should not be interpreted as representing official policies,
0047  * either expressed or implied, of the FreeBSD Project.
0048 */
0049 #ifndef LIBBSP_ARM_TMS570_PCR
0050 #define LIBBSP_ARM_TMS570_PCR
0051
0052 #include <bsp/utility.h>
0053
0054 typedef struct{
0055   uint32_t PMPROTSET0;        /*Peripheral Memory Protection Set Register 0*/
0056   uint32_t PMPROTSET1;        /*Peripheral Memory Protection Set Register 1*/
0057   uint8_t reserved1 [8];
0058   uint32_t PMPROTCLR0;        /*Peripheral Memory Protection Clear Register 0*/
0059   uint32_t PMPROTCLR1;        /*Peripheral Memory Protection Clear Register 1*/
0060   uint8_t reserved2 [8];
0061   uint32_t PPROTSET0;         /*Peripheral Protection Set Register 0*/
0062   uint32_t PPROTSET1;         /*Peripheral Protection Set Register 1*/
0063   uint32_t PPROTSET2;         /*Peripheral Protection Set Register 2*/
0064   uint32_t PPROTSET3;         /*Peripheral Protection Set Register 3*/
0065   uint8_t reserved3 [16];
0066   uint32_t PPROTCLR0;         /*Peripheral Protection Clear Register 0*/
0067   uint32_t PPROTCLR1;         /*Peripheral Protection Clear Register 1*/
0068   uint32_t PPROTCLR2;         /*Peripheral Protection Clear Register 2*/
0069   uint32_t PPROTCLR3;         /*Peripheral Protection Clear Register 3*/
0070   uint8_t reserved4 [16];
0071   uint32_t PCSPWRDWNSET0;     /*Peripheral Memory Power-Down Set Register 0*/
0072   uint32_t PCSPWRDWNSET1;     /*Peripheral Memory Power-Down Set Register 1*/
0073   uint8_t reserved5 [8];
0074   uint32_t PCSPWRDWNCLR0;     /*Peripheral Memory Power-Down Clear Register 0*/
0075   uint32_t PCSPWRDWNCLR1;     /*Peripheral Memory Power-Down Clear Register 1*/
0076   uint8_t reserved6 [8];
0077   uint32_t PSPWRDWNSET0;      /*Peripheral Power-Down Set Register 0*/
0078   uint32_t PSPWRDWNSET1;      /*Peripheral Power-Down Set Register 1*/
0079   uint32_t PSPWRDWNSET2;      /*Peripheral Power-Down Set Register 2*/
0080   uint32_t PSPWRDWNSET3;      /*Peripheral Power-Down Set Register 3*/
0081   uint8_t reserved7 [16];
0082   uint32_t PSPWRDWNCLR0;      /*Peripheral Power-Down Clear Register 0*/
0083   uint32_t PSPWRDWNCLR1;      /*Peripheral Power-Down Clear Register 1*/
0084   uint32_t PSPWRDWNCLR2;      /*Peripheral Power-Down Clear Register 2*/
0085   uint32_t PSPWRDWNCLR3;      /*Peripheral Power-Down Clear Register 3*/
0086 } tms570_pcr_t;
0087
0088
0089 /*-------------------TMS570_PCR_PMPROTSET0-------------------*/
0090 /* field: PCSPROTSET - Peripheral memory frame protection set. */
0091 /* Whole 32 bits */
0092
0093 /*-------------------TMS570_PCR_PMPROTSET1-------------------*/
0094 /* field: PCSPROTSET - Peripheral memory frame protection set. */
0095 /* Whole 32 bits */
0096
0097 /*-------------------TMS570_PCR_PMPROTCLR0-------------------*/
0098 /* field: PCSPROTCLR - Peripheral memory frame protection clear. */
0099 /* Whole 32 bits */
0100
0101 /*-------------------TMS570_PCR_PMPROTCLR1-------------------*/
0102 /* field: PCSPROTCLR - Peripheral memory frame protection clear. */
0103 /* Whole 32 bits */
0104
0105 /*--------------------TMS570_PCR_PPROTSETx--------------------*/
0106 /* field: PROTSET - Peripheral select quadrant protection set. */
0107 /* Whole 32 bits */
0108
0109 /*--------------------TMS570_PCR_PPROTCLRx--------------------*/
0110 /* field: PROTCLR - Peripheral select quadrant protection clear. */
0111 /* Whole 32 bits */
0112
0113 /*------------------TMS570_PCR_PCSPWRDWNSETx------------------*/
0114 /* field: PWRDNSET - Peripheral memory clock power-down set. */
0115 /* Whole 32 bits */
0116
0117 /*------------------TMS570_PCR_PCSPWRDWNCLRx------------------*/
0118 /* field: PWRDNCLR - Peripheral memory clock power-down clear. */
0119 /* Whole 32 bits */
0120
0121 /*------------------TMS570_PCR_PSPWRDWNSETx------------------*/
0122 /* field: PWRDWNSET - Peripheral select quadrant clock power-down set. */
0123 /* Whole 32 bits */
0124
0125 /*------------------TMS570_PCR_PSPWRDWNCLRx------------------*/
0126 /* field: PWRDWNCLR - Peripheral select quadrant clock power-down clear. */
0127 /* Whole 32 bits */
0128
0129
0130 #endif /* LIBBSP_ARM_TMS570_PCR */