bsp/ti_herc/reg_n2het.h

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsARMTMS570
0007  *
0008  * @brief This header file provides N2HET interfaces.
0009  */
0010
0011 /* The header file is generated by make_header.py from N2HET.json */
0012 /* Current script's version can be found at: */
0013 /* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
0014
0015 /*
0016  * Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
0017  *
0018  * Czech Technical University in Prague
0019  * Zikova 1903/4
0020  * 166 36 Praha 6
0021  * Czech Republic
0022  *
0023  * All rights reserved.
0024  *
0025  * Redistribution and use in source and binary forms, with or without
0026  * modification, are permitted provided that the following conditions are met:
0027  *
0028  * 1. Redistributions of source code must retain the above copyright notice, this
0029  *    list of conditions and the following disclaimer.
0030  * 2. Redistributions in binary form must reproduce the above copyright notice,
0031  *    this list of conditions and the following disclaimer in the documentation
0032  *    and/or other materials provided with the distribution.
0033  *
0034  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
0035  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
0036  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
0037  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
0038  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0039  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
0040  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
0041  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0042  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0043  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0044  *
0045  * The views and conclusions contained in the software and documentation are those
0046  * of the authors and should not be interpreted as representing official policies,
0047  * either expressed or implied, of the FreeBSD Project.
0048 */
0049 #ifndef LIBBSP_ARM_TMS570_NHET
0050 #define LIBBSP_ARM_TMS570_NHET
0051
0052 #include <bsp/utility.h>
0053
0054 typedef struct{
0055   uint32_t GCR;               /*Global Configuration Register*/
0056   uint32_t PFR;               /*Prescale Factor Register*/
0057   uint32_t ADDR;              /*NHET Current Address Register*/
0058   uint32_t OFF1;              /*Offset Index Priority Level 1 Register*/
0059   uint32_t OFF2;              /*Offset Index Priority Level 2 Register*/
0060   uint32_t INTENAS;           /*Interrupt Enable Set Register*/
0061   uint32_t INTENAC;           /*Interrupt Enable Clear Register*/
0062   uint32_t EXC1;              /*Exception Control Register 1*/
0063   uint32_t EXC2;              /*Exception Control Register 2*/
0064   uint32_t PRY;               /*Interrupt Priority Register*/
0065   uint32_t FLG;               /*Interrupt Flag Register*/
0066   uint32_t AND;               /*AND Share Control Register*/
0067   uint8_t reserved1 [4];
0068   uint32_t HRSH;              /*HR Share Control Register*/
0069   uint32_t XOR;               /*HR XOR-Share Control Register*/
0070   uint32_t REQENS;            /*Request Enable Set Register*/
0071   uint32_t REQENC;            /*Request Enable Clear Register*/
0072   uint32_t REQDS;             /*Request Destination Select Register*/
0073   uint8_t reserved2 [4];
0074   uint32_t DIR;               /*NHET Direction Register*/
0075   uint32_t DIN;               /*NHET Data Input Register*/
0076   uint32_t DOUT;              /*NHET Data Output Register*/
0077   uint32_t DSET;              /*NHET Data Set Register*/
0078   uint32_t DCLR;              /*NHET Data Clear Register*/
0079   uint32_t PDR;               /*NHET Open Drain Register*/
0080   uint32_t PULDIS;            /*NHET Pull Disable Register*/
0081   uint32_t PSL;               /*NHET Pull Select Register*/
0082   uint8_t reserved3 [8];
0083   uint32_t PCR;               /*Parity Control Register*/
0084   uint32_t PAR;               /*Parity Address Register*/
0085   uint32_t PPR;               /*Parity Pin Register*/
0086   uint32_t SFPRLD;            /*Suppression Filter Preload Register*/
0087   uint32_t SFENA;             /*Suppression Filter Enable Register*/
0088   uint8_t reserved4 [4];
0089   uint32_t LBPSEL;            /*Loop Back Pair Select Register*/
0090   uint32_t LBPDIR;            /*Loop Back Pair Direction Register*/
0091   uint32_t PINDIS;            /*NHET Pin Disable Register*/
0092 } tms570_nhet_t;
0093
0094
0095 /*----------------------TMS570_NHET_GCR----------------------*/
0096 /* field: HET_PIN_ENA - Enables the output buffers of the pin structures depending on the value of nDIS and DIR. */
0097 #define TMS570_NHET_GCR_HET_PIN_ENA BSP_BIT32(24)
0098
0099 /* field: MP - Master Priority */
0100 #define TMS570_NHET_GCR_MP(val) BSP_FLD32(val,21, 22)
0101 #define TMS570_NHET_GCR_MP_GET(reg) BSP_FLD32GET(reg,21, 22)
0102 #define TMS570_NHET_GCR_MP_SET(reg,val) BSP_FLD32SET(reg, val,21, 22)
0103
0104 /* field: PPF - Protect Program Fields */
0105 #define TMS570_NHET_GCR_PPF BSP_BIT32(18)
0106
0107 /* field: IS - Ignore Suspend */
0108 #define TMS570_NHET_GCR_IS BSP_BIT32(17)
0109
0110 /* field: CMS - Clk_master/slave */
0111 #define TMS570_NHET_GCR_CMS BSP_BIT32(16)
0112
0113
0114 /*----------------------TMS570_NHET_PFR----------------------*/
0115 /* field: LRPFC - oop Resolution Pre-scale Factor Code */
0116 #define TMS570_NHET_PFR_LRPFC(val) BSP_FLD32(val,8, 10)
0117 #define TMS570_NHET_PFR_LRPFC_GET(reg) BSP_FLD32GET(reg,8, 10)
0118 #define TMS570_NHET_PFR_LRPFC_SET(reg,val) BSP_FLD32SET(reg, val,8, 10)
0119
0120 /* field: HRPFC - High Resolution Pre-scale Factor Code */
0121 #define TMS570_NHET_PFR_HRPFC(val) BSP_FLD32(val,0, 5)
0122 #define TMS570_NHET_PFR_HRPFC_GET(reg) BSP_FLD32GET(reg,0, 5)
0123 #define TMS570_NHET_PFR_HRPFC_SET(reg,val) BSP_FLD32SET(reg, val,0, 5)
0124
0125
0126 /*----------------------TMS570_NHET_ADDR----------------------*/
0127 /* field: HETADDR - N2HET Current Address */
0128 #define TMS570_NHET_ADDR_HETADDR(val) BSP_FLD32(val,0, 8)
0129 #define TMS570_NHET_ADDR_HETADDR_GET(reg) BSP_FLD32GET(reg,0, 8)
0130 #define TMS570_NHET_ADDR_HETADDR_SET(reg,val) BSP_FLD32SET(reg, val,0, 8)
0131
0132
0133 /*----------------------TMS570_NHET_OFF1----------------------*/
0134 /* field: OFFSET1 - HETOFF1[5:0] indexes the currently pending high-priority interrupt. */
0135 #define TMS570_NHET_OFF1_OFFSET1(val) BSP_FLD32(val,0, 5)
0136 #define TMS570_NHET_OFF1_OFFSET1_GET(reg) BSP_FLD32GET(reg,0, 5)
0137 #define TMS570_NHET_OFF1_OFFSET1_SET(reg,val) BSP_FLD32SET(reg, val,0, 5)
0138
0139
0140 /*----------------------TMS570_NHET_OFF2----------------------*/
0141 /* field: OFFSET2 - HETOFF2[5:0] indexes the currently pending low-priority interrupt. */
0142 #define TMS570_NHET_OFF2_OFFSET2(val) BSP_FLD32(val,0, 5)
0143 #define TMS570_NHET_OFF2_OFFSET2_GET(reg) BSP_FLD32GET(reg,0, 5)
0144 #define TMS570_NHET_OFF2_OFFSET2_SET(reg,val) BSP_FLD32SET(reg, val,0, 5)
0145
0146
0147 /*--------------------TMS570_NHET_INTENAS--------------------*/
0148 /* field: HETINTENAS - Interrupt Enable Set bits. HETINTENAS is readable and writable in any operation mode. */
0149 /* Whole 32 bits */
0150
0151 /*--------------------TMS570_NHET_INTENAC--------------------*/
0152 /* field: HETINTENAC - Interrupt Enable Clear bits. HETINTENAC is readable and writable in any operation mode. */
0153 /* Whole 32 bits */
0154
0155 /*----------------------TMS570_NHET_EXC1----------------------*/
0156 /* field: APCNT_OVRFL_ENA - APCNT Overflow Enable */
0157 #define TMS570_NHET_EXC1_APCNT_OVRFL_ENA BSP_BIT32(24)
0158
0159 /* field: APCNT_UNRFL_ENA - APCNT Underflow Enable */
0160 #define TMS570_NHET_EXC1_APCNT_UNRFL_ENA BSP_BIT32(16)
0161
0162 /* field: PRGM_OVRFL_ENA - Program Overflow Enable */
0163 #define TMS570_NHET_EXC1_PRGM_OVRFL_ENA BSP_BIT32(8)
0164
0165 /* field: APCNT_OVRFL_PRY - APCNT Overflow Exception Interrupt Priority */
0166 #define TMS570_NHET_EXC1_APCNT_OVRFL_PRY BSP_BIT32(2)
0167
0168 /* field: APCNT_UNRFL_PRY - APCNT Underflow Exception Interrupt Priority */
0169 #define TMS570_NHET_EXC1_APCNT_UNRFL_PRY BSP_BIT32(1)
0170
0171 /* field: PRGM_OVRFL_PRY - ProgramOverflow Exception Interrupt Priority */
0172 #define TMS570_NHET_EXC1_PRGM_OVRFL_PRY BSP_BIT32(0)
0173
0174
0175 /*----------------------TMS570_NHET_EXC2----------------------*/
0176 /* field: DEBUG_STATUS_FLAG - Debug Status Flag. */
0177 #define TMS570_NHET_EXC2_DEBUG_STATUS_FLAG BSP_BIT32(8)
0178
0179 /* field: APCNT_OVRFL_FLAG - APCNT Overflow Flag */
0180 #define TMS570_NHET_EXC2_APCNT_OVRFL_FLAG BSP_BIT32(2)
0181
0182 /* field: APCNT_UNDFL_FLAG - APCNT Underflow Flag */
0183 #define TMS570_NHET_EXC2_APCNT_UNDFL_FLAG BSP_BIT32(1)
0184
0185 /* field: PRGM_OVERFL_FLAG - Program Overflow Flag */
0186 #define TMS570_NHET_EXC2_PRGM_OVERFL_FLAG BSP_BIT32(0)
0187
0188
0189 /*----------------------TMS570_NHET_PRY----------------------*/
0190 /* field: HETPRY - HET Interrupt Priority Level bits */
0191 /* Whole 32 bits */
0192
0193 /*----------------------TMS570_NHET_FLG----------------------*/
0194 /* field: HETFLAG - Interrupt Flag Register Bits */
0195 /* Whole 32 bits */
0196
0197 /*----------------------TMS570_NHET_AND----------------------*/
0198 /* field: AND_SHARE - AND Share Enable */
0199 #define TMS570_NHET_AND_AND_SHARE(val) BSP_FLD32(val,0, 15)
0200 #define TMS570_NHET_AND_AND_SHARE_GET(reg) BSP_FLD32GET(reg,0, 15)
0201 #define TMS570_NHET_AND_AND_SHARE_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
0202
0203
0204 /*----------------------TMS570_NHET_HRSH----------------------*/
0205 /* field: HR_SHARE - HR Share Bits */
0206 #define TMS570_NHET_HRSH_HR_SHARE(val) BSP_FLD32(val,0, 15)
0207 #define TMS570_NHET_HRSH_HR_SHARE_GET(reg) BSP_FLD32GET(reg,0, 15)
0208 #define TMS570_NHET_HRSH_HR_SHARE_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
0209
0210
0211 /*----------------------TMS570_NHET_XOR----------------------*/
0212 /* field: XOR_SHARE - XOR Share Enable */
0213 #define TMS570_NHET_XOR_XOR_SHARE(val) BSP_FLD32(val,0, 15)
0214 #define TMS570_NHET_XOR_XOR_SHARE_GET(reg) BSP_FLD32GET(reg,0, 15)
0215 #define TMS570_NHET_XOR_XOR_SHARE_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
0216
0217
0218 /*---------------------TMS570_NHET_REQENS---------------------*/
0219 /* field: REQ_ENA_n - Request Enable Bits */
0220 #define TMS570_NHET_REQENS_REQ_ENA_n(val) BSP_FLD32(val,0, 7)
0221 #define TMS570_NHET_REQENS_REQ_ENA_n_GET(reg) BSP_FLD32GET(reg,0, 7)
0222 #define TMS570_NHET_REQENS_REQ_ENA_n_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
0223
0224
0225 /*---------------------TMS570_NHET_REQENC---------------------*/
0226 /* field: REQ_DIS_n - Request Disable Bits */
0227 #define TMS570_NHET_REQENC_REQ_DIS_n(val) BSP_FLD32(val,0, 7)
0228 #define TMS570_NHET_REQENC_REQ_DIS_n_GET(reg) BSP_FLD32GET(reg,0, 7)
0229 #define TMS570_NHET_REQENC_REQ_DIS_n_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
0230
0231
0232 /*---------------------TMS570_NHET_REQDS---------------------*/
0233 /* field: TDBS_n - HTU, DMA or Both Select Bits */
0234 #define TMS570_NHET_REQDS_TDBS_n(val) BSP_FLD32(val,16, 23)
0235 #define TMS570_NHET_REQDS_TDBS_n_GET(reg) BSP_FLD32GET(reg,16, 23)
0236 #define TMS570_NHET_REQDS_TDBS_n_SET(reg,val) BSP_FLD32SET(reg, val,16, 23)
0237
0238 /* field: TDS_n - HTU or DMA Select Bits */
0239 #define TMS570_NHET_REQDS_TDS_n(val) BSP_FLD32(val,0, 7)
0240 #define TMS570_NHET_REQDS_TDS_n_GET(reg) BSP_FLD32GET(reg,0, 7)
0241 #define TMS570_NHET_REQDS_TDS_n_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
0242
0243
0244 /*----------------------TMS570_NHET_DIR----------------------*/
0245 /* field: HETDIR_n - Data direction of NHET pins */
0246 /* Whole 32 bits */
0247
0248 /*----------------------TMS570_NHET_DIN----------------------*/
0249 /* field: HETDIN_n - Data input. This bit displays the logic state of the pin. */
0250 /* Whole 32 bits */
0251
0252 /*----------------------TMS570_NHET_DOUT----------------------*/
0253 /* field: HETDOUT_n - Data out write. Writes to this bit will only take effect when the pin is configured as an output. */
0254 /* Whole 32 bits */
0255
0256 /*----------------------TMS570_NHET_DSET----------------------*/
0257 /* field: HETDSET_n - This register allows bits of HETDOUT to be set while avoiding the pitfalls of a readmodify- write */
0258 /* Whole 32 bits */
0259
0260 /*----------------------TMS570_NHET_DCLR----------------------*/
0261 /* field: HETDCLR_n - This register allows bits of HETDOUT to be cleared while avoiding the pitfalls of a read-modifywrite */
0262 /* Whole 32 bits */
0263
0264 /*----------------------TMS570_NHET_PDR----------------------*/
0265 /* field: HETPDR_n - Open drain control for HET[n] pins */
0266 /* Whole 32 bits */
0267
0268 /*---------------------TMS570_NHET_PULDIS---------------------*/
0269 /* field: HETPULDIS_n - Pull disable for N2HET pins */
0270 /* Whole 32 bits */
0271
0272 /*----------------------TMS570_NHET_PSL----------------------*/
0273 /* field: HETPSL_n - Pull select for NHET pins */
0274 /* Whole 32 bits */
0275
0276 /*----------------------TMS570_NHET_PCR----------------------*/
0277 /* field: TEST - Test Bit. */
0278 #define TMS570_NHET_PCR_TEST BSP_BIT32(8)
0279
0280 /* field: PARITY_ENA - Enable/disable parity checking. */
0281 #define TMS570_NHET_PCR_PARITY_ENA(val) BSP_FLD32(val,0, 3)
0282 #define TMS570_NHET_PCR_PARITY_ENA_GET(reg) BSP_FLD32GET(reg,0, 3)
0283 #define TMS570_NHET_PCR_PARITY_ENA_SET(reg,val) BSP_FLD32SET(reg, val,0, 3)
0284
0285
0286 /*----------------------TMS570_NHET_PAR----------------------*/
0287 /* field: PAOFF - Parity Error Address Offset. */
0288 #define TMS570_NHET_PAR_PAOFF(val) BSP_FLD32(val,2, 12)
0289 #define TMS570_NHET_PAR_PAOFF_GET(reg) BSP_FLD32GET(reg,2, 12)
0290 #define TMS570_NHET_PAR_PAOFF_SET(reg,val) BSP_FLD32SET(reg, val,2, 12)
0291
0292
0293 /*----------------------TMS570_NHET_PPR----------------------*/
0294 /* field: HETPPR_n - NHET Parity Pin Select Bits - Allows HET[n] pins to be configured to drive to a known state when */
0295 /* Whole 32 bits */
0296
0297 /*---------------------TMS570_NHET_SFPRLD---------------------*/
0298 /* field: CCDIV - Counter Clock Divider */
0299 #define TMS570_NHET_SFPRLD_CCDIV(val) BSP_FLD32(val,16, 17)
0300 #define TMS570_NHET_SFPRLD_CCDIV_GET(reg) BSP_FLD32GET(reg,16, 17)
0301 #define TMS570_NHET_SFPRLD_CCDIV_SET(reg,val) BSP_FLD32SET(reg, val,16, 17)
0302
0303 /* field: CPRLD - Counter Preload Value */
0304 #define TMS570_NHET_SFPRLD_CPRLD(val) BSP_FLD32(val,0, 9)
0305 #define TMS570_NHET_SFPRLD_CPRLD_GET(reg) BSP_FLD32GET(reg,0, 9)
0306 #define TMS570_NHET_SFPRLD_CPRLD_SET(reg,val) BSP_FLD32SET(reg, val,0, 9)
0307
0308
0309 /*---------------------TMS570_NHET_SFENA---------------------*/
0310 /* field: HETSFENA_n - Suppression Filter Enable Bits */
0311 /* Whole 32 bits */
0312
0313 /*---------------------TMS570_NHET_LBPSEL---------------------*/
0314 /* field: LBPTYPE - Loop Back Pair Type Select Bits */
0315 #define TMS570_NHET_LBPSEL_LBPTYPE(val) BSP_FLD32(val,16, 31)
0316 #define TMS570_NHET_LBPSEL_LBPTYPE_GET(reg) BSP_FLD32GET(reg,16, 31)
0317 #define TMS570_NHET_LBPSEL_LBPTYPE_SET(reg,val) BSP_FLD32SET(reg, val,16, 31)
0318
0319 /* field: LBPSEL - Loop Back Pair Select Bits */
0320 #define TMS570_NHET_LBPSEL_LBPSEL(val) BSP_FLD32(val,0, 15)
0321 #define TMS570_NHET_LBPSEL_LBPSEL_GET(reg) BSP_FLD32GET(reg,0, 15)
0322 #define TMS570_NHET_LBPSEL_LBPSEL_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
0323
0324
0325 /*---------------------TMS570_NHET_LBPDIR---------------------*/
0326 /* field: LBPTSTENA - Loopback Test Enable Key */
0327 #define TMS570_NHET_LBPDIR_LBPTSTENA(val) BSP_FLD32(val,16, 19)
0328 #define TMS570_NHET_LBPDIR_LBPTSTENA_GET(reg) BSP_FLD32GET(reg,16, 19)
0329 #define TMS570_NHET_LBPDIR_LBPTSTENA_SET(reg,val) BSP_FLD32SET(reg, val,16, 19)
0330
0331 /* field: LBPDIR - Loop Back Pair Direction Bits */
0332 #define TMS570_NHET_LBPDIR_LBPDIR(val) BSP_FLD32(val,0, 15)
0333 #define TMS570_NHET_LBPDIR_LBPDIR_GET(reg) BSP_FLD32GET(reg,0, 15)
0334 #define TMS570_NHET_LBPDIR_LBPDIR_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
0335
0336
0337 /*---------------------TMS570_NHET_PINDIS---------------------*/
0338 /* field: HETPINDIS_n - N2HET Pin Disable Bits */
0339 /* Whole 32 bits */
0340
0341
0342 #endif /* LIBBSP_ARM_TMS570_NHET */