bsp/ti_herc/reg_lin.h

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsARMTMS570
0007  *
0008  * @brief This header file provides LIN interfaces.
0009  */
0010
0011 /* The header file is generated by make_header.py from LIN.json */
0012 /* Current script's version can be found at: */
0013 /* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
0014
0015 /*
0016  * Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
0017  *
0018  * Czech Technical University in Prague
0019  * Zikova 1903/4
0020  * 166 36 Praha 6
0021  * Czech Republic
0022  *
0023  * All rights reserved.
0024  *
0025  * Redistribution and use in source and binary forms, with or without
0026  * modification, are permitted provided that the following conditions are met:
0027  *
0028  * 1. Redistributions of source code must retain the above copyright notice, this
0029  *    list of conditions and the following disclaimer.
0030  * 2. Redistributions in binary form must reproduce the above copyright notice,
0031  *    this list of conditions and the following disclaimer in the documentation
0032  *    and/or other materials provided with the distribution.
0033  *
0034  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
0035  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
0036  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
0037  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
0038  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0039  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
0040  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
0041  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0042  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0043  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0044  *
0045  * The views and conclusions contained in the software and documentation are those
0046  * of the authors and should not be interpreted as representing official policies,
0047  * either expressed or implied, of the FreeBSD Project.
0048 */
0049 #ifndef LIBBSP_ARM_TMS570_LIN
0050 #define LIBBSP_ARM_TMS570_LIN
0051
0052 #include <bsp/utility.h>
0053
0054 typedef struct{
0055   uint32_t GCR0;              /*SCI Global Control Register 0*/
0056   uint32_t GCR1;              /*SCI Global Control Register 1*/
0057   uint32_t GCR2;              /*SCI Global Control Register 2*/
0058   uint32_t SETINT;            /*SCI Set Interrupt Register*/
0059   uint32_t CLEARINT;          /*SCI Clear Interrupt Register*/
0060   uint32_t SETINTLVL;         /*SCI Set Interrupt Level Register*/
0061   uint32_t CLEARINTLVL;       /*SCI Clear Interrupt Level Register*/
0062   uint32_t FLR;               /*SCI Flags Register*/
0063   uint32_t INTVECT0;          /*SCI Interrupt Vector Offset 0*/
0064   uint32_t INTVECT1;          /*SCI Interrupt Vector Offset 1*/
0065   uint32_t FORMAT;            /*SCI Format Control Register*/
0066   uint32_t BRS;               /*Baud Rate Selection Register*/
0067   uint32_t ED;                /*Receiver Emulation Data Buffer*/
0068   uint32_t RD;                /*Receiver Data Buffer*/
0069   uint32_t TD;                /*Transmit Data Buffer*/
0070   uint32_t PIO0;              /*SCI Pin I/O Control Register 0*/
0071   uint32_t PIO1;              /*SCI Pin I/O Control Register 1*/
0072   uint32_t PIO2;              /*SCI Pin I/O Control Register 2*/
0073   uint32_t PIO3;              /*SCI Pin I/O Control Register 3*/
0074   uint32_t PIO4;              /*SCI Pin I/O Control Register 4*/
0075   uint32_t PIO5;              /*SCI Pin I/O Control Register 5*/
0076   uint32_t PIO6;              /*SCI Pin I/O Control Register 6*/
0077   uint32_t PIO7;              /*SCI Pin I/O Control Register 7*/
0078   uint32_t PIO8;              /*SCI Pin I/O Control Register 8*/
0079   uint32_t COMP;              /*LIN Compare Register*/
0080   uint32_t RD0;               /*LIN Receive Buffer 0 Register*/
0081   uint32_t RD1;               /*LIN Receive Buffer 1 Register*/
0082   uint32_t MASK;              /*LIN Mask Register*/
0083   uint32_t ID;                /*LIN Identification Register*/
0084   uint32_t TD0;               /*LIN Transmit Buffer 0*/
0085   uint32_t TD1;               /*LIN Transmit Buffer 1*/
0086   uint32_t MBRSR;             /*Maximum Baud Rate Selection Register*/
0087   uint8_t reserved1 [16];
0088   uint32_t IODFTCTRL;         /*Input/Output Error Enable Register*/
0089 } tms570_lin_t;
0090
0091
0092 /*----------------------TMS570_LIN_GCR0----------------------*/
0093 /* field: Reserved - Read returns 0. Writes have no effect. */
0094 #define TMS570_LIN_GCR0_Reserved(val) BSP_FLD32(val,1, 31)
0095 #define TMS570_LIN_GCR0_Reserved_GET(reg) BSP_FLD32GET(reg,1, 31)
0096 #define TMS570_LIN_GCR0_Reserved_SET(reg,val) BSP_FLD32SET(reg, val,1, 31)
0097
0098 /* field: RESET - This bit resets the SCI module. */
0099 #define TMS570_LIN_GCR0_RESET BSP_BIT32(0)
0100
0101
0102 /*----------------------TMS570_LIN_GCR1----------------------*/
0103 /* field: TXENA - Transmit enable. */
0104 #define TMS570_LIN_GCR1_TXENA BSP_BIT32(25)
0105
0106 /* field: RXENA - Receive enable. RXENA allows or prevents the transfer of data from SCIRXSHF to SCIRD. */
0107 #define TMS570_LIN_GCR1_RXENA BSP_BIT32(24)
0108
0109 /* field: CONT - Continue on suspend. */
0110 #define TMS570_LIN_GCR1_CONT BSP_BIT32(17)
0111
0112 /* field: LOOP_BACK - Loopback bit. The self-checking option for the SCI can be selected with this bit. */
0113 #define TMS570_LIN_GCR1_LOOP_BACK BSP_BIT32(16)
0114
0115 /* field: POWERDOWN - If the POWERDOWN bit is set while the receiver is actively receiving data and the wake-up */
0116 #define TMS570_LIN_GCR1_POWERDOWN BSP_BIT32(9)
0117
0118 /* field: SLEEP - SCI sleep. In a multiprocessor configuration, this bit controls the receive sleep function. */
0119 #define TMS570_LIN_GCR1_SLEEP BSP_BIT32(8)
0120
0121 /* field: SWnRST - Software reset (active low). This bit is effective in LIN and SCI modes. */
0122 #define TMS570_LIN_GCR1_SWnRST BSP_BIT32(7)
0123
0124 /* field: CLOCK - CLOCK */
0125 #define TMS570_LIN_GCR1_CLOCK BSP_BIT32(5)
0126
0127 /* field: STOP - SCI number of stop bits per frame. */
0128 #define TMS570_LIN_GCR1_STOP BSP_BIT32(4)
0129
0130 /* field: PARITY - SCI parity odd/even selection. If the PARITY ENA bit is set, PARITY designates odd or even parity. */
0131 #define TMS570_LIN_GCR1_PARITY BSP_BIT32(3)
0132
0133 /* field: PARITY_ENA - Parity enable. This bit enables or disables the parity function. */
0134 #define TMS570_LIN_GCR1_PARITY_ENA BSP_BIT32(2)
0135
0136 /* field: TIMING_MODE - SCI timing mode bit. */
0137 #define TMS570_LIN_GCR1_TIMING_MODE BSP_BIT32(1)
0138
0139 /* field: COMM_MODE - SCI communication mode bit. */
0140 #define TMS570_LIN_GCR1_COMM_MODE BSP_BIT32(0)
0141
0142
0143 /*----------------------TMS570_LIN_GCR2----------------------*/
0144 /* field: CC - Compare checksum. LIN mode only. */
0145 #define TMS570_LIN_GCR2_CC BSP_BIT32(17)
0146
0147 /* field: SC - Send checksum byte. This bit is effective in LIN mode only. */
0148 #define TMS570_LIN_GCR2_SC BSP_BIT32(16)
0149
0150 /* field: GEN_WU - Generate wakeup signal. This bit is effective in LIN mode only. */
0151 #define TMS570_LIN_GCR2_GEN_WU BSP_BIT32(8)
0152
0153 /* field: POWERDOWN - Power down. This bit is effective in LIN or SCI mode. */
0154 #define TMS570_LIN_GCR2_POWERDOWN BSP_BIT32(0)
0155
0156
0157 /*---------------------TMS570_LIN_SETINT---------------------*/
0158 /* field: SET_FE_INT -  */
0159 #define TMS570_LIN_SETINT_SET_FE_INT BSP_BIT32(26)
0160
0161 /* field: SET_OE_INT - SET OE INT */
0162 #define TMS570_LIN_SETINT_SET_OE_INT BSP_BIT32(25)
0163
0164 /* field: SET_PE_INT - Set parity interrupt. */
0165 #define TMS570_LIN_SETINT_SET_PE_INT BSP_BIT32(24)
0166
0167 /* field: SET_RX_DMA_ALL - SET RX DMA ALL */
0168 #define TMS570_LIN_SETINT_SET_RX_DMA_ALL BSP_BIT32(18)
0169
0170 /* field: SET_RX_DMA - SET RX DMA */
0171 #define TMS570_LIN_SETINT_SET_RX_DMA BSP_BIT32(17)
0172
0173 /* field: SET_TX_DMA - Set transmit DMA. To enable DMA requests for the transmitter, this bit must be set. */
0174 #define TMS570_LIN_SETINT_SET_TX_DMA BSP_BIT32(16)
0175
0176 /* field: SET_RX_INT - SET RX INT */
0177 #define TMS570_LIN_SETINT_SET_RX_INT BSP_BIT32(9)
0178
0179 /* field: SET_TX_INT - Set transmitter interrupt. */
0180 #define TMS570_LIN_SETINT_SET_TX_INT BSP_BIT32(8)
0181
0182 /* field: SET_WAKEUP_INT - Set wakeup interrupt. */
0183 #define TMS570_LIN_SETINT_SET_WAKEUP_INT BSP_BIT32(1)
0184
0185 /* field: SET_BRKDT_INT - Set breakdetect interrupt. */
0186 #define TMS570_LIN_SETINT_SET_BRKDT_INT BSP_BIT32(0)
0187
0188
0189 /*--------------------TMS570_LIN_CLEARINT--------------------*/
0190 /* field: CLR_FE_INT - Clear framing-error interrupt. This bit disables the framing-error interrupt when set. */
0191 #define TMS570_LIN_CLEARINT_CLR_FE_INT BSP_BIT32(26)
0192
0193 /* field: CLR_CE_INT - Clear overrun-error interrupt. This bit disables the SCI overrun error interrupt when set. */
0194 #define TMS570_LIN_CLEARINT_CLR_CE_INT BSP_BIT32(25)
0195
0196 /* field: CLR_PE_INT - Clear parity interrupt. This bit disables the parity error interrupt when set. */
0197 #define TMS570_LIN_CLEARINT_CLR_PE_INT BSP_BIT32(24)
0198
0199 /* field: CLR_RX_DMA_ALL - Clear receive DMA all. This bit clears the receive DMA request for address frames when set. */
0200 #define TMS570_LIN_CLEARINT_CLR_RX_DMA_ALL BSP_BIT32(18)
0201
0202 /* field: CLR_RX_DMA - Clear receive DMA request. This bit disables the receive DMA request when set. */
0203 #define TMS570_LIN_CLEARINT_CLR_RX_DMA BSP_BIT32(17)
0204
0205 /* field: CLR_TX_DMA - CLR TX DMA */
0206 #define TMS570_LIN_CLEARINT_CLR_TX_DMA BSP_BIT32(16)
0207
0208 /* field: CLR_RX_INT - Clear receiver interrupt. This bit disables the receiver interrupt when set. */
0209 #define TMS570_LIN_CLEARINT_CLR_RX_INT BSP_BIT32(9)
0210
0211 /* field: CLR_TX_INT - Clear transmitter interrupt. This bit disables the transmitter interrupt when set. */
0212 #define TMS570_LIN_CLEARINT_CLR_TX_INT BSP_BIT32(8)
0213
0214 /* field: CLR_WAKEUP_INT - Clear wakeup interrupt. This bit disables the wakeup interrupt when set. */
0215 #define TMS570_LIN_CLEARINT_CLR_WAKEUP_INT BSP_BIT32(1)
0216
0217 /* field: CLR_BRKDT_INT - Clear breakdetect interrupt. This bit disables the break-detect interrupt when set. */
0218 #define TMS570_LIN_CLEARINT_CLR_BRKDT_INT BSP_BIT32(0)
0219
0220
0221 /*--------------------TMS570_LIN_SETINTLVL--------------------*/
0222 /* field: SET_FE_INT_LVL - Set framing-error interrupt level. */
0223 #define TMS570_LIN_SETINTLVL_SET_FE_INT_LVL BSP_BIT32(26)
0224
0225 /* field: SET_CE_INT_LVL - Set overrun-error interrupt level. */
0226 #define TMS570_LIN_SETINTLVL_SET_CE_INT_LVL BSP_BIT32(25)
0227
0228 /* field: SET_PE_INT_LVL - Set parity error interrupt level. */
0229 #define TMS570_LIN_SETINTLVL_SET_PE_INT_LVL BSP_BIT32(24)
0230
0231 /* field: SET_RX_DMA_ALL_LVL - Set receive DMA all interrupt levels. */
0232 #define TMS570_LIN_SETINTLVL_SET_RX_DMA_ALL_LVL BSP_BIT32(18)
0233
0234 /* field: SET_RX_INT_LVL - Set receiver interrupt level. */
0235 #define TMS570_LIN_SETINTLVL_SET_RX_INT_LVL BSP_BIT32(9)
0236
0237 /* field: SET_TX_INT_LVL - Set transmitter interrupt level. */
0238 #define TMS570_LIN_SETINTLVL_SET_TX_INT_LVL BSP_BIT32(8)
0239
0240 /* field: SET_WAKEUP_INT_LVL - Set wakeup interrupt level. */
0241 #define TMS570_LIN_SETINTLVL_SET_WAKEUP_INT_LVL BSP_BIT32(1)
0242
0243 /* field: SET_BRKDT_INT_LVL - SET BRKDT INT LVL */
0244 #define TMS570_LIN_SETINTLVL_SET_BRKDT_INT_LVL BSP_BIT32(0)
0245
0246
0247 /*-------------------TMS570_LIN_CLEARINTLVL-------------------*/
0248 /* field: CLR_FE_INT_LVL - Clear framing-error interrupt. */
0249 #define TMS570_LIN_CLEARINTLVL_CLR_FE_INT_LVL BSP_BIT32(26)
0250
0251 /* field: CLR_CE_INT_LVL - CLR CE INT LVL */
0252 #define TMS570_LIN_CLEARINTLVL_CLR_CE_INT_LVL BSP_BIT32(25)
0253
0254 /* field: CLR_CE_INT_LVL - CLR CE INT LVL */
0255 #define TMS570_LIN_CLEARINTLVL_CLR_CE_INT_LVL BSP_BIT32(25)
0256
0257 /* field: CLR_PE_INT_LVL -  */
0258 #define TMS570_LIN_CLEARINTLVL_CLR_PE_INT_LVL BSP_BIT32(24)
0259
0260 /* field: CLR_RX_DMA_ALL_LVL - Clear receive DMA interrupt level. */
0261 #define TMS570_LIN_CLEARINTLVL_CLR_RX_DMA_ALL_LVL BSP_BIT32(18)
0262
0263 /* field: CLR_RX_INT_LVL - Clear receiver interrupt. */
0264 #define TMS570_LIN_CLEARINTLVL_CLR_RX_INT_LVL BSP_BIT32(9)
0265
0266 /* field: 8 - CLR TX INT LVL Clear transmitter interrupt. */
0267 #define TMS570_LIN_CLEARINTLVL_8 BSP_BIT32(8)
0268
0269 /* field: CLR_WAKEUP_INT_LVL - Clear wakeup interrupt. */
0270 #define TMS570_LIN_CLEARINTLVL_CLR_WAKEUP_INT_LVL BSP_BIT32(1)
0271
0272 /* field: CLR_BRKDT_INT_LVL - Clear breakdetect interrupt. */
0273 #define TMS570_LIN_CLEARINTLVL_CLR_BRKDT_INT_LVL BSP_BIT32(0)
0274
0275
0276 /*-----------------------TMS570_LIN_FLR-----------------------*/
0277 /* field: FE - Framing error flag. This bit is effective in LIN or SCI-compatible mode. */
0278 #define TMS570_LIN_FLR_FE BSP_BIT32(26)
0279
0280 /* field: OE - Overrun error flag. */
0281 #define TMS570_LIN_FLR_OE BSP_BIT32(25)
0282
0283 /* field: PE - Parity error flag. This bit is set when a parity error is detected in the received data. */
0284 #define TMS570_LIN_FLR_PE BSP_BIT32(24)
0285
0286 /* field: RXWAKE - Receiver wakeup detect flag. */
0287 #define TMS570_LIN_FLR_RXWAKE BSP_BIT32(12)
0288
0289 /* field: TX_EMPTY - Transmitter empty flag. */
0290 #define TMS570_LIN_FLR_TX_EMPTY BSP_BIT32(11)
0291
0292 /* field: TXWAKE - Transmitter wakeup method select. */
0293 #define TMS570_LIN_FLR_TXWAKE BSP_BIT32(10)
0294
0295 /* field: RXRDY - Receiver ready flag. */
0296 #define TMS570_LIN_FLR_RXRDY BSP_BIT32(9)
0297
0298 /* field: TXRDY - Transmitter buffer register ready flag. */
0299 #define TMS570_LIN_FLR_TXRDY BSP_BIT32(8)
0300
0301 /* field: BUSY - Bus busy flag. TThis bit indicates whether the receiver is in the process of receiving a frame. */
0302 #define TMS570_LIN_FLR_BUSY BSP_BIT32(3)
0303
0304 /* field: IDLE - SCI receiver in idle state. */
0305 #define TMS570_LIN_FLR_IDLE BSP_BIT32(2)
0306
0307 /* field: WAKEUP - Wakeup flag. */
0308 #define TMS570_LIN_FLR_WAKEUP BSP_BIT32(1)
0309
0310 /* field: BRKDT - SCI break-detect flag. This bit is set when the SCI detects a break condition on the LINRX pin. */
0311 #define TMS570_LIN_FLR_BRKDT BSP_BIT32(0)
0312
0313
0314 /*--------------------TMS570_LIN_INTVECT0--------------------*/
0315 /* field: INVECT0 - Interrupt vector offset for INT0. This register indicates the offset for interrupt line INT0. */
0316 #define TMS570_LIN_INTVECT0_INVECT0(val) BSP_FLD32(val,0, 3)
0317 #define TMS570_LIN_INTVECT0_INVECT0_GET(reg) BSP_FLD32GET(reg,0, 3)
0318 #define TMS570_LIN_INTVECT0_INVECT0_SET(reg,val) BSP_FLD32SET(reg, val,0, 3)
0319
0320
0321 /*--------------------TMS570_LIN_INTVECT1--------------------*/
0322 /* field: INVECT1 - Interrupt vector offset for INT1. This register indicates the offset for interrupt line INT1. */
0323 #define TMS570_LIN_INTVECT1_INVECT1(val) BSP_FLD32(val,0, 3)
0324 #define TMS570_LIN_INTVECT1_INVECT1_GET(reg) BSP_FLD32GET(reg,0, 3)
0325 #define TMS570_LIN_INTVECT1_INVECT1_SET(reg,val) BSP_FLD32SET(reg, val,0, 3)
0326
0327
0328 /*---------------------TMS570_LIN_FORMAT---------------------*/
0329 /* field: CHAR - Character length control bits. These bits set the SCI character length from 1 to 8 bits. */
0330 #define TMS570_LIN_FORMAT_CHAR(val) BSP_FLD32(val,0, 2)
0331 #define TMS570_LIN_FORMAT_CHAR_GET(reg) BSP_FLD32GET(reg,0, 2)
0332 #define TMS570_LIN_FORMAT_CHAR_SET(reg,val) BSP_FLD32SET(reg, val,0, 2)
0333
0334
0335 /*-----------------------TMS570_LIN_BRS-----------------------*/
0336 /* field: BAUD - SCI 24-bit baud selection. */
0337 #define TMS570_LIN_BRS_BAUD(val) BSP_FLD32(val,0, 23)
0338 #define TMS570_LIN_BRS_BAUD_GET(reg) BSP_FLD32GET(reg,0, 23)
0339 #define TMS570_LIN_BRS_BAUD_SET(reg,val) BSP_FLD32SET(reg, val,0, 23)
0340
0341
0342 /*-----------------------TMS570_LIN_ED-----------------------*/
0343 /* field: ED - Emulator data. Reading SCIED[7:0] does not clear the RXRDY flag, unlike reading SCIRD. */
0344 #define TMS570_LIN_ED_ED(val) BSP_FLD32(val,0, 7)
0345 #define TMS570_LIN_ED_ED_GET(reg) BSP_FLD32GET(reg,0, 7)
0346 #define TMS570_LIN_ED_ED_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
0347
0348
0349 /*-----------------------TMS570_LIN_RD-----------------------*/
0350 /* field: RD - Receiver data. */
0351 #define TMS570_LIN_RD_RD(val) BSP_FLD32(val,0, 7)
0352 #define TMS570_LIN_RD_RD_GET(reg) BSP_FLD32GET(reg,0, 7)
0353 #define TMS570_LIN_RD_RD_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
0354
0355
0356 /*-----------------------TMS570_LIN_TD-----------------------*/
0357 /* field: TD - Transmit data. Data to be transmitted is written to the SCITD register. */
0358 #define TMS570_LIN_TD_TD(val) BSP_FLD32(val,0, 7)
0359 #define TMS570_LIN_TD_TD_GET(reg) BSP_FLD32GET(reg,0, 7)
0360 #define TMS570_LIN_TD_TD_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
0361
0362
0363 /*----------------------TMS570_LIN_PIO0----------------------*/
0364 /* field: TX_FUNC - Transfer function. This bit defines the function of pin SCITX. */
0365 #define TMS570_LIN_PIO0_TX_FUNC BSP_BIT32(2)
0366
0367 /* field: RX_FUNC - Receive function.This bit defines the function of pin SCIRX. */
0368 #define TMS570_LIN_PIO0_RX_FUNC BSP_BIT32(1)
0369
0370
0371 /*----------------------TMS570_LIN_PIO1----------------------*/
0372 /* field: TX_DIR - Transmit pin direction. */
0373 #define TMS570_LIN_PIO1_TX_DIR BSP_BIT32(2)
0374
0375 /* field: RX_DIR - Receive pin direction. */
0376 #define TMS570_LIN_PIO1_RX_DIR BSP_BIT32(1)
0377
0378
0379 /*----------------------TMS570_LIN_PIO2----------------------*/
0380 /* field: TX_IN - Transmit pin in. This bit contains the current value on the SCITX pin. */
0381 #define TMS570_LIN_PIO2_TX_IN BSP_BIT32(2)
0382
0383 /* field: RX_IN - Receive pin in. This bit contains the current value on the SCIRX pin. */
0384 #define TMS570_LIN_PIO2_RX_IN BSP_BIT32(1)
0385
0386
0387 /*----------------------TMS570_LIN_PIO3----------------------*/
0388 /* field: TX_OUT - Transmit pin out. */
0389 #define TMS570_LIN_PIO3_TX_OUT BSP_BIT32(2)
0390
0391 /* field: RX_OUT - Receive pin out. */
0392 #define TMS570_LIN_PIO3_RX_OUT BSP_BIT32(1)
0393
0394
0395 /*----------------------TMS570_LIN_PIO4----------------------*/
0396 /* field: TX_SET - Transmit pin set. */
0397 #define TMS570_LIN_PIO4_TX_SET BSP_BIT32(2)
0398
0399 /* field: RX_SET - Receive pin set. */
0400 #define TMS570_LIN_PIO4_RX_SET BSP_BIT32(1)
0401
0402
0403 /*----------------------TMS570_LIN_PIO5----------------------*/
0404 /* field: TX_CLR - Transmit pin clear. */
0405 #define TMS570_LIN_PIO5_TX_CLR BSP_BIT32(2)
0406
0407 /* field: RX_CLR - Receive pin clear. */
0408 #define TMS570_LIN_PIO5_RX_CLR BSP_BIT32(1)
0409
0410
0411 /*----------------------TMS570_LIN_PIO6----------------------*/
0412 /* field: TX_PDR - Transmit pin open drain enable. */
0413 #define TMS570_LIN_PIO6_TX_PDR BSP_BIT32(2)
0414
0415 /* field: RX_PDR - Receive pin open drain enable. */
0416 #define TMS570_LIN_PIO6_RX_PDR BSP_BIT32(1)
0417
0418
0419 /*----------------------TMS570_LIN_PIO7----------------------*/
0420 /* field: TX_PD - Transmit pin pull control disable. This bit disables pull control capability on the input pin SCITX. */
0421 #define TMS570_LIN_PIO7_TX_PD BSP_BIT32(2)
0422
0423 /* field: RX_PD - Receive pin pull control disable. This bit disables pull control capability on the input pin SCIRX. */
0424 #define TMS570_LIN_PIO7_RX_PD BSP_BIT32(1)
0425
0426
0427 /*----------------------TMS570_LIN_PIO8----------------------*/
0428 /* field: TX_PSL - TX pin pull select. This bit selects pull type in the input pin SCITX. */
0429 #define TMS570_LIN_PIO8_TX_PSL BSP_BIT32(2)
0430
0431 /* field: RX_PSL - RX pin pull select. This bit selects pull type in the input pin SCIRX. */
0432 #define TMS570_LIN_PIO8_RX_PSL BSP_BIT32(1)
0433
0434
0435 /*----------------------TMS570_LIN_COMP----------------------*/
0436 /* field: SDEL - 2-bit synch delimiter compare. These bits are effective in LIN mode only. */
0437 #define TMS570_LIN_COMP_SDEL(val) BSP_FLD32(val,8, 9)
0438 #define TMS570_LIN_COMP_SDEL_GET(reg) BSP_FLD32GET(reg,8, 9)
0439 #define TMS570_LIN_COMP_SDEL_SET(reg,val) BSP_FLD32SET(reg, val,8, 9)
0440
0441 /* field: SBREAK - Synch break extend. These bits are effective in LIN mode only. */
0442 #define TMS570_LIN_COMP_SBREAK(val) BSP_FLD32(val,0, 2)
0443 #define TMS570_LIN_COMP_SBREAK_GET(reg) BSP_FLD32GET(reg,0, 2)
0444 #define TMS570_LIN_COMP_SBREAK_SET(reg,val) BSP_FLD32SET(reg, val,0, 2)
0445
0446
0447 /*-----------------------TMS570_LIN_RD0-----------------------*/
0448 /* field: RD0 - Receive buffer 0. Byte 0 of the response data byte. */
0449 #define TMS570_LIN_RD0_RD0(val) BSP_FLD32(val,24, 31)
0450 #define TMS570_LIN_RD0_RD0_GET(reg) BSP_FLD32GET(reg,24, 31)
0451 #define TMS570_LIN_RD0_RD0_SET(reg,val) BSP_FLD32SET(reg, val,24, 31)
0452
0453 /* field: RD1 - Receive buffer 1. Byte 1 of the response data byte. */
0454 #define TMS570_LIN_RD0_RD1(val) BSP_FLD32(val,16, 23)
0455 #define TMS570_LIN_RD0_RD1_GET(reg) BSP_FLD32GET(reg,16, 23)
0456 #define TMS570_LIN_RD0_RD1_SET(reg,val) BSP_FLD32SET(reg, val,16, 23)
0457
0458 /* field: RD2 - Receive buffer 2. Byte 2 of the response data byte. */
0459 #define TMS570_LIN_RD0_RD2(val) BSP_FLD32(val,8, 15)
0460 #define TMS570_LIN_RD0_RD2_GET(reg) BSP_FLD32GET(reg,8, 15)
0461 #define TMS570_LIN_RD0_RD2_SET(reg,val) BSP_FLD32SET(reg, val,8, 15)
0462
0463 /* field: RD3 - Receive buffer 3. Byte 3 of the response data byte. */
0464 #define TMS570_LIN_RD0_RD3(val) BSP_FLD32(val,0, 7)
0465 #define TMS570_LIN_RD0_RD3_GET(reg) BSP_FLD32GET(reg,0, 7)
0466 #define TMS570_LIN_RD0_RD3_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
0467
0468
0469 /*-----------------------TMS570_LIN_RD1-----------------------*/
0470 /* field: RD4 - Receive buffer 4. Byte 4 of the response data byte. */
0471 #define TMS570_LIN_RD1_RD4(val) BSP_FLD32(val,24, 31)
0472 #define TMS570_LIN_RD1_RD4_GET(reg) BSP_FLD32GET(reg,24, 31)
0473 #define TMS570_LIN_RD1_RD4_SET(reg,val) BSP_FLD32SET(reg, val,24, 31)
0474
0475 /* field: RD5 - Receive buffer 5. Byte 5 of the response data byte. */
0476 #define TMS570_LIN_RD1_RD5(val) BSP_FLD32(val,16, 23)
0477 #define TMS570_LIN_RD1_RD5_GET(reg) BSP_FLD32GET(reg,16, 23)
0478 #define TMS570_LIN_RD1_RD5_SET(reg,val) BSP_FLD32SET(reg, val,16, 23)
0479
0480 /* field: RD6 - Receive buffer 6. Byte 6 of the response data byte. */
0481 #define TMS570_LIN_RD1_RD6(val) BSP_FLD32(val,8, 15)
0482 #define TMS570_LIN_RD1_RD6_GET(reg) BSP_FLD32GET(reg,8, 15)
0483 #define TMS570_LIN_RD1_RD6_SET(reg,val) BSP_FLD32SET(reg, val,8, 15)
0484
0485 /* field: RD7 - Receive buffer 7. Byte 7 of the response data byte. */
0486 #define TMS570_LIN_RD1_RD7(val) BSP_FLD32(val,0, 7)
0487 #define TMS570_LIN_RD1_RD7_GET(reg) BSP_FLD32GET(reg,0, 7)
0488 #define TMS570_LIN_RD1_RD7_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
0489
0490
0491 /*----------------------TMS570_LIN_MASK----------------------*/
0492 /* field: RX_ID_MASK - Receive ID mask. These bits are effective in LIN mode only. */
0493 #define TMS570_LIN_MASK_RX_ID_MASK(val) BSP_FLD32(val,16, 23)
0494 #define TMS570_LIN_MASK_RX_ID_MASK_GET(reg) BSP_FLD32GET(reg,16, 23)
0495 #define TMS570_LIN_MASK_RX_ID_MASK_SET(reg,val) BSP_FLD32SET(reg, val,16, 23)
0496
0497 /* field: TX_ID_MASK - Transmit ID mask. These bits are effective in LIN mode only. */
0498 #define TMS570_LIN_MASK_TX_ID_MASK(val) BSP_FLD32(val,0, 7)
0499 #define TMS570_LIN_MASK_TX_ID_MASK_GET(reg) BSP_FLD32GET(reg,0, 7)
0500 #define TMS570_LIN_MASK_TX_ID_MASK_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
0501
0502
0503 /*-----------------------TMS570_LIN_ID-----------------------*/
0504 /* field: RECEIVED_ID - Received identification. These bits are effective in LIN mode only. */
0505 #define TMS570_LIN_ID_RECEIVED_ID(val) BSP_FLD32(val,16, 23)
0506 #define TMS570_LIN_ID_RECEIVED_ID_GET(reg) BSP_FLD32GET(reg,16, 23)
0507 #define TMS570_LIN_ID_RECEIVED_ID_SET(reg,val) BSP_FLD32SET(reg, val,16, 23)
0508
0509 /* field: ID_SLAVETASK_BYTE - ID-SlaveTask Byte. These bits are effective in LIN mode only. */
0510 #define TMS570_LIN_ID_ID_SLAVETASK_BYTE(val) BSP_FLD32(val,8, 15)
0511 #define TMS570_LIN_ID_ID_SLAVETASK_BYTE_GET(reg) BSP_FLD32GET(reg,8, 15)
0512 #define TMS570_LIN_ID_ID_SLAVETASK_BYTE_SET(reg,val) BSP_FLD32SET(reg, val,8, 15)
0513
0514 /* field: ID_BYTE - ID byte. This field is effective in LIN mode only. This byte is the LIN mode message ID. */
0515 #define TMS570_LIN_ID_ID_BYTE(val) BSP_FLD32(val,0, 7)
0516 #define TMS570_LIN_ID_ID_BYTE_GET(reg) BSP_FLD32GET(reg,0, 7)
0517 #define TMS570_LIN_ID_ID_BYTE_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
0518
0519
0520 /*-----------------------TMS570_LIN_TD0-----------------------*/
0521 /* field: TD0 - 8-Bit transmit buffer 0. */
0522 #define TMS570_LIN_TD0_TD0(val) BSP_FLD32(val,24, 31)
0523 #define TMS570_LIN_TD0_TD0_GET(reg) BSP_FLD32GET(reg,24, 31)
0524 #define TMS570_LIN_TD0_TD0_SET(reg,val) BSP_FLD32SET(reg, val,24, 31)
0525
0526 /* field: TD1 - 8-Bit transmit buffer 1. */
0527 #define TMS570_LIN_TD0_TD1(val) BSP_FLD32(val,16, 23)
0528 #define TMS570_LIN_TD0_TD1_GET(reg) BSP_FLD32GET(reg,16, 23)
0529 #define TMS570_LIN_TD0_TD1_SET(reg,val) BSP_FLD32SET(reg, val,16, 23)
0530
0531 /* field: TD2 - 8-Bit transmit buffer 2. */
0532 #define TMS570_LIN_TD0_TD2(val) BSP_FLD32(val,8, 15)
0533 #define TMS570_LIN_TD0_TD2_GET(reg) BSP_FLD32GET(reg,8, 15)
0534 #define TMS570_LIN_TD0_TD2_SET(reg,val) BSP_FLD32SET(reg, val,8, 15)
0535
0536 /* field: TD3 - 8-Bit transmit buffer 3. */
0537 #define TMS570_LIN_TD0_TD3(val) BSP_FLD32(val,0, 7)
0538 #define TMS570_LIN_TD0_TD3_GET(reg) BSP_FLD32GET(reg,0, 7)
0539 #define TMS570_LIN_TD0_TD3_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
0540
0541
0542 /*-----------------------TMS570_LIN_TD1-----------------------*/
0543 /* field: TD4 - 8-Bit transmit buffer 4. */
0544 #define TMS570_LIN_TD1_TD4(val) BSP_FLD32(val,24, 31)
0545 #define TMS570_LIN_TD1_TD4_GET(reg) BSP_FLD32GET(reg,24, 31)
0546 #define TMS570_LIN_TD1_TD4_SET(reg,val) BSP_FLD32SET(reg, val,24, 31)
0547
0548 /* field: TD5 - 8-Bit transmit buffer 5. */
0549 #define TMS570_LIN_TD1_TD5(val) BSP_FLD32(val,16, 23)
0550 #define TMS570_LIN_TD1_TD5_GET(reg) BSP_FLD32GET(reg,16, 23)
0551 #define TMS570_LIN_TD1_TD5_SET(reg,val) BSP_FLD32SET(reg, val,16, 23)
0552
0553 /* field: TD6 - 8-Bit transmit buffer 6. */
0554 #define TMS570_LIN_TD1_TD6(val) BSP_FLD32(val,8, 15)
0555 #define TMS570_LIN_TD1_TD6_GET(reg) BSP_FLD32GET(reg,8, 15)
0556 #define TMS570_LIN_TD1_TD6_SET(reg,val) BSP_FLD32SET(reg, val,8, 15)
0557
0558 /* field: TD7 - 8-Bit transmit buffer 7. */
0559 #define TMS570_LIN_TD1_TD7(val) BSP_FLD32(val,0, 7)
0560 #define TMS570_LIN_TD1_TD7_GET(reg) BSP_FLD32GET(reg,0, 7)
0561 #define TMS570_LIN_TD1_TD7_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
0562
0563
0564 /*----------------------TMS570_LIN_MBRSR----------------------*/
0565 /* field: MBR - Maximum baud rate prescaler. This bit is effective in LIN mode only. */
0566 #define TMS570_LIN_MBRSR_MBR(val) BSP_FLD32(val,0, 12)
0567 #define TMS570_LIN_MBRSR_MBR_GET(reg) BSP_FLD32GET(reg,0, 12)
0568 #define TMS570_LIN_MBRSR_MBR_SET(reg,val) BSP_FLD32SET(reg, val,0, 12)
0569
0570
0571 /*--------------------TMS570_LIN_IODFTCTRL--------------------*/
0572 /* field: FEN - Frame error enable. This bit is used to create a frame error. */
0573 #define TMS570_LIN_IODFTCTRL_FEN BSP_BIT32(26)
0574
0575 /* field: PEN - Parity error enable. This bit is used to create a parity error. */
0576 #define TMS570_LIN_IODFTCTRL_PEN BSP_BIT32(25)
0577
0578 /* field: BRKD_TENA - Break detect error enable. This bit is used to create a BRKDT error. */
0579 #define TMS570_LIN_IODFTCTRL_BRKD_TENA BSP_BIT32(24)
0580
0581 /* field: PIN_SAMPLE_MASK - Pin sample mask. */
0582 #define TMS570_LIN_IODFTCTRL_PIN_SAMPLE_MASK(val) BSP_FLD32(val,19, 20)
0583 #define TMS570_LIN_IODFTCTRL_PIN_SAMPLE_MASK_GET(reg) BSP_FLD32GET(reg,19, 20)
0584 #define TMS570_LIN_IODFTCTRL_PIN_SAMPLE_MASK_SET(reg,val) BSP_FLD32SET(reg, val,19, 20)
0585
0586 /* field: TX_SHIFT - Transmit shift. */
0587 #define TMS570_LIN_IODFTCTRL_TX_SHIFT(val) BSP_FLD32(val,16, 18)
0588 #define TMS570_LIN_IODFTCTRL_TX_SHIFT_GET(reg) BSP_FLD32GET(reg,16, 18)
0589 #define TMS570_LIN_IODFTCTRL_TX_SHIFT_SET(reg,val) BSP_FLD32SET(reg, val,16, 18)
0590
0591 /* field: IODFTENA - IODFT enable key. Write access permitted in Privilege mode only. */
0592 #define TMS570_LIN_IODFTCTRL_IODFTENA(val) BSP_FLD32(val,8, 11)
0593 #define TMS570_LIN_IODFTCTRL_IODFTENA_GET(reg) BSP_FLD32GET(reg,8, 11)
0594 #define TMS570_LIN_IODFTCTRL_IODFTENA_SET(reg,val) BSP_FLD32SET(reg, val,8, 11)
0595
0596 /* field: LPBENA - Module loopback enable. Write access permitted in Privilege mode only. */
0597 #define TMS570_LIN_IODFTCTRL_LPBENA BSP_BIT32(1)
0598
0599 /* field: RXPENA - Module analog loopback through receive pin enable. */
0600 #define TMS570_LIN_IODFTCTRL_RXPENA BSP_BIT32(0)
0601
0602
0603
0604 #endif /* LIBBSP_ARM_TMS570_LIN */