bsp/ti_herc/reg_flex_ray.h

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsARMTMS570
0007  *
0008  * @brief This header file provides FlexRay interfaces.
0009  */
0010
0011 /* The header file is generated by make_header.py from FLEX_RAY.json */
0012 /* Current script's version can be found at: */
0013 /* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
0014
0015 /*
0016  * Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
0017  *
0018  * Czech Technical University in Prague
0019  * Zikova 1903/4
0020  * 166 36 Praha 6
0021  * Czech Republic
0022  *
0023  * All rights reserved.
0024  *
0025  * Redistribution and use in source and binary forms, with or without
0026  * modification, are permitted provided that the following conditions are met:
0027  *
0028  * 1. Redistributions of source code must retain the above copyright notice, this
0029  *    list of conditions and the following disclaimer.
0030  * 2. Redistributions in binary form must reproduce the above copyright notice,
0031  *    this list of conditions and the following disclaimer in the documentation
0032  *    and/or other materials provided with the distribution.
0033  *
0034  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
0035  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
0036  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
0037  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
0038  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0039  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
0040  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
0041  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0042  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0043  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0044  *
0045  * The views and conclusions contained in the software and documentation are those
0046  * of the authors and should not be interpreted as representing official policies,
0047  * either expressed or implied, of the FreeBSD Project.
0048 */
0049 #ifndef LIBBSP_ARM_TMS570_FLEX_RAY
0050 #define LIBBSP_ARM_TMS570_FLEX_RAY
0051
0052 #include <bsp/utility.h>
0053
0054 typedef struct{
0055   uint32_t GSN0;              /*Global Static Number 0*/
0056   uint32_t GSN1;              /*Global Static Number 1*/
0057   uint8_t reserved1 [8];
0058   uint32_t GCS;               /*Global Control Set*/
0059   uint32_t GCR;               /*Global Control Reset*/
0060   uint32_t TSCB;              /*Transfer Status Current Buffer*/
0061   uint32_t LTBCC;             /*Last Transferred Buffer to Communication Controller*/
0062   uint32_t LTBSM;             /*Last Transferred Buffer to System Memory*/
0063   uint32_t TBA;               /*Transfer Base Address*/
0064   uint32_t NTBA;              /*Next Transfer Base Address*/
0065   uint32_t BAMS;              /*Base Address of Mirrored Status*/
0066   uint32_t SAMP;              /*Start Address of Memory Protection*/
0067   uint32_t EAMP;              /*End Address of Memory Protection*/
0068   uint8_t reserved2 [8];
0069   uint32_t TSMO1;             /*Transfer to System Memory Occurred 1*/
0070   uint32_t TSMO2;             /*Transfer to System Memory Occurred 2*/
0071   uint32_t TSMO3;             /*Transfer to System Memory Occurred 3*/
0072   uint32_t TSMO4;             /*Transfer to System Memory Occurred 4*/
0073   uint32_t TCCO1;             /*Transfer to Communication Controller Occurred 1*/
0074   uint32_t TCCO2;             /*Transfer to Communication Controller Occurred 2*/
0075   uint32_t TCCO3;             /*Transfer to Communication Controller Occurred 3*/
0076   uint32_t TCCO4;             /*Transfer to Communication Controller Occurred 4*/
0077   uint32_t TOOFF;             /*Transfer Occurred Offset*/
0078   uint8_t reserved3 [12];
0079   uint32_t PEADR;             /*Parity Error Address*/
0080   uint32_t TEIF;              /*Transfer Error Interrupt*/
0081   uint32_t TEIRES;            /*Transfer Error Interrupt Enable Set*/
0082   uint32_t TEIRER;            /*Transfer Error Interrupt Enable Reset*/
0083   uint32_t TTSMS1;            /*Trigger Transfer to System Memory Set 1*/
0084   uint32_t TTSMR1;            /*Trigger Transfer to System Memory Reset 1*/
0085   uint32_t TTSMS2;            /*Trigger Transfer to System Memory Set 2*/
0086   uint32_t TTSMR2;            /*Trigger Transfer to System Memory Reset 2*/
0087   uint32_t TTSMS3;            /*Trigger Transfer to System Memory Set 3*/
0088   uint32_t TTSMR3;            /*Trigger Transfer to System Memory Reset 3*/
0089   uint32_t TTSMS4;            /*Trigger Transfer to System Memory Set 4*/
0090   uint32_t TTSMR4;            /*Trigger Transfer to System Memory Reset 4*/
0091   uint32_t TTCCS1;            /*Trigger Transfer to Communication Controller Set 1*/
0092   uint32_t TTCCR1;            /*Trigger Transfer to Communication Controller Reset 1*/
0093   uint32_t TTCCS2;            /*Trigger Transfer to Communication Controller Set 2*/
0094   uint32_t TTCCR2;            /*Trigger Transfer to Communication Controller Reset 2*/
0095   uint32_t TTCCS3;            /*Trigger Transfer to Communication Controller Set 3*/
0096   uint32_t TTCCR3;            /*Trigger Transfer to Communication Controller Reset 3*/
0097   uint32_t TTCCS4;            /*Trigger Transfer to Communication Controller Set 4*/
0098   uint32_t TTCCR4;            /*Trigger Transfer to Communication Controller Reset 4*/
0099   uint32_t ETESMS1;           /*Enable Transfer on Event to System Memory Set 1*/
0100   uint32_t ETESMR1;           /*Enable Transfer on Event to System Memory Reset 1*/
0101   uint32_t ETESMS2;           /*Enable Transfer on Event to System Memory Set 2*/
0102   uint32_t ETESMR2;           /*Enable Transfer on Event to System Memory Reset 2*/
0103   uint32_t ETESMS3;           /*Enable Transfer on Event to System Memory Set 3*/
0104   uint32_t ETESMR3;           /*Enable Transfer on Event to System Memory Reset 3*/
0105   uint32_t ETESMS4;           /*Enable Transfer on Event to System Memory Set 4*/
0106   uint32_t ETESMR4;           /*Enable Transfer on Event to System Memory Reset 4*/
0107   uint32_t CESMS1;            /*Clear on Event to System Memory Set 1*/
0108   uint32_t CESMR1;            /*Clear on Event to System Memory Reset 1*/
0109   uint32_t CESMS2;            /*Clear on Event to System Memory Set 2*/
0110   uint32_t CESMR2;            /*Clear on Event to System Memory Reset 2*/
0111   uint32_t CESMS3;            /*Clear on Event to System Memory Set 3*/
0112   uint32_t CESMR3;            /*Clear on Event to System Memory Reset 3*/
0113   uint32_t CESMS4;            /*Clear on Event to System Memory Set 4*/
0114   uint32_t CESMR4;            /*Clear on Event to System Memory Reset 4*/
0115   uint32_t TSMIES1;           /*Transfer to System Memory Interrupt Enable Set 1*/
0116   uint32_t TSMIER1;           /*Transfer to System Memory Interrupt Enable Reset 1*/
0117   uint32_t TSMIES2;           /*Transfer to System Memory Interrupt Enable Set 2*/
0118   uint32_t TSMIER2;           /*Transfer to System Memory Interrupt Enable Reset 2*/
0119   uint32_t TSMIES3;           /*Transfer to System Memory Interrupt Enable Set 3*/
0120   uint32_t TSMIER3;           /*Transfer to System Memory Interrupt Enable Reset 3*/
0121   uint32_t TSMIES4;           /*Transfer to System Memory Interrupt Enable Set 4*/
0122   uint32_t TSMIER4;           /*Transfer to System Memory Interrupt Enable Reset 4*/
0123   uint32_t TCCIES1;           /*Transfer to Communication Controller Interrupt Enable Set 1*/
0124   uint32_t TCCIER1;           /*Transfer to Communication Controller Interrupt Enable Reset 1*/
0125   uint32_t TCCIES2;           /*Transfer to Communication Controller Interrupt Enable Set 2*/
0126   uint32_t TCCIER2;           /*Transfer to Communication Controller Interrupt Enable Reset 2*/
0127   uint32_t TCCIES3;           /*Transfer to Communication Controller Interrupt Enable Set 3*/
0128   uint32_t TCCIER3;           /*Transfer to Communication Controller Interrupt Enable Reset 3*/
0129   uint32_t TCCIES4;           /*Transfer to Communication Controller Interrupt Enable Set 4*/
0130   uint32_t TCCIER4;           /*Transfer to Communication Controller Interrupt Enable Reset 4*/
0131 } tms570_flex_ray_t;
0132
0133
0134 /*--------------------TMS570_FLEX_RAY_GSN0--------------------*/
0135 /* field: Data_A - Data_A(15-0) */
0136 #define TMS570_FLEX_RAY_GSN0_Data_A(val) BSP_FLD32(val,16, 31)
0137 #define TMS570_FLEX_RAY_GSN0_Data_A_GET(reg) BSP_FLD32GET(reg,16, 31)
0138 #define TMS570_FLEX_RAY_GSN0_Data_A_SET(reg,val) BSP_FLD32SET(reg, val,16, 31)
0139
0140 /* field: Data_B - (complement of Data_A(15-0)) */
0141 #define TMS570_FLEX_RAY_GSN0_Data_B(val) BSP_FLD32(val,0, 15)
0142 #define TMS570_FLEX_RAY_GSN0_Data_B_GET(reg) BSP_FLD32GET(reg,0, 15)
0143 #define TMS570_FLEX_RAY_GSN0_Data_B_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
0144
0145
0146 /*--------------------TMS570_FLEX_RAY_GSN1--------------------*/
0147 /* field: Data_C - Data_C(15-0) */
0148 #define TMS570_FLEX_RAY_GSN1_Data_C(val) BSP_FLD32(val,16, 31)
0149 #define TMS570_FLEX_RAY_GSN1_Data_C_GET(reg) BSP_FLD32GET(reg,16, 31)
0150 #define TMS570_FLEX_RAY_GSN1_Data_C_SET(reg,val) BSP_FLD32SET(reg, val,16, 31)
0151
0152 /* field: Data_D - (complement of Data_C(15-0)) */
0153 #define TMS570_FLEX_RAY_GSN1_Data_D(val) BSP_FLD32(val,0, 15)
0154 #define TMS570_FLEX_RAY_GSN1_Data_D_GET(reg) BSP_FLD32GET(reg,0, 15)
0155 #define TMS570_FLEX_RAY_GSN1_Data_D_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
0156
0157
0158 /*--------------------TMS570_FLEX_RAY_GCS--------------------*/
0159 /* field: ENDVBM - Endianness Correction on VBusp Master */
0160 #define TMS570_FLEX_RAY_GCS_ENDVBM BSP_BIT32(31)
0161
0162 /* field: ENDVBS - Endianness correction on VBusp Slave */
0163 #define TMS570_FLEX_RAY_GCS_ENDVBS BSP_BIT32(30)
0164
0165 /* field: ENDRx - Endianness Correction for No (header or payload) Data Sink Access */
0166 #define TMS570_FLEX_RAY_GCS_ENDRx(val) BSP_FLD32(val,28, 29)
0167 #define TMS570_FLEX_RAY_GCS_ENDRx_GET(reg) BSP_FLD32GET(reg,28, 29)
0168 #define TMS570_FLEX_RAY_GCS_ENDRx_SET(reg,val) BSP_FLD32SET(reg, val,28, 29)
0169
0170 /* field: ENDHx - Endianness Correction for Header */
0171 #define TMS570_FLEX_RAY_GCS_ENDHx(val) BSP_FLD32(val,26, 27)
0172 #define TMS570_FLEX_RAY_GCS_ENDHx_GET(reg) BSP_FLD32GET(reg,26, 27)
0173 #define TMS570_FLEX_RAY_GCS_ENDHx_SET(reg,val) BSP_FLD32SET(reg, val,26, 27)
0174
0175 /* field: ENDPx - Endianness Correction for Payload */
0176 #define TMS570_FLEX_RAY_GCS_ENDPx(val) BSP_FLD32(val,24, 25)
0177 #define TMS570_FLEX_RAY_GCS_ENDPx_GET(reg) BSP_FLD32GET(reg,24, 25)
0178 #define TMS570_FLEX_RAY_GCS_ENDPx_SET(reg,val) BSP_FLD32SET(reg, val,24, 25)
0179
0180 /* field: PRIO - Transfer Priority */
0181 #define TMS570_FLEX_RAY_GCS_PRIO BSP_BIT32(21)
0182
0183 /* field: PEFT - Parity for Test */
0184 #define TMS570_FLEX_RAY_GCS_PEFT BSP_BIT32(20)
0185
0186 /* field: PELx - Parity Lock */
0187 #define TMS570_FLEX_RAY_GCS_PELx(val) BSP_FLD32(val,16, 19)
0188 #define TMS570_FLEX_RAY_GCS_PELx_GET(reg) BSP_FLD32GET(reg,16, 19)
0189 #define TMS570_FLEX_RAY_GCS_PELx_SET(reg,val) BSP_FLD32SET(reg, val,16, 19)
0190
0191 /* field: CETESM - Clear ETESM Register */
0192 #define TMS570_FLEX_RAY_GCS_CETESM BSP_BIT32(14)
0193
0194 /* field: CTTCC - Clear TTCC Register */
0195 #define TMS570_FLEX_RAY_GCS_CTTCC BSP_BIT32(13)
0196
0197 /* field: CTTSM - Clear TTSM Register */
0198 #define TMS570_FLEX_RAY_GCS_CTTSM BSP_BIT32(12)
0199
0200 /* field: ETSM - Enable Transfer Status Mirrored */
0201 #define TMS570_FLEX_RAY_GCS_ETSM BSP_BIT32(8)
0202
0203 /* field: SILE - Status Interrupt Line Enable */
0204 #define TMS570_FLEX_RAY_GCS_SILE BSP_BIT32(5)
0205
0206 /* field: EILE - Error Interrupt Line Enable */
0207 #define TMS570_FLEX_RAY_GCS_EILE BSP_BIT32(4)
0208
0209 /* field: TUH - Transfer Unit Halted */
0210 #define TMS570_FLEX_RAY_GCS_TUH BSP_BIT32(1)
0211
0212 /* field: TUE - Transfer Unit Enabled */
0213 #define TMS570_FLEX_RAY_GCS_TUE BSP_BIT32(0)
0214
0215
0216 /*--------------------TMS570_FLEX_RAY_GCR--------------------*/
0217 /* field: ENDVBM - Endianness Correction on VBusp Master */
0218 #define TMS570_FLEX_RAY_GCR_ENDVBM BSP_BIT32(31)
0219
0220 /* field: ENDVBS - Endianness correction on VBusp Slave */
0221 #define TMS570_FLEX_RAY_GCR_ENDVBS BSP_BIT32(30)
0222
0223 /* field: ENDRx - Endianness Correction for No (header or payload) Data Sink Access */
0224 #define TMS570_FLEX_RAY_GCR_ENDRx(val) BSP_FLD32(val,28, 29)
0225 #define TMS570_FLEX_RAY_GCR_ENDRx_GET(reg) BSP_FLD32GET(reg,28, 29)
0226 #define TMS570_FLEX_RAY_GCR_ENDRx_SET(reg,val) BSP_FLD32SET(reg, val,28, 29)
0227
0228 /* field: ENDHx - Endianness Correction for Header */
0229 #define TMS570_FLEX_RAY_GCR_ENDHx(val) BSP_FLD32(val,26, 27)
0230 #define TMS570_FLEX_RAY_GCR_ENDHx_GET(reg) BSP_FLD32GET(reg,26, 27)
0231 #define TMS570_FLEX_RAY_GCR_ENDHx_SET(reg,val) BSP_FLD32SET(reg, val,26, 27)
0232
0233 /* field: ENDPx - Endianness Correction for Payload */
0234 #define TMS570_FLEX_RAY_GCR_ENDPx(val) BSP_FLD32(val,24, 25)
0235 #define TMS570_FLEX_RAY_GCR_ENDPx_GET(reg) BSP_FLD32GET(reg,24, 25)
0236 #define TMS570_FLEX_RAY_GCR_ENDPx_SET(reg,val) BSP_FLD32SET(reg, val,24, 25)
0237
0238 /* field: PRIO - Transfer Priority */
0239 #define TMS570_FLEX_RAY_GCR_PRIO BSP_BIT32(21)
0240
0241 /* field: PEFT - Parity for Test */
0242 #define TMS570_FLEX_RAY_GCR_PEFT BSP_BIT32(20)
0243
0244 /* field: PELx - Parity Lock */
0245 #define TMS570_FLEX_RAY_GCR_PELx(val) BSP_FLD32(val,16, 19)
0246 #define TMS570_FLEX_RAY_GCR_PELx_GET(reg) BSP_FLD32GET(reg,16, 19)
0247 #define TMS570_FLEX_RAY_GCR_PELx_SET(reg,val) BSP_FLD32SET(reg, val,16, 19)
0248
0249 /* field: CETESM - Clear ETESM Register */
0250 #define TMS570_FLEX_RAY_GCR_CETESM BSP_BIT32(14)
0251
0252 /* field: CTTCC - Clear TTCC Register */
0253 #define TMS570_FLEX_RAY_GCR_CTTCC BSP_BIT32(13)
0254
0255 /* field: CTTSM - Clear TTSM Register */
0256 #define TMS570_FLEX_RAY_GCR_CTTSM BSP_BIT32(12)
0257
0258 /* field: ETSM - Enable Transfer Status Mirrored */
0259 #define TMS570_FLEX_RAY_GCR_ETSM BSP_BIT32(8)
0260
0261 /* field: SILE - Status Interrupt Line Enable */
0262 #define TMS570_FLEX_RAY_GCR_SILE BSP_BIT32(5)
0263
0264 /* field: EILE - Error Interrupt Line Enable */
0265 #define TMS570_FLEX_RAY_GCR_EILE BSP_BIT32(4)
0266
0267 /* field: TUH - Transfer Unit Halted */
0268 #define TMS570_FLEX_RAY_GCR_TUH BSP_BIT32(1)
0269
0270 /* field: TUE - Transfer Unit Enabled */
0271 #define TMS570_FLEX_RAY_GCR_TUE BSP_BIT32(0)
0272
0273
0274 /*--------------------TMS570_FLEX_RAY_TSCB--------------------*/
0275 /* field: TSMS - Transfer State Machine Status */
0276 #define TMS570_FLEX_RAY_TSCB_TSMS(val) BSP_FLD32(val,16, 20)
0277 #define TMS570_FLEX_RAY_TSCB_TSMS_GET(reg) BSP_FLD32GET(reg,16, 20)
0278 #define TMS570_FLEX_RAY_TSCB_TSMS_SET(reg,val) BSP_FLD32SET(reg, val,16, 20)
0279
0280 /* field: STUH - Status of Transfer Unit State Machine for Halt Detection */
0281 #define TMS570_FLEX_RAY_TSCB_STUH BSP_BIT32(12)
0282
0283 /* field: IDLE - Detects Transfer State Machine State IDLE */
0284 #define TMS570_FLEX_RAY_TSCB_IDLE BSP_BIT32(8)
0285
0286 /* field: BN - Buffer Number */
0287 #define TMS570_FLEX_RAY_TSCB_BN(val) BSP_FLD32(val,0, 6)
0288 #define TMS570_FLEX_RAY_TSCB_BN_GET(reg) BSP_FLD32GET(reg,0, 6)
0289 #define TMS570_FLEX_RAY_TSCB_BN_SET(reg,val) BSP_FLD32SET(reg, val,0, 6)
0290
0291
0292 /*-------------------TMS570_FLEX_RAY_LTBCC-------------------*/
0293 /* field: BN - Buffer number. */
0294 #define TMS570_FLEX_RAY_LTBCC_BN(val) BSP_FLD32(val,0, 6)
0295 #define TMS570_FLEX_RAY_LTBCC_BN_GET(reg) BSP_FLD32GET(reg,0, 6)
0296 #define TMS570_FLEX_RAY_LTBCC_BN_SET(reg,val) BSP_FLD32SET(reg, val,0, 6)
0297
0298
0299 /*-------------------TMS570_FLEX_RAY_LTBSM-------------------*/
0300 /* field: BN - Buffer number. */
0301 #define TMS570_FLEX_RAY_LTBSM_BN(val) BSP_FLD32(val,0, 6)
0302 #define TMS570_FLEX_RAY_LTBSM_BN_GET(reg) BSP_FLD32GET(reg,0, 6)
0303 #define TMS570_FLEX_RAY_LTBSM_BN_SET(reg,val) BSP_FLD32SET(reg, val,0, 6)
0304
0305
0306 /*--------------------TMS570_FLEX_RAY_TBA--------------------*/
0307 /* field: TBA - Transfer Base Address. */
0308 /* Whole 32 bits */
0309
0310 /*--------------------TMS570_FLEX_RAY_NTBA--------------------*/
0311 /* field: nTBA - nTBA(31-0) */
0312 /* Whole 32 bits */
0313
0314 /*--------------------TMS570_FLEX_RAY_BAMS--------------------*/
0315 /* field: BAMS - Base Address of Mirrored Status32-bit base pointer, 2 LSB are not significant (32-bit */
0316 /* Whole 32 bits */
0317
0318 /*--------------------TMS570_FLEX_RAY_SAMP--------------------*/
0319 /* field: SAMP - Start Address Memory Protection. */
0320 /* Whole 32 bits */
0321
0322 /*--------------------TMS570_FLEX_RAY_EAMP--------------------*/
0323 /* field: EAMP - End Address Memory Protection. */
0324 /* Whole 32 bits */
0325
0326 /*-------------------TMS570_FLEX_RAY_TSMO1-------------------*/
0327 /* field: TSMO1 - Transfer to System Memory Occurred Register 1. */
0328 /* Whole 32 bits */
0329
0330 /*-------------------TMS570_FLEX_RAY_TSMO2-------------------*/
0331 /* field: TSMO1 - Transfer to System Memory Occurred Register 1. */
0332 /* Whole 32 bits */
0333
0334 /*-------------------TMS570_FLEX_RAY_TSMO3-------------------*/
0335 /* field: TSMO1 - Transfer to System Memory Occurred Register 1. */
0336 /* Whole 32 bits */
0337
0338 /*-------------------TMS570_FLEX_RAY_TSMO4-------------------*/
0339 /* field: TSMO1 - Transfer to System Memory Occurred Register 1. */
0340 /* Whole 32 bits */
0341
0342 /*-------------------TMS570_FLEX_RAY_TCCO1-------------------*/
0343 /* field: TCCO1 - Transfer to Communication Controller Occurred Register 1. */
0344 /* Whole 32 bits */
0345
0346 /*-------------------TMS570_FLEX_RAY_TCCO2-------------------*/
0347 /* field: TCCO1 - Transfer to Communication Controller Occurred Register 1. */
0348 /* Whole 32 bits */
0349
0350 /*-------------------TMS570_FLEX_RAY_TCCO3-------------------*/
0351 /* field: TCCO1 - Transfer to Communication Controller Occurred Register 1. */
0352 /* Whole 32 bits */
0353
0354 /*-------------------TMS570_FLEX_RAY_TCCO4-------------------*/
0355 /* field: TCCO1 - Transfer to Communication Controller Occurred Register 1. */
0356 /* Whole 32 bits */
0357
0358 /*-------------------TMS570_FLEX_RAY_TOOFF-------------------*/
0359 /* field: TDIR - Transfer Direction. */
0360 #define TMS570_FLEX_RAY_TOOFF_TDIR BSP_BIT32(8)
0361
0362 /* field: OFF - Offset Vector */
0363 #define TMS570_FLEX_RAY_TOOFF_OFF(val) BSP_FLD32(val,0, 7)
0364 #define TMS570_FLEX_RAY_TOOFF_OFF_GET(reg) BSP_FLD32GET(reg,0, 7)
0365 #define TMS570_FLEX_RAY_TOOFF_OFF_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
0366
0367
0368 /*-------------------TMS570_FLEX_RAY_PEADR-------------------*/
0369 /* field: ADR - Address of failing TCR location. */
0370 #define TMS570_FLEX_RAY_PEADR_ADR(val) BSP_FLD32(val,0, 8)
0371 #define TMS570_FLEX_RAY_PEADR_ADR_GET(reg) BSP_FLD32GET(reg,0, 8)
0372 #define TMS570_FLEX_RAY_PEADR_ADR_SET(reg,val) BSP_FLD32SET(reg, val,0, 8)
0373
0374
0375 /*--------------------TMS570_FLEX_RAY_TEIF--------------------*/
0376 /* field: MPV - Memory Protection Violation. */
0377 #define TMS570_FLEX_RAY_TEIF_MPV BSP_BIT32(17)
0378
0379 /* field: PE - Parity Error. The flag signals a parity error to the host. */
0380 #define TMS570_FLEX_RAY_TEIF_PE BSP_BIT32(16)
0381
0382 /* field: RSTAT - Status of VBUS on read transfers. */
0383 #define TMS570_FLEX_RAY_TEIF_RSTAT(val) BSP_FLD32(val,8, 10)
0384 #define TMS570_FLEX_RAY_TEIF_RSTAT_GET(reg) BSP_FLD32GET(reg,8, 10)
0385 #define TMS570_FLEX_RAY_TEIF_RSTAT_SET(reg,val) BSP_FLD32SET(reg, val,8, 10)
0386
0387 /* field: WSTAT - Status of VBUS on write transfers. */
0388 #define TMS570_FLEX_RAY_TEIF_WSTAT(val) BSP_FLD32(val,4, 6)
0389 #define TMS570_FLEX_RAY_TEIF_WSTAT_GET(reg) BSP_FLD32GET(reg,4, 6)
0390 #define TMS570_FLEX_RAY_TEIF_WSTAT_SET(reg,val) BSP_FLD32SET(reg, val,4, 6)
0391
0392 /* field: TNR - Transfer Not Ready. */
0393 #define TMS570_FLEX_RAY_TEIF_TNR BSP_BIT32(1)
0394
0395 /* field: FAC - Forbidden Access. */
0396 #define TMS570_FLEX_RAY_TEIF_FAC BSP_BIT32(0)
0397
0398
0399 /*-------------------TMS570_FLEX_RAY_TEIRES-------------------*/
0400 /* field: RSTATE - Read Error Interrupt Generation (interrupt generation on VBUS read transfer errors). */
0401 #define TMS570_FLEX_RAY_TEIRES_RSTATE(val) BSP_FLD32(val,8, 10)
0402 #define TMS570_FLEX_RAY_TEIRES_RSTATE_GET(reg) BSP_FLD32GET(reg,8, 10)
0403 #define TMS570_FLEX_RAY_TEIRES_RSTATE_SET(reg,val) BSP_FLD32SET(reg, val,8, 10)
0404
0405 /* field: WSTATE - Write Error Interrupt Generation (interrupt generation on VBUS write transfer errors). */
0406 #define TMS570_FLEX_RAY_TEIRES_WSTATE(val) BSP_FLD32(val,4, 6)
0407 #define TMS570_FLEX_RAY_TEIRES_WSTATE_GET(reg) BSP_FLD32GET(reg,4, 6)
0408 #define TMS570_FLEX_RAY_TEIRES_WSTATE_SET(reg,val) BSP_FLD32SET(reg, val,4, 6)
0409
0410 /* field: TNRE - Transfer Not Ready Enable. */
0411 #define TMS570_FLEX_RAY_TEIRES_TNRE BSP_BIT32(1)
0412
0413 /* field: FACE - Forbidden Access Enable. */
0414 #define TMS570_FLEX_RAY_TEIRES_FACE BSP_BIT32(0)
0415
0416
0417 /*-------------------TMS570_FLEX_RAY_TEIRER-------------------*/
0418 /* field: RSTATE - Read Error Interrupt Generation (interrupt generation on VBUS read transfer errors). */
0419 #define TMS570_FLEX_RAY_TEIRER_RSTATE(val) BSP_FLD32(val,8, 10)
0420 #define TMS570_FLEX_RAY_TEIRER_RSTATE_GET(reg) BSP_FLD32GET(reg,8, 10)
0421 #define TMS570_FLEX_RAY_TEIRER_RSTATE_SET(reg,val) BSP_FLD32SET(reg, val,8, 10)
0422
0423 /* field: WSTATE - Write Error Interrupt Generation (interrupt generation on VBUS write transfer errors). */
0424 #define TMS570_FLEX_RAY_TEIRER_WSTATE(val) BSP_FLD32(val,4, 6)
0425 #define TMS570_FLEX_RAY_TEIRER_WSTATE_GET(reg) BSP_FLD32GET(reg,4, 6)
0426 #define TMS570_FLEX_RAY_TEIRER_WSTATE_SET(reg,val) BSP_FLD32SET(reg, val,4, 6)
0427
0428 /* field: TNRE - Transfer Not Ready Enable. */
0429 #define TMS570_FLEX_RAY_TEIRER_TNRE BSP_BIT32(1)
0430
0431 /* field: FACE - Forbidden Access Enable. */
0432 #define TMS570_FLEX_RAY_TEIRER_FACE BSP_BIT32(0)
0433
0434
0435 /*-------------------TMS570_FLEX_RAY_TTSMS1-------------------*/
0436 /* field: TTSMS1 - Trigger Transfer to System Memory Set 1. */
0437 /* Whole 32 bits */
0438
0439 /*-------------------TMS570_FLEX_RAY_TTSMR1-------------------*/
0440 /* field: TTSMS1 - Trigger Transfer to System Memory Set 1. */
0441 /* Whole 32 bits */
0442
0443 /*-------------------TMS570_FLEX_RAY_TTSMS2-------------------*/
0444 /* field: TTSMS1 - Trigger Transfer to System Memory Set 1. */
0445 /* Whole 32 bits */
0446
0447 /*-------------------TMS570_FLEX_RAY_TTSMR2-------------------*/
0448 /* field: TTSMS1 - Trigger Transfer to System Memory Set 1. */
0449 /* Whole 32 bits */
0450
0451 /*-------------------TMS570_FLEX_RAY_TTSMS3-------------------*/
0452 /* field: TTSMS1 - Trigger Transfer to System Memory Set 1. */
0453 /* Whole 32 bits */
0454
0455 /*-------------------TMS570_FLEX_RAY_TTSMR3-------------------*/
0456 /* field: TTSMS1 - Trigger Transfer to System Memory Set 1. */
0457 /* Whole 32 bits */
0458
0459 /*-------------------TMS570_FLEX_RAY_TTSMS4-------------------*/
0460 /* field: TTSMS1 - Trigger Transfer to System Memory Set 1. */
0461 /* Whole 32 bits */
0462
0463 /*-------------------TMS570_FLEX_RAY_TTSMR4-------------------*/
0464 /* field: TTSMS1 - Trigger Transfer to System Memory Set 1. */
0465 /* Whole 32 bits */
0466
0467 /*-------------------TMS570_FLEX_RAY_TTCCS1-------------------*/
0468 /* field: TTCCS1 - Trigger Transfer to Communication Controller Set 1. */
0469 /* Whole 32 bits */
0470
0471 /*-------------------TMS570_FLEX_RAY_TTCCR1-------------------*/
0472 /* field: TTCCS1 - Trigger Transfer to Communication Controller Set 1. */
0473 /* Whole 32 bits */
0474
0475 /*-------------------TMS570_FLEX_RAY_TTCCS2-------------------*/
0476 /* field: TTCCS1 - Trigger Transfer to Communication Controller Set 1. */
0477 /* Whole 32 bits */
0478
0479 /*-------------------TMS570_FLEX_RAY_TTCCR2-------------------*/
0480 /* field: TTCCS1 - Trigger Transfer to Communication Controller Set 1. */
0481 /* Whole 32 bits */
0482
0483 /*-------------------TMS570_FLEX_RAY_TTCCS3-------------------*/
0484 /* field: TTCCS1 - Trigger Transfer to Communication Controller Set 1. */
0485 /* Whole 32 bits */
0486
0487 /*-------------------TMS570_FLEX_RAY_TTCCR3-------------------*/
0488 /* field: TTCCS1 - Trigger Transfer to Communication Controller Set 1. */
0489 /* Whole 32 bits */
0490
0491 /*-------------------TMS570_FLEX_RAY_TTCCS4-------------------*/
0492 /* field: TTCCS1 - Trigger Transfer to Communication Controller Set 1. */
0493 /* Whole 32 bits */
0494
0495 /*-------------------TMS570_FLEX_RAY_TTCCR4-------------------*/
0496 /* field: TTCCS1 - Trigger Transfer to Communication Controller Set 1. */
0497 /* Whole 32 bits */
0498
0499 /*------------------TMS570_FLEX_RAY_ETESMS1------------------*/
0500 /* field: ETESMS1 - Enable Transfer on Event to System Memory Set 1. */
0501 /* Whole 32 bits */
0502
0503 /*------------------TMS570_FLEX_RAY_ETESMR1------------------*/
0504 /* field: ETESMS1 - Enable Transfer on Event to System Memory Set 1. */
0505 /* Whole 32 bits */
0506
0507 /*------------------TMS570_FLEX_RAY_ETESMS2------------------*/
0508 /* field: ETESMS1 - Enable Transfer on Event to System Memory Set 1. */
0509 /* Whole 32 bits */
0510
0511 /*------------------TMS570_FLEX_RAY_ETESMR2------------------*/
0512 /* field: ETESMS1 - message buffers 0 to 31. */
0513 /* Whole 32 bits */
0514
0515 /*------------------TMS570_FLEX_RAY_ETESMS3------------------*/
0516 /* field: ETESMS1 - Enable Transfer on Event to System Memory Set 1. */
0517 /* Whole 32 bits */
0518
0519 /*------------------TMS570_FLEX_RAY_ETESMR3------------------*/
0520 /* field: ETESMS1 - Enable Transfer on Event to System Memory Set 1. */
0521 /* Whole 32 bits */
0522
0523 /*------------------TMS570_FLEX_RAY_ETESMS4------------------*/
0524 /* field: ETESMS1 - Enable Transfer on Event to System Memory Set 1. */
0525 /* Whole 32 bits */
0526
0527 /*------------------TMS570_FLEX_RAY_ETESMR4------------------*/
0528 /* field: ETESMS1 - message buffers 0 to 31. */
0529 /* Whole 32 bits */
0530
0531 /*-------------------TMS570_FLEX_RAY_CESMS1-------------------*/
0532 /* field: CESMS1 - Clear on Event to System Memory Set 1. */
0533 /* Whole 32 bits */
0534
0535 /*-------------------TMS570_FLEX_RAY_CESMR1-------------------*/
0536 /* field: CESMS1 - Clear on Event to System Memory Set 1. */
0537 /* Whole 32 bits */
0538
0539 /*-------------------TMS570_FLEX_RAY_CESMS2-------------------*/
0540 /* field: CESMS1 - Clear on Event to System Memory Set 1. */
0541 /* Whole 32 bits */
0542
0543 /*-------------------TMS570_FLEX_RAY_CESMR2-------------------*/
0544 /* field: CESMS1 - Clear on Event to System Memory Set 1. */
0545 /* Whole 32 bits */
0546
0547 /*-------------------TMS570_FLEX_RAY_CESMS3-------------------*/
0548 /* field: CESMS1 - Clear on Event to System Memory Set 1. */
0549 /* Whole 32 bits */
0550
0551 /*-------------------TMS570_FLEX_RAY_CESMR3-------------------*/
0552 /* field: CESMS1 - CESMS1(31-0) */
0553 /* Whole 32 bits */
0554
0555 /*-------------------TMS570_FLEX_RAY_CESMS4-------------------*/
0556 /* field: CESMS1 - Clear on Event to System Memory Set 1. */
0557 /* Whole 32 bits */
0558
0559 /*-------------------TMS570_FLEX_RAY_CESMR4-------------------*/
0560 /* field: CESMS1 - Clear on Event to System Memory Set 1. */
0561 /* Whole 32 bits */
0562
0563 /*------------------TMS570_FLEX_RAY_TSMIES1------------------*/
0564 /* field: TTSMIES1 - Transfer to System Memory Interrupt Enable Set 1. */
0565 /* Whole 32 bits */
0566
0567 /*------------------TMS570_FLEX_RAY_TSMIER1------------------*/
0568 /* field: TTSMIES1 - Transfer to System Memory Interrupt Enable Set 1. */
0569 /* Whole 32 bits */
0570
0571 /*------------------TMS570_FLEX_RAY_TSMIES2------------------*/
0572 /* field: TTSMIES1 - Transfer to System Memory Interrupt Enable Set 1. */
0573 /* Whole 32 bits */
0574
0575 /*------------------TMS570_FLEX_RAY_TSMIER2------------------*/
0576 /* field: TTSMIES1 - Transfer to System Memory Interrupt Enable Set 1. */
0577 /* Whole 32 bits */
0578
0579 /*------------------TMS570_FLEX_RAY_TSMIES3------------------*/
0580 /* field: TTSMIES1 - Transfer to System Memory Interrupt Enable Set 1. */
0581 /* Whole 32 bits */
0582
0583 /*------------------TMS570_FLEX_RAY_TSMIER3------------------*/
0584 /* field: TTSMIES1 - Transfer to System Memory Interrupt Enable Set 1. */
0585 /* Whole 32 bits */
0586
0587 /*------------------TMS570_FLEX_RAY_TSMIES4------------------*/
0588 /* field: TTSMIES1 - Transfer to System Memory Interrupt Enable Set 1. */
0589 /* Whole 32 bits */
0590
0591 /*------------------TMS570_FLEX_RAY_TSMIER4------------------*/
0592 /* field: TTSMIES1 - Transfer to System Memory Interrupt Enable Set 1. */
0593 /* Whole 32 bits */
0594
0595 /*------------------TMS570_FLEX_RAY_TCCIES1------------------*/
0596 /* field: TCCIES1 - Transfer to Communication Controller Interrupt Enable Set 1. */
0597 /* Whole 32 bits */
0598
0599 /*------------------TMS570_FLEX_RAY_TCCIER1------------------*/
0600 /* field: TCCIES1 - Transfer to Communication Controller Interrupt Enable Set 1. */
0601 /* Whole 32 bits */
0602
0603 /*------------------TMS570_FLEX_RAY_TCCIES2------------------*/
0604 /* field: TCCIES1 - Transfer to Communication Controller Interrupt Enable Set 1. */
0605 /* Whole 32 bits */
0606
0607 /*------------------TMS570_FLEX_RAY_TCCIER2------------------*/
0608 /* field: TCCIES1 - to message buffers 0 to 31. */
0609 /* Whole 32 bits */
0610
0611 /*------------------TMS570_FLEX_RAY_TCCIES3------------------*/
0612 /* field: TCCIES1 - Transfer to Communication Controller Interrupt Enable Set 1. */
0613 /* Whole 32 bits */
0614
0615 /*------------------TMS570_FLEX_RAY_TCCIER3------------------*/
0616 /* field: TCCIES1 - Transfer to Communication Controller Interrupt Enable Set 1. */
0617 /* Whole 32 bits */
0618
0619 /*------------------TMS570_FLEX_RAY_TCCIES4------------------*/
0620 /* field: TCCIES1 - Transfer to Communication Controller Interrupt Enable Set 1. */
0621 /* Whole 32 bits */
0622
0623 /*------------------TMS570_FLEX_RAY_TCCIER4------------------*/
0624 /* field: TCCIES1 - Transfer to Communication Controller Interrupt Enable Set 1. */
0625 /* Whole 32 bits */
0626
0627
0628 #endif /* LIBBSP_ARM_TMS570_FLEX_RAY */