bsp/ti_herc/reg_esm.h

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsARMTMS570
0007  *
0008  * @brief This header file provides ESM interfaces.
0009  */
0010
0011 /* The header file is generated by make_header.py from ESM.json */
0012 /* Current script's version can be found at: */
0013 /* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
0014
0015 /*
0016  * Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
0017  *
0018  * Czech Technical University in Prague
0019  * Zikova 1903/4
0020  * 166 36 Praha 6
0021  * Czech Republic
0022  *
0023  * All rights reserved.
0024  *
0025  * Redistribution and use in source and binary forms, with or without
0026  * modification, are permitted provided that the following conditions are met:
0027  *
0028  * 1. Redistributions of source code must retain the above copyright notice, this
0029  *    list of conditions and the following disclaimer.
0030  * 2. Redistributions in binary form must reproduce the above copyright notice,
0031  *    this list of conditions and the following disclaimer in the documentation
0032  *    and/or other materials provided with the distribution.
0033  *
0034  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
0035  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
0036  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
0037  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
0038  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0039  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
0040  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
0041  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0042  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0043  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0044  *
0045  * The views and conclusions contained in the software and documentation are those
0046  * of the authors and should not be interpreted as representing official policies,
0047  * either expressed or implied, of the FreeBSD Project.
0048 */
0049 #ifndef LIBBSP_ARM_TMS570_ESM
0050 #define LIBBSP_ARM_TMS570_ESM
0051
0052 #include <bsp/utility.h>
0053
0054 typedef struct{
0055   uint32_t EEPAPR1;           /*ESM Enable ERROR Pin Action/Response Register 1*/
0056   uint32_t DEPAPR1;           /*ESM Disable ERROR Pin Action/Response Register 1*/
0057   uint32_t IESR1;             /*ESM Interrupt Enable Set/Status Register 1*/
0058   uint32_t IECR1;             /*ESM Interrupt Enable Clear/Status Register 1*/
0059   uint32_t ILSR1;             /*Interrupt Level Set/Status Register 1*/
0060   uint32_t ILCR1;             /*Interrupt Level Clear/Status Register 1*/
0061   uint32_t SR[3];             /*ESM Status Register*/
0062   uint32_t EPSR;              /*ESM ERROR Pin Status Register*/
0063   uint32_t IOFFHR;            /*ESM Interrupt Offset High Register*/
0064   uint32_t IOFFLR;            /*ESM Interrupt Offset Low Register*/
0065   uint32_t LTCR;              /*ESM Low-Time Counter Register*/
0066   uint32_t LTCPR;             /*ESM Low-Time Counter Preload Register*/
0067   uint32_t EKR;               /*ESM Error Key Register*/
0068   uint32_t SSR2;              /*ESM Status Shadow Register 2*/
0069   uint32_t IEPSR4;            /*ESM Influence ERROR Pin Set/Status Register 4*/
0070   uint32_t IEPCR4;            /*ESM Influence ERROR Pin Clear/Status Register 4*/
0071   uint32_t IESR4;             /*ESM Interrupt Enable Set/Status Register 4*/
0072   uint32_t IECR4;             /*ESM Interrupt Enable Clear/Status Register 4*/
0073   uint32_t ILSR4;             /*Interrupt Level Set/Status Register 4*/
0074   uint32_t ILCR4;             /*Interrupt Level Clear/Status Register 4*/
0075   uint32_t SR4;               /*ESM Status Register 4*/
0076 } tms570_esm_t;
0077
0078
0079 /*---------------------TMS570_ESM_EEPAPR1---------------------*/
0080 /* field: IEPSET - Enable ERROR Pin Action/Response on Group 1. */
0081 /* Whole 32 bits */
0082
0083 /*---------------------TMS570_ESM_DEPAPR1---------------------*/
0084 /* field: IEPCLR - Disable ERROR Pin Action/Response on Group 1. */
0085 /* Whole 32 bits */
0086
0087 /*----------------------TMS570_ESM_IESR1----------------------*/
0088 /* field: INTENSET - Set interrupt Enable */
0089 /* Whole 32 bits */
0090
0091 /*----------------------TMS570_ESM_IECR1----------------------*/
0092 /* field: INTENCLR - Clear Interrupt Enable */
0093 /* Whole 32 bits */
0094
0095 /*----------------------TMS570_ESM_ILSR1----------------------*/
0096 /* field: INTLVLSET - Set Interrupt Priority */
0097 /* Whole 32 bits */
0098
0099 /*----------------------TMS570_ESM_ILCR1----------------------*/
0100 /* field: INTLVLCLR - Clear Interrupt Priority. */
0101 /* Whole 32 bits */
0102
0103 /*-----------------------TMS570_ESM_SR-----------------------*/
0104 /* field: ESF - Error Status Flag. Provides status information on a pending error. */
0105 /* Whole 32 bits */
0106
0107 /*----------------------TMS570_ESM_EPSR----------------------*/
0108 /* field: EPSF - ERROR Pin Status Flag. Provides status information for the ERROR Pin. */
0109 #define TMS570_ESM_EPSR_EPSF BSP_BIT32(0)
0110
0111
0112 /*---------------------TMS570_ESM_IOFFHR---------------------*/
0113 /* field: INTOFFH - Offset High Level Interrupt. */
0114 #define TMS570_ESM_IOFFHR_INTOFFH(val) BSP_FLD32(val,0, 6)
0115 #define TMS570_ESM_IOFFHR_INTOFFH_GET(reg) BSP_FLD32GET(reg,0, 6)
0116 #define TMS570_ESM_IOFFHR_INTOFFH_SET(reg,val) BSP_FLD32SET(reg, val,0, 6)
0117
0118
0119 /*---------------------TMS570_ESM_IOFFLR---------------------*/
0120 /* field: INTOFFL - Offset Low Level Interrupt. */
0121 #define TMS570_ESM_IOFFLR_INTOFFL(val) BSP_FLD32(val,0, 6)
0122 #define TMS570_ESM_IOFFLR_INTOFFL_GET(reg) BSP_FLD32GET(reg,0, 6)
0123 #define TMS570_ESM_IOFFLR_INTOFFL_SET(reg,val) BSP_FLD32SET(reg, val,0, 6)
0124
0125
0126 /*----------------------TMS570_ESM_LTCR----------------------*/
0127 /* field: LTC - ERROR Pin Low-Time Counter */
0128 #define TMS570_ESM_LTCR_LTC(val) BSP_FLD32(val,0, 15)
0129 #define TMS570_ESM_LTCR_LTC_GET(reg) BSP_FLD32GET(reg,0, 15)
0130 #define TMS570_ESM_LTCR_LTC_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
0131
0132
0133 /*----------------------TMS570_ESM_LTCPR----------------------*/
0134 /* field: LTCP - ERROR Pin Low-Time Counter Pre-load Value */
0135 #define TMS570_ESM_LTCPR_LTCP(val) BSP_FLD32(val,0, 15)
0136 #define TMS570_ESM_LTCPR_LTCP_GET(reg) BSP_FLD32GET(reg,0, 15)
0137 #define TMS570_ESM_LTCPR_LTCP_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
0138
0139
0140 /*-----------------------TMS570_ESM_EKR-----------------------*/
0141 /* field: EKEY - Error Key. The key to reset the ERROR pin or to force an error on the ERROR pin. */
0142 #define TMS570_ESM_EKR_EKEY(val) BSP_FLD32(val,0, 3)
0143 #define TMS570_ESM_EKR_EKEY_GET(reg) BSP_FLD32GET(reg,0, 3)
0144 #define TMS570_ESM_EKR_EKEY_SET(reg,val) BSP_FLD32SET(reg, val,0, 3)
0145
0146
0147 /*----------------------TMS570_ESM_SSR2----------------------*/
0148 /* field: ESF - Error Status Flag. Shadow register for status information on pending error. */
0149 /* Whole 32 bits */
0150
0151 /*---------------------TMS570_ESM_IEPSR4---------------------*/
0152 /* field: IEPSET - Set Influence on ERROR Pin */
0153 /* Whole 32 bits */
0154
0155 /*---------------------TMS570_ESM_IEPCR4---------------------*/
0156 /* field: IEPCLR - Clear Influence on ERROR Pin */
0157 /* Whole 32 bits */
0158
0159 /*----------------------TMS570_ESM_IESR4----------------------*/
0160 /* field: INTENSET - Set Interrupt Enable */
0161 /* Whole 32 bits */
0162
0163 /*----------------------TMS570_ESM_IECR4----------------------*/
0164 /* field: INTENCLR - Clear Interrupt Enable */
0165 /* Whole 32 bits */
0166
0167 /*----------------------TMS570_ESM_ILSR4----------------------*/
0168 /* field: INTLVLSET - Set Interrupt Level */
0169 /* Whole 32 bits */
0170
0171 /*----------------------TMS570_ESM_ILCR4----------------------*/
0172 /* field: INTLVLCLR - Clear Interrupt Level */
0173 /* Whole 32 bits */
0174
0175 /*-----------------------TMS570_ESM_SR4-----------------------*/
0176 /* field: ESF - Error Status Flag. Provides status information on a pending error. */
0177 /* Whole 32 bits */
0178
0179
0180 #endif /* LIBBSP_ARM_TMS570_ESM */