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0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002 
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsARMTMS570
0007  *
0008  * @brief This header file provides DCC interfaces.
0009  */
0010 
0011 /* The header file is generated by make_header.py from DCC.json */
0012 /* Current script's version can be found at: */
0013 /* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
0014 
0015 /*
0016  * Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
0017  *
0018  * Czech Technical University in Prague
0019  * Zikova 1903/4
0020  * 166 36 Praha 6
0021  * Czech Republic
0022  *
0023  * All rights reserved.
0024  *
0025  * Redistribution and use in source and binary forms, with or without
0026  * modification, are permitted provided that the following conditions are met:
0027  *
0028  * 1. Redistributions of source code must retain the above copyright notice, this
0029  *    list of conditions and the following disclaimer.
0030  * 2. Redistributions in binary form must reproduce the above copyright notice,
0031  *    this list of conditions and the following disclaimer in the documentation
0032  *    and/or other materials provided with the distribution.
0033  *
0034  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
0035  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
0036  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
0037  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
0038  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0039  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
0040  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
0041  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0042  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0043  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0044  *
0045  * The views and conclusions contained in the software and documentation are those
0046  * of the authors and should not be interpreted as representing official policies,
0047  * either expressed or implied, of the FreeBSD Project.
0048 */
0049 #ifndef LIBBSP_ARM_TMS570_DCC
0050 #define LIBBSP_ARM_TMS570_DCC
0051 
0052 #include <bsp/utility.h>
0053 
0054 enum tms570_dcc1_cnt0_clksrc {
0055     DCC1_CNT0_HF_LPO    = 0x5U,    /**< Alias for DCC1 CNT 0 CLOCK SOURCE 0*/
0056     DCC1_CNT0_TCK       = 0xAU,    /**< Alias for DCC1 CNT 0 CLOCK SOURCE 1*/
0057     DCC1_CNT0_OSCIN     = 0xFU,    /**< Alias for DCC1 CNT 0 CLOCK SOURCE 2*/
0058 };
0059 
0060 typedef struct{
0061   uint32_t GCTRL;             /*DCC Global Control Register*/
0062   uint32_t REV;               /*DCC Revision Id Register*/
0063   uint32_t CNT0SEED;          /*DCC Counter0 Seed Register*/
0064   uint32_t VALID0SEED;        /*DCC Valid0 Seed Register*/
0065   uint32_t CNT1SEED;          /*DCC Counter1 Seed Register*/
0066   uint32_t STAT;              /*DCC Status Register*/
0067   uint32_t CNT0;              /*DCC Counter0 Value Register*/
0068   uint32_t VALID0;            /*DCC Valid0 Value Register*/
0069   uint32_t CNT1;              /*DCC Counter1 Value Register*/
0070   uint32_t CNT1CLKSRC;        /*DCC Counter1 Clock Source Selection Register*/
0071   uint32_t CNT0CLKSRC;        /*DCC Counter0 Clock Source Selection Register*/
0072 } tms570_dcc_t;
0073 
0074 
0075 /*----------------------TMS570_DCC_GCTRL----------------------*/
0076 /* field: DONE_INT_ENA - Done Interrupt Enable. */
0077 #define TMS570_DCC_GCTRL_DONE_INT_ENA(val) BSP_FLD32(val,12, 15)
0078 #define TMS570_DCC_GCTRL_DONE_INT_ENA_GET(reg) BSP_FLD32GET(reg,12, 15)
0079 #define TMS570_DCC_GCTRL_DONE_INT_ENA_SET(reg,val) BSP_FLD32SET(reg, val,12, 15)
0080 
0081 /* field: SINGLE_SHOT - Single-Shot Mode Enable. */
0082 #define TMS570_DCC_GCTRL_SINGLE_SHOT(val) BSP_FLD32(val,8, 11)
0083 #define TMS570_DCC_GCTRL_SINGLE_SHOT_GET(reg) BSP_FLD32GET(reg,8, 11)
0084 #define TMS570_DCC_GCTRL_SINGLE_SHOT_SET(reg,val) BSP_FLD32SET(reg, val,8, 11)
0085 
0086 /* field: ERR_ENA - Error Interrupt Enable. */
0087 #define TMS570_DCC_GCTRL_ERR_ENA(val) BSP_FLD32(val,4, 7)
0088 #define TMS570_DCC_GCTRL_ERR_ENA_GET(reg) BSP_FLD32GET(reg,4, 7)
0089 #define TMS570_DCC_GCTRL_ERR_ENA_SET(reg,val) BSP_FLD32SET(reg, val,4, 7)
0090 
0091 /* field: DCC_ENA - DCC Enable. */
0092 #define TMS570_DCC_GCTRL_DCC_ENA(val) BSP_FLD32(val,0, 3)
0093 #define TMS570_DCC_GCTRL_DCC_ENA_GET(reg) BSP_FLD32GET(reg,0, 3)
0094 #define TMS570_DCC_GCTRL_DCC_ENA_SET(reg,val) BSP_FLD32SET(reg, val,0, 3)
0095 
0096 
0097 /*-----------------------TMS570_DCC_REV-----------------------*/
0098 /* field: SCHEME - Reads return 01, writes have no effect. */
0099 #define TMS570_DCC_REV_SCHEME(val) BSP_FLD32(val,30, 31)
0100 #define TMS570_DCC_REV_SCHEME_GET(reg) BSP_FLD32GET(reg,30, 31)
0101 #define TMS570_DCC_REV_SCHEME_SET(reg,val) BSP_FLD32SET(reg, val,30, 31)
0102 
0103 /* field: FUNC - Functional release number. Reads return 0x000, writes have no effect. */
0104 #define TMS570_DCC_REV_FUNC(val) BSP_FLD32(val,16, 27)
0105 #define TMS570_DCC_REV_FUNC_GET(reg) BSP_FLD32GET(reg,16, 27)
0106 #define TMS570_DCC_REV_FUNC_SET(reg,val) BSP_FLD32SET(reg, val,16, 27)
0107 
0108 /* field: RTL - Design release number. Reads return 0x00, writes have no effect. */
0109 #define TMS570_DCC_REV_RTL(val) BSP_FLD32(val,11, 15)
0110 #define TMS570_DCC_REV_RTL_GET(reg) BSP_FLD32GET(reg,11, 15)
0111 #define TMS570_DCC_REV_RTL_SET(reg,val) BSP_FLD32SET(reg, val,11, 15)
0112 
0113 /* field: MAJOR - Major revision number. Reads return 0x2, writes have no effect. */
0114 #define TMS570_DCC_REV_MAJOR(val) BSP_FLD32(val,8, 10)
0115 #define TMS570_DCC_REV_MAJOR_GET(reg) BSP_FLD32GET(reg,8, 10)
0116 #define TMS570_DCC_REV_MAJOR_SET(reg,val) BSP_FLD32SET(reg, val,8, 10)
0117 
0118 /* field: CUSTOM - Custom version number. Reads return 0x0, writes have no effect. */
0119 #define TMS570_DCC_REV_CUSTOM(val) BSP_FLD32(val,6, 7)
0120 #define TMS570_DCC_REV_CUSTOM_GET(reg) BSP_FLD32GET(reg,6, 7)
0121 #define TMS570_DCC_REV_CUSTOM_SET(reg,val) BSP_FLD32SET(reg, val,6, 7)
0122 
0123 /* field: MINOR - Minor revision number. Reads return 0x4, writes have no effect. */
0124 #define TMS570_DCC_REV_MINOR(val) BSP_FLD32(val,0, 5)
0125 #define TMS570_DCC_REV_MINOR_GET(reg) BSP_FLD32GET(reg,0, 5)
0126 #define TMS570_DCC_REV_MINOR_SET(reg,val) BSP_FLD32SET(reg, val,0, 5)
0127 
0128 
0129 /*--------------------TMS570_DCC_CNT0SEED--------------------*/
0130 /* field: COUNT0_SEED - Seed value for DCC Counter0. */
0131 #define TMS570_DCC_CNT0SEED_COUNT0_SEED(val) BSP_FLD32(val,0, 19)
0132 #define TMS570_DCC_CNT0SEED_COUNT0_SEED_GET(reg) BSP_FLD32GET(reg,0, 19)
0133 #define TMS570_DCC_CNT0SEED_COUNT0_SEED_SET(reg,val) BSP_FLD32SET(reg, val,0, 19)
0134 
0135 
0136 /*-------------------TMS570_DCC_VALID0SEED-------------------*/
0137 /* field: VALID0_SEED - XXX */
0138 #define TMS570_DCC_VALID0SEED_VALID0_SEED(val) BSP_FLD32(val,0, 15)
0139 #define TMS570_DCC_VALID0SEED_VALID0_SEED_GET(reg) BSP_FLD32GET(reg,0, 15)
0140 #define TMS570_DCC_VALID0SEED_VALID0_SEED_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
0141 
0142 
0143 /*--------------------TMS570_DCC_CNT1SEED--------------------*/
0144 /* field: COUNT1_SEED - Seed value for DCC Counter1. */
0145 #define TMS570_DCC_CNT1SEED_COUNT1_SEED(val) BSP_FLD32(val,0, 19)
0146 #define TMS570_DCC_CNT1SEED_COUNT1_SEED_GET(reg) BSP_FLD32GET(reg,0, 19)
0147 #define TMS570_DCC_CNT1SEED_COUNT1_SEED_SET(reg,val) BSP_FLD32SET(reg, val,0, 19)
0148 
0149 
0150 /*----------------------TMS570_DCC_STAT----------------------*/
0151 /* field: DONE_FLG - Single-Shot Sequence Done flag. */
0152 #define TMS570_DCC_STAT_DONE_FLG BSP_BIT32(1)
0153 
0154 /* field: ERR_FLG - Error flag. Indicates that a DCC error has occurred. */
0155 #define TMS570_DCC_STAT_ERR_FLG BSP_BIT32(0)
0156 
0157 
0158 /*----------------------TMS570_DCC_CNT0----------------------*/
0159 /* field: COUNT0 - Current value of DCC Counter0. */
0160 #define TMS570_DCC_CNT0_COUNT0(val) BSP_FLD32(val,0, 19)
0161 #define TMS570_DCC_CNT0_COUNT0_GET(reg) BSP_FLD32GET(reg,0, 19)
0162 #define TMS570_DCC_CNT0_COUNT0_SET(reg,val) BSP_FLD32SET(reg, val,0, 19)
0163 
0164 
0165 /*---------------------TMS570_DCC_VALID0---------------------*/
0166 /* field: VALID0 - Current value for DCC Valid0. */
0167 #define TMS570_DCC_VALID0_VALID0(val) BSP_FLD32(val,0, 15)
0168 #define TMS570_DCC_VALID0_VALID0_GET(reg) BSP_FLD32GET(reg,0, 15)
0169 #define TMS570_DCC_VALID0_VALID0_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
0170 
0171 
0172 /*----------------------TMS570_DCC_CNT1----------------------*/
0173 /* field: COUNT1 - Current value for DCC Counter1. */
0174 #define TMS570_DCC_CNT1_COUNT1(val) BSP_FLD32(val,0, 19)
0175 #define TMS570_DCC_CNT1_COUNT1_GET(reg) BSP_FLD32GET(reg,0, 19)
0176 #define TMS570_DCC_CNT1_COUNT1_SET(reg,val) BSP_FLD32SET(reg, val,0, 19)
0177 
0178 
0179 /*-------------------TMS570_DCC_CNT1CLKSRC-------------------*/
0180 /* field: KEY - Key to enable clock source selection for Counter1. */
0181 #define TMS570_DCC_CNT1CLKSRC_KEY(val) BSP_FLD32(val,12, 15)
0182 #define TMS570_DCC_CNT1CLKSRC_KEY_GET(reg) BSP_FLD32GET(reg,12, 15)
0183 #define TMS570_DCC_CNT1CLKSRC_KEY_SET(reg,val) BSP_FLD32SET(reg, val,12, 15)
0184 
0185 /* field: CNT1_CLKSRC - Clock Source for Counter1 when KEY is programmed to be 0xA. */
0186 #define TMS570_DCC_CNT1CLKSRC_CNT1_CLKSRC(val) BSP_FLD32(val,0, 3)
0187 #define TMS570_DCC_CNT1CLKSRC_CNT1_CLKSRC_GET(reg) BSP_FLD32GET(reg,0, 3)
0188 #define TMS570_DCC_CNT1CLKSRC_CNT1_CLKSRC_SET(reg,val) BSP_FLD32SET(reg, val,0, 3)
0189 
0190 
0191 /*-------------------TMS570_DCC_CNT0CLKSRC-------------------*/
0192 /* field: CNT0_CLKSRC - Clock Source for Counter0 */
0193 #define TMS570_DCC_CNT0CLKSRC_CNT0_CLKSRC(val) BSP_FLD32(val,0, 3)
0194 #define TMS570_DCC_CNT0CLKSRC_CNT0_CLKSRC_GET(reg) BSP_FLD32GET(reg,0, 3)
0195 #define TMS570_DCC_CNT0CLKSRC_CNT0_CLKSRC_SET(reg,val) BSP_FLD32SET(reg, val,0, 3)
0196 
0197 
0198 
0199 #endif /* LIBBSP_ARM_TMS570_DCC */