stm32h7/start/stm32h7-hal-spi.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsARMSTM32H7
0007  *
0008  * @brief This source file contains the SPI MSP initialization implementation.
0009  */
0010
0011 /*
0012  * Copyright (C) 2024 On-Line Applications Research (OAR) Corporation
0013  *
0014  * Redistribution and use in source and binary forms, with or without
0015  * modification, are permitted provided that the following conditions
0016  * are met:
0017  * 1. Redistributions of source code must retain the above copyright
0018  *    notice, this list of conditions and the following disclaimer.
0019  * 2. Redistributions in binary form must reproduce the above copyright
0020  *    notice, this list of conditions and the following disclaimer in the
0021  *    documentation and/or other materials provided with the distribution.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0024  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0025  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0026  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0027  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0028  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0029  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0030  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0031  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0032  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0033  * POSSIBILITY OF SUCH DAMAGE.
0034  */
0035
0036 #ifdef HAVE_CONFIG_H
0037 #include "config.h"
0038 #endif
0039
0040 #include <stm32h7/hal.h>
0041
0042 void HAL_SPI_MspInit(SPI_HandleTypeDef *spi)
0043 {
0044   stm32h7_spi_context *ctx;
0045   const stm32h7_spi_config *config;
0046   stm32h7_module_index index = stm32h7_get_module_index(spi->Instance);
0047
0048   ctx = RTEMS_CONTAINER_OF(spi, stm32h7_spi_context, spi);
0049   config = ctx->config;
0050   stm32h7_clk_enable(index);
0051   stm32h7_gpio_init(&config->sck_gpio);
0052   stm32h7_gpio_init(&config->miso_gpio);
0053   stm32h7_gpio_init(&config->mosi_gpio);
0054
0055   /* Configure SPI CS GPIOs */
0056   for (int i = 0; i < STM32H7_NUM_SOFT_CS; i++) {
0057     if (config->cs_gpio[i].regs == NULL) {
0058       continue;
0059     }
0060     /* TODO(kmoore) handle multiple pins in a single GPIO block */
0061
0062     /* configure GPIO CS and set output high */
0063     stm32h7_gpio_init(&config->cs_gpio[i]);
0064     /* Set all GPIO CS pins high */
0065     HAL_GPIO_WritePin(config->cs_gpio[i].regs, config->cs_gpio[i].config.Pin, GPIO_PIN_SET);
0066   }
0067 }