Back to home page

LXR

 
 

    


File indexing completed on 2025-05-11 08:23:38

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002 
0003 /*
0004  * Copyright (C) 2020 embedded brains GmbH & Co. KG
0005  *
0006  * Redistribution and use in source and binary forms, with or without
0007  * modification, are permitted provided that the following conditions
0008  * are met:
0009  * 1. Redistributions of source code must retain the above copyright
0010  *    notice, this list of conditions and the following disclaimer.
0011  * 2. Redistributions in binary form must reproduce the above copyright
0012  *    notice, this list of conditions and the following disclaimer in the
0013  *    documentation and/or other materials provided with the distribution.
0014  *
0015  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0016  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0017  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0018  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0019  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0020  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0021  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0022  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0023  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0024  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0025  * POSSIBILITY OF SUCH DAMAGE.
0026  */
0027 
0028 #ifdef HAVE_CONFIG_H
0029 #include "config.h"
0030 #endif
0031 
0032 #include <stm32h7/hal.h>
0033 
0034 #include <bspopts.h>
0035 
0036 #ifndef STM32H7B3xxQ
0037 
0038 static const stm32h7_gpio_config gpiog = {
0039   .regs = GPIOG,
0040   .config = {
0041     .Pin = STM32H7_ETH_GPIOG_PINS,
0042     .Mode = GPIO_MODE_AF_PP,
0043     .Pull = GPIO_NOPULL,
0044     .Speed = GPIO_SPEED_FREQ_LOW,
0045     .Alternate = GPIO_AF11_ETH
0046   }
0047 };
0048 
0049 static const stm32h7_gpio_config gpioc = {
0050   .regs = GPIOC,
0051   .config = {
0052     .Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5,
0053     .Mode = GPIO_MODE_AF_PP,
0054     .Pull = GPIO_NOPULL,
0055     .Speed = GPIO_SPEED_FREQ_LOW,
0056     .Alternate = GPIO_AF11_ETH
0057   }
0058 };
0059 
0060 static const stm32h7_gpio_config gpioa = {
0061   .regs = GPIOA,
0062   .config = {
0063     .Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7,
0064     .Mode = GPIO_MODE_AF_PP,
0065     .Pull = GPIO_NOPULL,
0066     .Speed = GPIO_SPEED_FREQ_LOW,
0067     .Alternate = GPIO_AF11_ETH
0068   }
0069 };
0070 
0071 #ifdef STM32H7_ETH_GPIOB_PINS
0072 
0073 static const stm32h7_gpio_config gpiob = {
0074   .regs = GPIOB,
0075   .config = {
0076     .Pin = STM32H7_ETH_GPIOB_PINS,
0077     .Mode = GPIO_MODE_AF_PP,
0078     .Pull = GPIO_NOPULL,
0079     .Speed = GPIO_SPEED_FREQ_LOW,
0080     .Alternate = GPIO_AF11_ETH
0081   }
0082 };
0083 
0084 #endif
0085 
0086 void
0087 HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
0088 {
0089   stm32h7_clk_enable(STM32H7_MODULE_ETH1MAC);
0090   stm32h7_clk_enable(STM32H7_MODULE_ETH1TX);
0091   stm32h7_clk_enable(STM32H7_MODULE_ETH1RX);
0092   stm32h7_gpio_init(&gpiog);
0093   stm32h7_gpio_init(&gpioc);
0094   stm32h7_gpio_init(&gpioa);
0095 #ifdef STM32H7_ETH_GPIOB_PINS
0096   stm32h7_gpio_init(&gpiob);
0097 #endif
0098 }
0099 
0100 #endif