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File indexing completed on 2025-05-11 08:23:37
0001 /** 0002 ****************************************************************************** 0003 * @file stm32h7xx_ll_mdma.h 0004 * @author MCD Application Team 0005 * @brief Header file of MDMA LL module. 0006 ****************************************************************************** 0007 * @attention 0008 * 0009 * Copyright (c) 2017 STMicroelectronics. 0010 * All rights reserved. 0011 * 0012 * This software is licensed under terms that can be found in the LICENSE file 0013 * in the root directory of this software component. 0014 * If no LICENSE file comes with this software, it is provided AS-IS. 0015 * 0016 ****************************************************************************** 0017 */ 0018 0019 /* Define to prevent recursive inclusion -------------------------------------*/ 0020 #ifndef STM32H7xx_LL_MDMA_H 0021 #define STM32H7xx_LL_MDMA_H 0022 0023 #ifdef __cplusplus 0024 extern "C" { 0025 #endif 0026 0027 /* Includes ------------------------------------------------------------------*/ 0028 #include "stm32h7xx.h" 0029 0030 /** @addtogroup STM32H7xx_LL_Driver 0031 * @{ 0032 */ 0033 0034 #if defined (MDMA) 0035 0036 /** @defgroup MDMA_LL MDMA 0037 * @ingroup RTEMSBSPsARMSTM32H7 0038 * @{ 0039 */ 0040 0041 /* Private types -------------------------------------------------------------*/ 0042 /* Private variables ---------------------------------------------------------*/ 0043 /** @defgroup MDMA_LL_Private_Variables MDMA Private Variables 0044 * @ingroup RTEMSBSPsARMSTM32H7 0045 * @{ 0046 */ 0047 /* Array used to get the MDMA channel register offset versus channel index LL_MDMA_CHANNEL_x */ 0048 static const uint32_t LL_MDMA_CH_OFFSET_TAB[] = 0049 { 0050 (uint32_t)(MDMA_Channel0_BASE - MDMA_BASE), 0051 (uint32_t)(MDMA_Channel1_BASE - MDMA_BASE), 0052 (uint32_t)(MDMA_Channel2_BASE - MDMA_BASE), 0053 (uint32_t)(MDMA_Channel3_BASE - MDMA_BASE), 0054 (uint32_t)(MDMA_Channel4_BASE - MDMA_BASE), 0055 (uint32_t)(MDMA_Channel5_BASE - MDMA_BASE), 0056 (uint32_t)(MDMA_Channel6_BASE - MDMA_BASE), 0057 (uint32_t)(MDMA_Channel7_BASE - MDMA_BASE), 0058 (uint32_t)(MDMA_Channel8_BASE - MDMA_BASE), 0059 (uint32_t)(MDMA_Channel9_BASE - MDMA_BASE), 0060 (uint32_t)(MDMA_Channel10_BASE - MDMA_BASE), 0061 (uint32_t)(MDMA_Channel11_BASE - MDMA_BASE), 0062 (uint32_t)(MDMA_Channel12_BASE - MDMA_BASE), 0063 (uint32_t)(MDMA_Channel13_BASE - MDMA_BASE), 0064 (uint32_t)(MDMA_Channel14_BASE - MDMA_BASE), 0065 (uint32_t)(MDMA_Channel15_BASE - MDMA_BASE) 0066 }; 0067 0068 /** 0069 * @} 0070 */ 0071 0072 /* Private constants ---------------------------------------------------------*/ 0073 /** @defgroup MDMA_LL_Private_Constants MDMA Private Constants 0074 * @ingroup RTEMSBSPsARMSTM32H7 0075 * @{ 0076 */ 0077 /** 0078 * @} 0079 */ 0080 0081 0082 /* Private macros ------------------------------------------------------------*/ 0083 /* Exported types ------------------------------------------------------------*/ 0084 #if defined(USE_FULL_LL_DRIVER) || defined(__rtems__) 0085 /** @defgroup MDMA_LL_ES_INIT MDMA Exported Init structure 0086 * @ingroup RTEMSBSPsARMSTM32H7 0087 * @{ 0088 */ 0089 typedef struct 0090 { 0091 uint32_t SrcAddress; /*!< Specifies the transfer source address 0092 This parameter must be a value between Min_Data = 0 and Max_Data = 0xFFFFFFFF. 0093 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetSourceAddress() */ 0094 0095 uint32_t DstAddress; /*!< Specifies the transfer destination address 0096 This parameter must be a value between Min_Data = 0 and Max_Data = 0xFFFFFFFF. 0097 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetDestinationAddress() */ 0098 0099 uint32_t RequestMode; /*!< Specifies the request mode Hardware or Software. 0100 This parameter can be a value of @ref MDMA_LL_EC_REQUEST_MODE 0101 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetRequestMode() */ 0102 0103 uint32_t TriggerMode; /*!< Specifies the transfer trigger mode. 0104 This parameter can be a value of @ref MDMA_LL_EC_TRIGGER_MODE 0105 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetTriggerMode() */ 0106 0107 uint32_t HWTrigger; /*!< Specifies the HW transfer trigger used when RequestMode is HW. 0108 This parameter can be a value of @ref MDMA_LL_EC_HW_TRIGGER_SELCTION 0109 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetHWTrigger() */ 0110 0111 uint32_t BlockDataLength; /*!< Specifies the length of a block transfer in bytes 0112 This parameter must be a value between Min_Data = 0 and Max_Data = 0x00010000. 0113 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetBlkDataLength() */ 0114 0115 uint32_t BlockRepeatCount; /*!< Specifies the Block Repeat Count 0116 This parameter must be a value between Min_Data = 0 and Max_Data = 0x00000FFF. 0117 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetBlkRepeatCount() */ 0118 0119 uint32_t BlockRepeatDestAddrUpdateMode; /*!< Specifies the block repeat destination address update mode. 0120 This parameter can be a value of @ref MDMA_LL_EC_BLK_RPT_DEST_ADDR_UPDATE_MODE 0121 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetBlkRepeatDestAddrUpdate() */ 0122 0123 uint32_t BlockRepeatSrcAddrUpdateMode; /*!< Specifies the block repeat source address update mode. 0124 This parameter can be a value of @ref MDMA_LL_EC_SRC_BLK_RPT_ADDR_UPDATE_MODE 0125 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetBlkRepeatSrcAddrUpdate() */ 0126 0127 uint32_t BlockRepeatDestAddrUpdateVal; /*!< Specifies the block repeat destination address update value. 0128 This parameter can be a value Between 0 to 0x0000FFFF 0129 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetBlkRptDestAddrUpdateValue() */ 0130 0131 uint32_t BlockRepeatSrcAddrUpdateVal; /*!< Specifies the block repeat source address update value. 0132 This parameter can be a value Between 0 to 0x0000FFFF 0133 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetBlkRptSrcAddrUpdateValue() */ 0134 0135 uint32_t LinkAddress; /*!< Specifies the linked list next transfer node address. 0136 This parameter can be a value Between 0 to 0xFFFFFFFF 0137 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetLinkAddress() */ 0138 0139 uint32_t WordEndianess; /*!< Specifies the Word transfer endianness 0140 This parameter can be a value of @ref MDMA_LL_EC_WORD_ENDIANNESS. 0141 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetWordEndianness() */ 0142 0143 uint32_t HalfWordEndianess; /*!< Specifies the Half Word transfer endianness 0144 This parameter can be a value of @ref MDMA_LL_EC_HALFWORD_ENDIANNESS. 0145 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetHalfWordEndianness() */ 0146 0147 uint32_t ByteEndianess; /*!< Specifies the Byte transfer endianness 0148 This parameter can be a value of @ref MDMA_LL_EC_BYTE_ENDIANNESS. 0149 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetByteEndianness() */ 0150 0151 uint32_t Priority; /*!< Specifies the channel priority level. 0152 This parameter can be a value of @ref MDMA_LL_EC_PRIORITY 0153 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetChannelPriorityLevel() */ 0154 0155 uint32_t BufferableWriteMode; /*!< Specifies the transfer Bufferable Write Mode. 0156 This parameter can be a value of @ref MDMA_LL_EC_BUFF_WRITE_MODE 0157 This feature can be modified afterwards using unitary function @ref LL_MDMA_EnableBufferableWrMode() 0158 and LL_MDMA_DisableBufferableWrMode */ 0159 0160 0161 uint32_t PaddingAlignment; /*!< Specifies the transfer Padding and Alignment. 0162 This parameter can be a value of @ref MDMA_LL_EC_PADDING_ALIGNMENT_MODE 0163 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetPaddingAlignment() */ 0164 0165 uint32_t PackMode; /*!< Specifies the transfer Packing enabled or disabled. 0166 This parameter can be a value of @ref MDMA_LL_EC_PACKING_MODE 0167 This feature can be modified afterwards using unitary function @ref LL_MDMA_EnablePacking() 0168 and LL_MDMA_DisablePacking() */ 0169 0170 uint32_t BufferTransferLength; /*!< Specifies the length of a buffer transfer in bytes 0171 This parameter must be a value between Min_Data = 0 and Max_Data = 0x0000007F. 0172 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetBufferTransferLength() */ 0173 0174 uint32_t DestBurst; /*!< Specifies the destination burst size. 0175 This parameter can be a value of @ref MDMA_LL_EC_DEST_BURST 0176 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetDestinationBurstSize() */ 0177 0178 uint32_t SrctBurst; /*!< Specifies the source burst size. 0179 This parameter can be a value of @ref MDMA_LL_EC_SRC_BURST 0180 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetSourceBurstSize() */ 0181 0182 uint32_t DestIncSize; /*!< Specifies the destination increment size. 0183 This parameter can be a value of @ref MDMA_LL_EC_DEST_INC_OFFSET_SIZE 0184 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetDestinationIncSize() */ 0185 0186 uint32_t SrcIncSize; /*!< Specifies the source increment size. 0187 This parameter can be a value of @ref MDMA_LL_EC_SRC_INC_OFFSET_SIZE 0188 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetSourceIncSize() */ 0189 0190 uint32_t DestDataSize; /*!< Specifies the destination data size. 0191 This parameter can be a value of @ref MDMA_LL_EC_DEST_DATA_SIZE 0192 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetDestinationDataSize() */ 0193 0194 uint32_t SrcDataSize; /*!< Specifies the source data size. 0195 This parameter can be a value of @ref MDMA_LL_EC_SRC_DATA_SIZE 0196 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetSourceDataSize() */ 0197 0198 uint32_t DestIncMode; /*!< Specifies the destination increment mode. 0199 This parameter can be a value of @ref MDMA_LL_EC_DEST_INC_MODE 0200 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetDestinationIncMode() */ 0201 0202 uint32_t SrcIncMode; /*!< Specifies the source increment mode. 0203 This parameter can be a value of @ref MDMA_LL_EC_SRC_INC_MODE 0204 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetSourceIncMode() */ 0205 0206 0207 uint32_t DestBus; /*!< Specifies the destination transfer bus, System AXI or AHB/TCM bus. 0208 This parameter can be a value of @ref MDMA_LL_EC_DEST_BUS 0209 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetDestBusSelection() */ 0210 0211 uint32_t SrcBus; /*!< Specifies the source transfer bus, System AXI or AHB/TCM bus. 0212 This parameter can be a value of @ref MDMA_LL_EC_SRC_BUS 0213 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetSrcBusSelection() */ 0214 0215 uint32_t MaskAddress; /*!< Specifies the address to be updated (written) with MaskData after a request is served. 0216 MaskAddress and MaskData could be used to automatically clear a peripheral flag when the request is served 0217 This parameter can be a value Between 0 to 0xFFFFFFFF 0218 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetMaskAddress() */ 0219 0220 uint32_t MaskData; /*!< Specifies the value to be written to MaskAddress after a request is served. 0221 MaskAddress and MaskData could be used to automatically clear a peripheral flag when the request is served 0222 This parameter can be a value Between 0 to 0xFFFFFFFF 0223 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetMaskData() */ 0224 0225 } LL_MDMA_InitTypeDef; 0226 0227 /** 0228 * @brief LL MDMA linked list node structure definition 0229 * @note The Linked list node allows to define a new MDMA configuration 0230 * (CTCR ,CBNDTR ,CSAR ,CDAR ,CBRUR, CLAR, CTBR, CMAR and CMDR registers). 0231 * When CLAR register is configured to a non NULL value , each time a transfer ends, 0232 * a new configuration (linked list node) is automatically loaded from the address given in CLAR register. 0233 */ 0234 typedef struct 0235 { 0236 __IO uint32_t CTCR; /*!< New CTCR register configuration for the given MDMA linked list node */ 0237 __IO uint32_t CBNDTR; /*!< New CBNDTR register configuration for the given MDMA linked list node */ 0238 __IO uint32_t CSAR; /*!< New CSAR register configuration for the given MDMA linked list node */ 0239 __IO uint32_t CDAR; /*!< New CDAR register configuration for the given MDMA linked list node */ 0240 __IO uint32_t CBRUR; /*!< New CBRUR register configuration for the given MDMA linked list node */ 0241 __IO uint32_t CLAR; /*!< New CLAR register configuration for the given MDMA linked list node */ 0242 __IO uint32_t CTBR; /*!< New CTBR register configuration for the given MDMA linked list node */ 0243 __IO uint32_t Reserved; /*!< Reserved register*/ 0244 __IO uint32_t CMAR; /*!< New CMAR register configuration for the given MDMA linked list node */ 0245 __IO uint32_t CMDR; /*!< New CMDR register configuration for the given MDMA linked list node */ 0246 0247 }LL_MDMA_LinkNodeTypeDef; 0248 0249 /** 0250 * @} 0251 */ 0252 #endif /*USE_FULL_LL_DRIVER*/ 0253 /* Exported constants --------------------------------------------------------*/ 0254 /** @defgroup MDMA_LL_Exported_Constants MDMA Exported Constants 0255 * @ingroup RTEMSBSPsARMSTM32H7 0256 * @{ 0257 */ 0258 0259 /** @defgroup MDMA_LL_EC_CHANNEL CHANNEL 0260 * @ingroup RTEMSBSPsARMSTM32H7 0261 * @{ 0262 */ 0263 #define LL_MDMA_CHANNEL_0 0x00000000U 0264 #define LL_MDMA_CHANNEL_1 0x00000001U 0265 #define LL_MDMA_CHANNEL_2 0x00000002U 0266 #define LL_MDMA_CHANNEL_3 0x00000003U 0267 #define LL_MDMA_CHANNEL_4 0x00000004U 0268 #define LL_MDMA_CHANNEL_5 0x00000005U 0269 #define LL_MDMA_CHANNEL_6 0x00000006U 0270 #define LL_MDMA_CHANNEL_7 0x00000007U 0271 #define LL_MDMA_CHANNEL_8 0x00000008U 0272 #define LL_MDMA_CHANNEL_9 0x00000009U 0273 #define LL_MDMA_CHANNEL_10 0x0000000AU 0274 #define LL_MDMA_CHANNEL_11 0x0000000BU 0275 #define LL_MDMA_CHANNEL_12 0x0000000CU 0276 #define LL_MDMA_CHANNEL_13 0x0000000DU 0277 #define LL_MDMA_CHANNEL_14 0x0000000EU 0278 #define LL_MDMA_CHANNEL_15 0x0000000FU 0279 #define LL_MDMA_CHANNEL_ALL 0xFFFF0000U 0280 /** 0281 * @} 0282 */ 0283 0284 /** @defgroup MDMA_LL_EC_WORD_ENDIANNESS Word Endianness 0285 * @ingroup RTEMSBSPsARMSTM32H7 0286 * @{ 0287 */ 0288 #define LL_MDMA_WORD_ENDIANNESS_PRESERVE 0x00000000U /*!< Little endianness preserved for words */ 0289 #define LL_MDMA_WORD_ENDIANNESS_EXCHANGE MDMA_CCR_WEX /*!< word order exchanged when destination data size is double word */ 0290 0291 /** 0292 * @} 0293 */ 0294 0295 /** @defgroup MDMA_LL_EC_HALFWORD_ENDIANNESS Half Word Endianness 0296 * @ingroup RTEMSBSPsARMSTM32H7 0297 * @{ 0298 */ 0299 #define LL_MDMA_HALFWORD_ENDIANNESS_PRESERVE 0x00000000U /*!< Little endianness preserved for half words */ 0300 #define LL_MDMA_HALFWORD_ENDIANNESS_EXCHANGE MDMA_CCR_HEX /*!< half word order exchanged when destination data size is word or double word */ 0301 0302 /** 0303 * @} 0304 */ 0305 0306 /** @defgroup MDMA_LL_EC_BYTE_ENDIANNESS Byte Endianness 0307 * @ingroup RTEMSBSPsARMSTM32H7 0308 * @{ 0309 */ 0310 #define LL_MDMA_BYTE_ENDIANNESS_PRESERVE 0x00000000U /*!< Little endianness preserved for bytes */ 0311 #define LL_MDMA_BYTE_ENDIANNESS_EXCHANGE MDMA_CCR_BEX /*!< byte order exchanged when destination data size is half word , word or double word */ 0312 0313 /** 0314 * @} 0315 */ 0316 0317 /** @defgroup MDMA_LL_EC_PRIORITY Transfer Priority level 0318 * @ingroup RTEMSBSPsARMSTM32H7 0319 * @{ 0320 */ 0321 #define LL_MDMA_PRIORITY_LOW 0x00000000U /*!< Priority level : Low */ 0322 #define LL_MDMA_PRIORITY_MEDIUM MDMA_CCR_PL_0 /*!< Priority level : Medium */ 0323 #define LL_MDMA_PRIORITY_HIGH MDMA_CCR_PL_1 /*!< Priority level : High */ 0324 #define LL_MDMA_PRIORITY_VERYHIGH MDMA_CCR_PL /*!< Priority level : Very_High */ 0325 /** 0326 * @} 0327 */ 0328 0329 /** @defgroup MDMA_LL_EC_BUFF_WRITE_MODE Bufferable Write Mode 0330 * @ingroup RTEMSBSPsARMSTM32H7 0331 * @{ 0332 */ 0333 #define LL_MDMA_BUFF_WRITE_DISABLE 0x00000000U /*!< destination write operation is non-bufferable */ 0334 #define LL_MDMA_BUFF_WRITE_ENABLE MDMA_CTCR_BWM /*!< destination write operation is bufferable */ 0335 /** 0336 * @} 0337 */ 0338 0339 /** @defgroup MDMA_LL_EC_REQUEST_MODE Request Mode 0340 * @ingroup RTEMSBSPsARMSTM32H7 0341 * @{ 0342 */ 0343 #define LL_MDMA_REQUEST_MODE_HW 0x00000000U /*!< Request mode is Hardware */ 0344 #define LL_MDMA_REQUEST_MODE_SW MDMA_CTCR_SWRM /*!< Request mode is Software */ 0345 /** 0346 * @} 0347 */ 0348 0349 /** @defgroup MDMA_LL_EC_TRIGGER_MODE Trigger Mode 0350 * @ingroup RTEMSBSPsARMSTM32H7 0351 * @{ 0352 */ 0353 #define LL_MDMA_BUFFER_TRANSFER 0x00000000U /*!< Each MDMA request (SW or HW) triggers a buffer transfer */ 0354 #define LL_MDMA_BLOCK_TRANSFER MDMA_CTCR_TRGM_0 /*!< Each MDMA request (SW or HW) triggers a block transfer */ 0355 #define LL_MDMA_REPEAT_BLOCK_TRANSFER MDMA_CTCR_TRGM_1 /*!< Each MDMA request (SW or HW) triggers a repeated block transfer */ 0356 #define LL_MDMA_FULL_TRANSFER MDMA_CTCR_TRGM /*!< Each MDMA request (SW or HW) triggers a Full transfer or a linked list transfer if any */ 0357 /** 0358 * @} 0359 */ 0360 0361 /** @defgroup MDMA_LL_EC_PADDING_ALIGNMENT_MODE Padding Alignment Mode 0362 * @ingroup RTEMSBSPsARMSTM32H7 0363 * @{ 0364 */ 0365 #define LL_MDMA_DATAALIGN_RIGHT 0x00000000U /*!< Right Aligned, padded w/ 0s (default) */ 0366 #define LL_MDMA_DATAALIGN_RIGHT_SIGNED MDMA_CTCR_PAM_0 /*!< Right Aligned, Sign extended , 0367 Note : this mode is allowed only if the Source data size smaller than Destination data size */ 0368 #define LL_MDMA_DATAALIGN_LEFT MDMA_CTCR_PAM_1 /*!< Left Aligned (padded with 0s) */ 0369 /** 0370 * @} 0371 */ 0372 0373 /** @defgroup MDMA_LL_EC_PACKING_MODE Transfer Packing 0374 * @ingroup RTEMSBSPsARMSTM32H7 0375 * @{ 0376 */ 0377 #define LL_MDMA_PACK_DISABLE 0x00000000U /*!< Packing disabled */ 0378 #define LL_MDMA_PACK_ENABLE MDMA_CTCR_PKE /*!< Packing enabled */ 0379 /** 0380 * @} 0381 */ 0382 0383 /** @defgroup MDMA_LL_EC_DEST_BURST Transfer Destination Burst 0384 * @ingroup RTEMSBSPsARMSTM32H7 0385 * @{ 0386 */ 0387 #define LL_MDMA_DEST_BURST_SINGLE 0x00000000U /*!< Single transfer */ 0388 #define LL_MDMA_DEST_BURST_2BEATS MDMA_CTCR_DBURST_0 /*!< Burst 2 beats */ 0389 #define LL_MDMA_DEST_BURST_4BEATS MDMA_CTCR_DBURST_1 /*!< Burst 4 beats */ 0390 #define LL_MDMA_DEST_BURST_8BEATS (MDMA_CTCR_DBURST_0 | MDMA_CTCR_DBURST_1) /*!< Burst 8 beats */ 0391 #define LL_MDMA_DEST_BURST_16BEATS MDMA_CTCR_DBURST_2 /*!< Burst 16 beats */ 0392 #define LL_MDMA_DEST_BURST_32BEATS (MDMA_CTCR_DBURST_0 | MDMA_CTCR_DBURST_2) /*!< Burst 32 beats */ 0393 #define LL_MDMA_DEST_BURST_64BEATS (MDMA_CTCR_DBURST_1 | MDMA_CTCR_DBURST_2) /*!< Burst 64 beats */ 0394 #define LL_MDMA_DEST_BURST_128BEATS (MDMA_CTCR_DBURST) /*!< Burst 128 beats */ 0395 /** 0396 * @} 0397 */ 0398 0399 /** @defgroup MDMA_LL_EC_SRC_BURST Transfer Source Burst 0400 * @ingroup RTEMSBSPsARMSTM32H7 0401 * @{ 0402 */ 0403 #define LL_MDMA_SRC_BURST_SINGLE 0x00000000U /*!< Single transfer */ 0404 #define LL_MDMA_SRC_BURST_2BEATS MDMA_CTCR_SBURST_0 /*!< Burst 2 beats */ 0405 #define LL_MDMA_SRC_BURST_4BEATS MDMA_CTCR_SBURST_1 /*!< Burst 4 beats */ 0406 #define LL_MDMA_SRC_BURST_8BEATS (MDMA_CTCR_SBURST_0 | MDMA_CTCR_SBURST_1) /*!< Burst 8 beats */ 0407 #define LL_MDMA_SRC_BURST_16BEATS MDMA_CTCR_SBURST_2 /*!< Burst 16 beats */ 0408 #define LL_MDMA_SRC_BURST_32BEATS (MDMA_CTCR_SBURST_0 | MDMA_CTCR_SBURST_2) /*!< Burst 32 beats */ 0409 #define LL_MDMA_SRC_BURST_64BEATS (MDMA_CTCR_SBURST_1 | MDMA_CTCR_SBURST_2) /*!< Burst 64 beats */ 0410 #define LL_MDMA_SRC_BURST_128BEATS MDMA_CTCR_SBURST /*!< Burst 128 beats */ 0411 /** 0412 * @} 0413 */ 0414 0415 /** @defgroup MDMA_LL_EC_DEST_INC_OFFSET_SIZE Destination Increment Offset Size 0416 * @ingroup RTEMSBSPsARMSTM32H7 0417 * @{ 0418 */ 0419 #define LL_MDMA_DEST_INC_OFFSET_BYTE 0x00000000U /*!< offset is Byte (8-bit) */ 0420 #define LL_MDMA_DEST_INC_OFFSET_HALFWORD MDMA_CTCR_DINCOS_0 /*!< offset is Half Word (16-bit) */ 0421 #define LL_MDMA_DEST_INC_OFFSET_WORD MDMA_CTCR_DINCOS_1 /*!< offset is Word (32-bit) */ 0422 #define LL_MDMA_DEST_INC_OFFSET_DOUBLEWORD MDMA_CTCR_DINCOS /*!< offset is Double Word (64-bit) */ 0423 /** 0424 * @} 0425 */ 0426 0427 /** @defgroup MDMA_LL_EC_SRC_INC_OFFSET_SIZE Source Increment Offset Size 0428 * @ingroup RTEMSBSPsARMSTM32H7 0429 * @{ 0430 */ 0431 #define LL_MDMA_SRC_INC_OFFSET_BYTE 0x00000000U /*!< offset is Byte (8-bit) */ 0432 #define LL_MDMA_SRC_INC_OFFSET_HALFWORD MDMA_CTCR_SINCOS_0 /*!< offset is Half Word (16-bit) */ 0433 #define LL_MDMA_SRC_INC_OFFSET_WORD MDMA_CTCR_SINCOS_1 /*!< offset is Word (32-bit) */ 0434 #define LL_MDMA_SRC_INC_OFFSET_DOUBLEWORD MDMA_CTCR_SINCOS /*!< offset is Double Word (64-bit) */ 0435 /** 0436 * @} 0437 */ 0438 0439 /** @defgroup MDMA_LL_EC_DEST_DATA_SIZE Destination Data Size 0440 * @ingroup RTEMSBSPsARMSTM32H7 0441 * @{ 0442 */ 0443 #define LL_MDMA_DEST_DATA_SIZE_BYTE 0x00000000U /*!< Destination data size is Byte */ 0444 #define LL_MDMA_DEST_DATA_SIZE_HALFWORD MDMA_CTCR_DSIZE_0 /*!< Destination data size is half word */ 0445 #define LL_MDMA_DEST_DATA_SIZE_WORD MDMA_CTCR_DSIZE_1 /*!< Destination data size is word */ 0446 #define LL_MDMA_DEST_DATA_SIZE_DOUBLEWORD MDMA_CTCR_DSIZE /*!< Destination data size is double word */ 0447 /** 0448 * @} 0449 */ 0450 0451 /** @defgroup MDMA_LL_EC_SRC_DATA_SIZE Source Data Size 0452 * @ingroup RTEMSBSPsARMSTM32H7 0453 * @{ 0454 */ 0455 #define LL_MDMA_SRC_DATA_SIZE_BYTE 0x00000000U /*!< Source data size is Byte */ 0456 #define LL_MDMA_SRC_DATA_SIZE_HALFWORD MDMA_CTCR_SSIZE_0 /*!< Source data size is half word */ 0457 #define LL_MDMA_SRC_DATA_SIZE_WORD MDMA_CTCR_SSIZE_1 /*!< Source data size is word */ 0458 #define LL_MDMA_SRC_DATA_SIZE_DOUBLEWORD MDMA_CTCR_SSIZE /*!< Source data size is double word */ 0459 /** 0460 * @} 0461 */ 0462 0463 /** @defgroup MDMA_LL_EC_DEST_INC_MODE Destination Increment Mode 0464 * @ingroup RTEMSBSPsARMSTM32H7 0465 * @{ 0466 */ 0467 #define LL_MDMA_DEST_FIXED 0x00000000U /*!< Destination address pointer is fixed */ 0468 #define LL_MDMA_DEST_INCREMENT MDMA_CTCR_DINC_1 /*!< Destination address pointer is incremented after each data transfer */ 0469 #define LL_MDMA_DEST_DECREMENT MDMA_CTCR_DINC /*!< Destination address pointer is decremented after each data transfer */ 0470 /** 0471 * @} 0472 */ 0473 0474 /** @defgroup MDMA_LL_EC_SRC_INC_MODE Source Increment Mode 0475 * @ingroup RTEMSBSPsARMSTM32H7 0476 * @{ 0477 */ 0478 #define LL_MDMA_SRC_FIXED 0x00000000U /*!< Destination address pointer is fixed */ 0479 #define LL_MDMA_SRC_INCREMENT MDMA_CTCR_SINC_1 /*!< Destination address pointer is incremented after each data transfer */ 0480 #define LL_MDMA_SRC_DECREMENT MDMA_CTCR_SINC /*!< Destination address pointer is decremented after each data transfer */ 0481 /** 0482 * @} 0483 */ 0484 0485 /** @defgroup MDMA_LL_EC_BLK_RPT_DEST_ADDR_UPDATE_MODE Block Repeat Destination address Update Mode 0486 * @ingroup RTEMSBSPsARMSTM32H7 0487 * @{ 0488 */ 0489 #define LL_MDMA_BLK_RPT_DEST_ADDR_INCREMENT 0x00000000U /*!< Destination address pointer is incremented after each block transfer by Destination Update Value */ 0490 #define LL_MDMA_BLK_RPT_DEST_ADDR_DECREMENT MDMA_CBNDTR_BRDUM /*!< Destination address pointer is decremented after each block transfer by Destination Update Value */ 0491 /** 0492 * @} 0493 */ 0494 0495 /** @defgroup MDMA_LL_EC_SRC_BLK_RPT_ADDR_UPDATE_MODE Source Block Repeat address Update Mode 0496 * @ingroup RTEMSBSPsARMSTM32H7 0497 * @{ 0498 */ 0499 #define LL_MDMA_BLK_RPT_SRC_ADDR_INCREMENT 0x00000000U /*!< Source address pointer is incremented after each block transfer by Source Update Value */ 0500 #define LL_MDMA_BLK_RPT_SRC_ADDR_DECREMENT MDMA_CBNDTR_BRSUM /*!< Source address pointer is decremented after each block transfer by Source Update Value */ 0501 /** 0502 * @} 0503 */ 0504 0505 /** @defgroup MDMA_LL_EC_DEST_BUS Destination BUS Selection 0506 * @ingroup RTEMSBSPsARMSTM32H7 0507 * @{ 0508 */ 0509 #define LL_MDMA_DEST_BUS_SYSTEM_AXI 0x00000000U /*!< System/AXI bus is used as destination */ 0510 #define LL_MDMA_DEST_BUS_AHB_TCM MDMA_CTBR_DBUS /*!< AHB bus/TCM is used as destination */ 0511 /** 0512 * @} 0513 */ 0514 0515 /** @defgroup MDMA_LL_EC_SRC_BUS Source BUS Selection 0516 * @ingroup RTEMSBSPsARMSTM32H7 0517 * @{ 0518 */ 0519 #define LL_MDMA_SRC_BUS_SYSTEM_AXI 0x00000000U /*!< System/AXI bus is used as source */ 0520 #define LL_MDMA_SRC_BUS_AHB_TCM MDMA_CTBR_SBUS /*!< AHB bus/TCM is used as source */ 0521 /** 0522 * @} 0523 */ 0524 0525 /** @defgroup MDMA_LL_EC_HW_TRIGGER_SELCTION HW Trigger Selection 0526 * @ingroup RTEMSBSPsARMSTM32H7 0527 * @{ 0528 */ 0529 #define LL_MDMA_REQ_DMA1_STREAM0_TC 0x00000000U /*!< MDMA HW Trigger (request) is DMA1 Stream 0 Transfer Complete Flag */ 0530 #define LL_MDMA_REQ_DMA1_STREAM1_TC 0x00000001U /*!< MDMA HW Trigger (request) is DMA1 Stream 1 Transfer Complete Flag */ 0531 #define LL_MDMA_REQ_DMA1_STREAM2_TC 0x00000002U /*!< MDMA HW Trigger (request) is DMA1 Stream 2 Transfer Complete Flag */ 0532 #define LL_MDMA_REQ_DMA1_STREAM3_TC 0x00000003U /*!< MDMA HW Trigger (request) is DMA1 Stream 3 Transfer Complete Flag */ 0533 #define LL_MDMA_REQ_DMA1_STREAM4_TC 0x00000004U /*!< MDMA HW Trigger (request) is DMA1 Stream 4 Transfer Complete Flag */ 0534 #define LL_MDMA_REQ_DMA1_STREAM5_TC 0x00000005U /*!< MDMA HW Trigger (request) is DMA1 Stream 5 Transfer Complete Flag */ 0535 #define LL_MDMA_REQ_DMA1_STREAM6_TC 0x00000006U /*!< MDMA HW Trigger (request) is DMA1 Stream 6 Transfer Complete Flag */ 0536 #define LL_MDMA_REQ_DMA1_STREAM7_TC 0x00000007U /*!< MDMA HW Trigger (request) is DMA1 Stream 7 Transfer Complete Flag */ 0537 #define LL_MDMA_REQ_DMA2_STREAM0_TC 0x00000008U /*!< MDMA HW Trigger (request) is DMA2 Stream 0 Transfer Complete Flag */ 0538 #define LL_MDMA_REQ_DMA2_STREAM1_TC 0x00000009U /*!< MDMA HW Trigger (request) is DMA2 Stream 1 Transfer Complete Flag */ 0539 #define LL_MDMA_REQ_DMA2_STREAM2_TC 0x0000000AU /*!< MDMA HW Trigger (request) is DMA2 Stream 2 Transfer Complete Flag */ 0540 #define LL_MDMA_REQ_DMA2_STREAM3_TC 0x0000000BU /*!< MDMA HW Trigger (request) is DMA2 Stream 3 Transfer Complete Flag */ 0541 #define LL_MDMA_REQ_DMA2_STREAM4_TC 0x0000000CU /*!< MDMA HW Trigger (request) is DMA2 Stream 4 Transfer Complete Flag */ 0542 #define LL_MDMA_REQ_DMA2_STREAM5_TC 0x0000000DU /*!< MDMA HW Trigger (request) is DMA2 Stream 5 Transfer Complete Flag */ 0543 #define LL_MDMA_REQ_DMA2_STREAM6_TC 0x0000000EU /*!< MDMA HW Trigger (request) is DMA2 Stream 6 Transfer Complete Flag */ 0544 #define LL_MDMA_REQ_DMA2_STREAM7_TC 0x0000000FU /*!< MDMA HW Trigger (request) is DMA2 Stream 7 Transfer Complete Flag */ 0545 #if defined (LTDC) 0546 #define LL_MDMA_REQ_LTDC_LINE_IT 0x00000010U /*!< MDMA HW Trigger (request) is LTDC Line interrupt Flag */ 0547 #endif /* LTDC */ 0548 #if defined (JPEG) 0549 #define LL_MDMA_REQ_JPEG_INFIFO_TH 0x00000011U /*!< MDMA HW Trigger (request) is JPEG Input FIFO threshold Flag */ 0550 #define LL_MDMA_REQ_JPEG_INFIFO_NF 0x00000012U /*!< MDMA HW Trigger (request) is JPEG Input FIFO not full Flag */ 0551 #define LL_MDMA_REQ_JPEG_OUTFIFO_TH 0x00000013U /*!< MDMA HW Trigger (request) is JPEG Output FIFO threshold Flag */ 0552 #define LL_MDMA_REQ_JPEG_OUTFIFO_NE 0x00000014U /*!< MDMA HW Trigger (request) is JPEG Output FIFO not empty Flag */ 0553 #define LL_MDMA_REQ_JPEG_END_CONVERSION 0x00000015U /*!< MDMA HW Trigger (request) is JPEG End of conversion Flag */ 0554 #endif /* JPEG */ 0555 #if defined (QUADSPI) 0556 #define LL_MDMA_REQ_QUADSPI_FIFO_TH 0x00000016U /*!< MDMA HW Trigger (request) is QSPI FIFO threshold Flag */ 0557 #define LL_MDMA_REQ_QUADSPI_TC 0x00000017U /*!< MDMA HW Trigger (request) is QSPI Transfer complete Flag */ 0558 #endif /* QUADSPI */ 0559 #if defined (OCTOSPI1) 0560 #define LL_MDMA_REQ_OCTOSPI1_FIFO_TH 0x00000016U /*!< MDMA HW Trigger (request) is OCTOSPI1 FIFO threshold Flag */ 0561 #define LL_MDMA_REQ_OCTOSPI1_TC 0x00000017U /*!< MDMA HW Trigger (request) is OCTOSPI1 Transfer complete Flag */ 0562 #endif /* OCTOSPI1 */ 0563 #define LL_MDMA_REQ_DMA2D_CLUT_TC 0x00000018U /*!< MDMA HW Trigger (request) is DMA2D CLUT Transfer Complete Flag */ 0564 #define LL_MDMA_REQ_DMA2D_TC 0x00000019U /*!< MDMA HW Trigger (request) is DMA2D Transfer Complete Flag */ 0565 #define LL_MDMA_REQ_DMA2D_TW 0x0000001AU /*!< MDMA HW Trigger (request) is DMA2D Transfer Watermark Flag */ 0566 #if defined (DSI) 0567 #define LL_MDMA_REQ_DSI_TEARING_EFFECT 0x0000001BU /*!< MDMA HW Trigger (request) is DSI Tearing Effect Flag */ 0568 #define LL_MDMA_REQ_DSI_END_REFRESH 0x0000001CU /*!< MDMA HW Trigger (request) is DSI End of refresh Flag */ 0569 #endif /* DSI */ 0570 #define LL_MDMA_REQ_SDMMC1_END_DATA 0x0000001DU /*!< MDMA HW Trigger (request) is SDMMC1 End of Data Flag */ 0571 #define LL_MDMA_REQ_SDMMC1_DMA_ENDBUFFER 0x0000001EU /*!< MDMA HW Trigger (request) is SDMMC1 Internal DMA buffer End Flag : This trigger is available starting from STM32H7 Rev.B devices */ 0572 #define LL_MDMA_REQ_SDMMC1_COMMAND_END 0x0000001FU /*!< MDMA HW Trigger (request) is SDMMC1 Command End Flag : This trigger is available starting from STM32H7 Rev.B devices */ 0573 #if defined (OCTOSPI2) 0574 #define LL_MDMA_REQ_OCTOSPI2_FIFO_TH 0x00000020U /*!< MDMA HW Trigger (request) is OCTOSPI2 FIFO threshold Flag */ 0575 #define LL_MDMA_REQ_OCTOSPI2_TC 0x00000021U /*!< MDMA HW Trigger (request) is OCTOSPI2 Transfer complete Flag */ 0576 #endif /* OCTOSPI2 */ 0577 /** 0578 * @} 0579 */ 0580 0581 /** @defgroup MDMA_LL_EC_XFER_ERROR_DIRECTION Transfer Error Direction 0582 * @ingroup RTEMSBSPsARMSTM32H7 0583 * @{ 0584 */ 0585 #define LL_MDMA_READ_ERROR 0x00000000U /*!< Last transfer error on the channel was a related to a read access */ 0586 #define LL_MDMA_WRITE_ERROR MDMA_CESR_TED /*!< Last transfer error on the channel was a related to a write access */ 0587 /** 0588 * @} 0589 */ 0590 0591 /** 0592 * @} 0593 */ 0594 0595 /* Exported macro ------------------------------------------------------------*/ 0596 /** @defgroup MDMA_LL_Exported_Macros MDMA Exported Macros 0597 * @ingroup RTEMSBSPsARMSTM32H7 0598 * @{ 0599 */ 0600 0601 /** @defgroup MDMA_LL_EM_WRITE_READ Common Write and read registers macros 0602 * @ingroup RTEMSBSPsARMSTM32H7 0603 * @{ 0604 */ 0605 /** 0606 * @brief Write a value in MDMA register 0607 * @param __INSTANCE__ MDMA Instance 0608 * @param __REG__ Register to be written 0609 * @param __VALUE__ Value to be written in the register 0610 * @retval None 0611 */ 0612 #define LL_MDMA_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__)) 0613 0614 /** 0615 * @brief Read a value in MDMA register 0616 * @param __INSTANCE__ MDMA Instance 0617 * @param __REG__ Register to be read 0618 * @retval Register value 0619 */ 0620 #define LL_MDMA_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__) 0621 /** 0622 * @} 0623 */ 0624 0625 /** @defgroup MDMA_LL_EM_CONVERT_DMAxCHANNELy Convert MDMAxChannely 0626 * @ingroup RTEMSBSPsARMSTM32H7 0627 * @{ 0628 */ 0629 /** 0630 * @brief Convert MDMAx_Channely into MDMAx 0631 * @param __CHANNEL_INSTANCE__ MDMAx_Channely 0632 * @retval MDMAx 0633 */ 0634 #define LL_MDMA_GET_INSTANCE(__CHANNEL_INSTANCE__) (MDMA) 0635 0636 /** 0637 * @brief Convert MDMAx_Channely into LL_MDMA_CHANNEL_y 0638 * @param __CHANNEL_INSTANCE__ MDMAx_Channely 0639 * @retval LL_MDMA_CHANNEL_y 0640 */ 0641 #define LL_MDMA_GET_CHANNEL(__CHANNEL_INSTANCE__) \ 0642 (((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel0 )) ? LL_MDMA_CHANNEL_0 : \ 0643 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel1 )) ? LL_MDMA_CHANNEL_1 : \ 0644 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel2 )) ? LL_MDMA_CHANNEL_2 : \ 0645 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel3 )) ? LL_MDMA_CHANNEL_3 : \ 0646 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel4 )) ? LL_MDMA_CHANNEL_4 : \ 0647 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel5 )) ? LL_MDMA_CHANNEL_5 : \ 0648 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel6 )) ? LL_MDMA_CHANNEL_6 : \ 0649 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel7 )) ? LL_MDMA_CHANNEL_7 : \ 0650 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel8 )) ? LL_MDMA_CHANNEL_8 : \ 0651 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel9 )) ? LL_MDMA_CHANNEL_9 : \ 0652 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel10)) ? LL_MDMA_CHANNEL_10 : \ 0653 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel11)) ? LL_MDMA_CHANNEL_11 : \ 0654 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel12)) ? LL_MDMA_CHANNEL_12 : \ 0655 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel13)) ? LL_MDMA_CHANNEL_13 : \ 0656 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel14)) ? LL_MDMA_CHANNEL_14 : \ 0657 LL_MDMA_CHANNEL_15) 0658 0659 /** 0660 * @brief Convert MDMA Instance MDMAx and LL_MDMA_CHANNEL_y into MDMAx_Channely 0661 * @param __MDMA_INSTANCE__ MDMAx 0662 * @param __CHANNEL__ LL_MDMA_CHANNEL_y 0663 * @retval MDMAx_Channely 0664 */ 0665 #define LL_MDMA_GET_CHANNEL_INSTANCE(__MDMA_INSTANCE__, __CHANNEL__) \ 0666 (((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_0 )) ? MDMA_Channel0 : \ 0667 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_1 )) ? MDMA_Channel1 : \ 0668 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_2 )) ? MDMA_Channel2 : \ 0669 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_3 )) ? MDMA_Channel3 : \ 0670 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_4 )) ? MDMA_Channel4 : \ 0671 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_5 )) ? MDMA_Channel5 : \ 0672 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_6 )) ? MDMA_Channel6 : \ 0673 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_7 )) ? MDMA_Channel7 : \ 0674 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_8 )) ? MDMA_Channel8 : \ 0675 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_9 )) ? MDMA_Channel9 : \ 0676 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_10)) ? MDMA_Channel10 : \ 0677 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_11)) ? MDMA_Channel11 : \ 0678 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_12)) ? MDMA_Channel12 : \ 0679 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_13)) ? MDMA_Channel13 : \ 0680 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_14)) ? MDMA_Channel14 : \ 0681 MDMA_Channel15) 0682 0683 /** 0684 * @} 0685 */ 0686 0687 /** 0688 * @} 0689 */ 0690 0691 0692 /* Exported functions --------------------------------------------------------*/ 0693 /** @defgroup MDMA_LL_Exported_Functions MDMA Exported Functions 0694 * @ingroup RTEMSBSPsARMSTM32H7 0695 * @{ 0696 */ 0697 0698 /** @defgroup MDMA_LL_EF_Configuration Configuration 0699 * @ingroup RTEMSBSPsARMSTM32H7 0700 * @{ 0701 */ 0702 /** 0703 * @brief Enable MDMA channel. 0704 * @rmtoll CCR EN LL_MDMA_EnableChannel 0705 * @param MDMAx MDMAx Instance 0706 * @param Channel This parameter can be one of the following values: 0707 * @arg @ref LL_MDMA_CHANNEL_0 0708 * @arg @ref LL_MDMA_CHANNEL_1 0709 * @arg @ref LL_MDMA_CHANNEL_2 0710 * @arg @ref LL_MDMA_CHANNEL_3 0711 * @arg @ref LL_MDMA_CHANNEL_4 0712 * @arg @ref LL_MDMA_CHANNEL_5 0713 * @arg @ref LL_MDMA_CHANNEL_6 0714 * @arg @ref LL_MDMA_CHANNEL_7 0715 * @arg @ref LL_MDMA_CHANNEL_8 0716 * @arg @ref LL_MDMA_CHANNEL_9 0717 * @arg @ref LL_MDMA_CHANNEL_10 0718 * @arg @ref LL_MDMA_CHANNEL_11 0719 * @arg @ref LL_MDMA_CHANNEL_12 0720 * @arg @ref LL_MDMA_CHANNEL_13 0721 * @arg @ref LL_MDMA_CHANNEL_14 0722 * @arg @ref LL_MDMA_CHANNEL_15 0723 * @retval None 0724 */ 0725 __STATIC_INLINE void LL_MDMA_EnableChannel(MDMA_TypeDef *MDMAx, uint32_t Channel) 0726 { 0727 uint32_t mdma_base_addr = (uint32_t)MDMAx; 0728 0729 SET_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_EN); 0730 } 0731 0732 /** 0733 * @brief Disable MDMA channel. 0734 * @rmtoll CCR EN LL_MDMA_DisableChannel 0735 * @param MDMAx MDMAx Instance 0736 * @param Channel This parameter can be one of the following values: 0737 * @arg @ref LL_MDMA_CHANNEL_0 0738 * @arg @ref LL_MDMA_CHANNEL_1 0739 * @arg @ref LL_MDMA_CHANNEL_2 0740 * @arg @ref LL_MDMA_CHANNEL_3 0741 * @arg @ref LL_MDMA_CHANNEL_4 0742 * @arg @ref LL_MDMA_CHANNEL_5 0743 * @arg @ref LL_MDMA_CHANNEL_6 0744 * @arg @ref LL_MDMA_CHANNEL_7 0745 * @arg @ref LL_MDMA_CHANNEL_8 0746 * @arg @ref LL_MDMA_CHANNEL_9 0747 * @arg @ref LL_MDMA_CHANNEL_10 0748 * @arg @ref LL_MDMA_CHANNEL_11 0749 * @arg @ref LL_MDMA_CHANNEL_12 0750 * @arg @ref LL_MDMA_CHANNEL_13 0751 * @arg @ref LL_MDMA_CHANNEL_14 0752 * @arg @ref LL_MDMA_CHANNEL_15 0753 * @retval None 0754 */ 0755 __STATIC_INLINE void LL_MDMA_DisableChannel(MDMA_TypeDef *MDMAx, uint32_t Channel) 0756 { 0757 uint32_t mdma_base_addr = (uint32_t)MDMAx; 0758 0759 CLEAR_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_EN); 0760 } 0761 0762 /** 0763 * @brief Check if MDMA channel is enabled or disabled. 0764 * @rmtoll CCR EN LL_MDMA_IsEnabledChannel 0765 * @param MDMAx MDMAx Instance 0766 * @param Channel This parameter can be one of the following values: 0767 * @arg @ref LL_MDMA_CHANNEL_0 0768 * @arg @ref LL_MDMA_CHANNEL_1 0769 * @arg @ref LL_MDMA_CHANNEL_2 0770 * @arg @ref LL_MDMA_CHANNEL_3 0771 * @arg @ref LL_MDMA_CHANNEL_4 0772 * @arg @ref LL_MDMA_CHANNEL_5 0773 * @arg @ref LL_MDMA_CHANNEL_6 0774 * @arg @ref LL_MDMA_CHANNEL_7 0775 * @arg @ref LL_MDMA_CHANNEL_8 0776 * @arg @ref LL_MDMA_CHANNEL_9 0777 * @arg @ref LL_MDMA_CHANNEL_10 0778 * @arg @ref LL_MDMA_CHANNEL_11 0779 * @arg @ref LL_MDMA_CHANNEL_12 0780 * @arg @ref LL_MDMA_CHANNEL_13 0781 * @arg @ref LL_MDMA_CHANNEL_14 0782 * @arg @ref LL_MDMA_CHANNEL_15 0783 * @retval State of bit (1 or 0). 0784 */ 0785 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledChannel(MDMA_TypeDef *MDMAx, uint32_t Channel) 0786 { 0787 uint32_t mdma_base_addr = (uint32_t)MDMAx; 0788 0789 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_EN) == (MDMA_CCR_EN)) ? 1UL : 0UL); 0790 } 0791 0792 /** 0793 * @brief Generate a SW transfer request on the MDMA channel. 0794 * @rmtoll CCR SWRQ LL_MDMA_GenerateSWRequest 0795 * @param MDMAx MDMAx Instance 0796 * @param Channel This parameter can be one of the following values: 0797 * @arg @ref LL_MDMA_CHANNEL_0 0798 * @arg @ref LL_MDMA_CHANNEL_1 0799 * @arg @ref LL_MDMA_CHANNEL_2 0800 * @arg @ref LL_MDMA_CHANNEL_3 0801 * @arg @ref LL_MDMA_CHANNEL_4 0802 * @arg @ref LL_MDMA_CHANNEL_5 0803 * @arg @ref LL_MDMA_CHANNEL_6 0804 * @arg @ref LL_MDMA_CHANNEL_7 0805 * @arg @ref LL_MDMA_CHANNEL_8 0806 * @arg @ref LL_MDMA_CHANNEL_9 0807 * @arg @ref LL_MDMA_CHANNEL_10 0808 * @arg @ref LL_MDMA_CHANNEL_11 0809 * @arg @ref LL_MDMA_CHANNEL_12 0810 * @arg @ref LL_MDMA_CHANNEL_13 0811 * @arg @ref LL_MDMA_CHANNEL_14 0812 * @arg @ref LL_MDMA_CHANNEL_15 0813 * @retval None 0814 */ 0815 __STATIC_INLINE void LL_MDMA_GenerateSWRequest(MDMA_TypeDef *MDMAx, uint32_t Channel) 0816 { 0817 uint32_t mdma_base_addr = (uint32_t)MDMAx; 0818 0819 SET_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_SWRQ); 0820 } 0821 0822 /** 0823 * @brief Configure Transfer endianness parameters : Word, Half word and Bytes Endianness. 0824 * @rmtoll CCR WEX LL_MDMA_ConfigXferEndianness\n 0825 * @rmtoll CCR HEX LL_MDMA_ConfigXferEndianness\n 0826 * @rmtoll CCR BEX LL_MDMA_ConfigXferEndianness 0827 * @param MDMAx MDMAx Instance 0828 * @param Channel This parameter can be one of the following values: 0829 * @arg @ref LL_MDMA_CHANNEL_0 0830 * @arg @ref LL_MDMA_CHANNEL_1 0831 * @arg @ref LL_MDMA_CHANNEL_2 0832 * @arg @ref LL_MDMA_CHANNEL_3 0833 * @arg @ref LL_MDMA_CHANNEL_4 0834 * @arg @ref LL_MDMA_CHANNEL_5 0835 * @arg @ref LL_MDMA_CHANNEL_6 0836 * @arg @ref LL_MDMA_CHANNEL_7 0837 * @arg @ref LL_MDMA_CHANNEL_8 0838 * @arg @ref LL_MDMA_CHANNEL_9 0839 * @arg @ref LL_MDMA_CHANNEL_10 0840 * @arg @ref LL_MDMA_CHANNEL_11 0841 * @arg @ref LL_MDMA_CHANNEL_12 0842 * @arg @ref LL_MDMA_CHANNEL_13 0843 * @arg @ref LL_MDMA_CHANNEL_14 0844 * @arg @ref LL_MDMA_CHANNEL_15 0845 * @param Configuration This parameter must be a combination of all the following values: 0846 * @arg @ref LL_MDMA_WORD_ENDIANNESS_PRESERVE or @ref LL_MDMA_WORD_ENDIANNESS_EXCHANGE 0847 * @arg @ref LL_MDMA_HALFWORD_ENDIANNESS_PRESERVE or @ref LL_MDMA_HALFWORD_ENDIANNESS_EXCHANGE 0848 * @arg @ref LL_MDMA_BYTE_ENDIANNESS_PRESERVE or @ref LL_MDMA_BYTE_ENDIANNESS_EXCHANGE 0849 * @retval None 0850 */ 0851 __STATIC_INLINE void LL_MDMA_ConfigXferEndianness(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Configuration) 0852 { 0853 uint32_t mdma_base_addr = (uint32_t)MDMAx; 0854 0855 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, 0856 MDMA_CCR_WEX | MDMA_CCR_HEX | MDMA_CCR_BEX, Configuration); 0857 } 0858 0859 /** 0860 * @brief Set Words Endianness. 0861 * @rmtoll CCR WEX LL_MDMA_SetWordEndianness 0862 * @param MDMAx MDMAx Instance 0863 * @param Channel This parameter can be one of the following values: 0864 * @arg @ref LL_MDMA_CHANNEL_0 0865 * @arg @ref LL_MDMA_CHANNEL_1 0866 * @arg @ref LL_MDMA_CHANNEL_2 0867 * @arg @ref LL_MDMA_CHANNEL_3 0868 * @arg @ref LL_MDMA_CHANNEL_4 0869 * @arg @ref LL_MDMA_CHANNEL_5 0870 * @arg @ref LL_MDMA_CHANNEL_6 0871 * @arg @ref LL_MDMA_CHANNEL_7 0872 * @arg @ref LL_MDMA_CHANNEL_8 0873 * @arg @ref LL_MDMA_CHANNEL_9 0874 * @arg @ref LL_MDMA_CHANNEL_10 0875 * @arg @ref LL_MDMA_CHANNEL_11 0876 * @arg @ref LL_MDMA_CHANNEL_12 0877 * @arg @ref LL_MDMA_CHANNEL_13 0878 * @arg @ref LL_MDMA_CHANNEL_14 0879 * @arg @ref LL_MDMA_CHANNEL_15 0880 * @param Endianness This parameter can be one of the following values: 0881 * @arg @ref LL_MDMA_WORD_ENDIANNESS_PRESERVE 0882 * @arg @ref LL_MDMA_WORD_ENDIANNESS_EXCHANGE 0883 * @retval None 0884 */ 0885 __STATIC_INLINE void LL_MDMA_SetWordEndianness(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Endianness) 0886 { 0887 uint32_t mdma_base_addr = (uint32_t)MDMAx; 0888 0889 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_WEX, Endianness); 0890 } 0891 0892 /** 0893 * @brief Get Words Endianness. 0894 * @rmtoll CCR WEX LL_MDMA_GetWordEndianness 0895 * @param MDMAx MDMAx Instance 0896 * @param Channel This parameter can be one of the following values: 0897 * @arg @ref LL_MDMA_CHANNEL_0 0898 * @arg @ref LL_MDMA_CHANNEL_1 0899 * @arg @ref LL_MDMA_CHANNEL_2 0900 * @arg @ref LL_MDMA_CHANNEL_3 0901 * @arg @ref LL_MDMA_CHANNEL_4 0902 * @arg @ref LL_MDMA_CHANNEL_5 0903 * @arg @ref LL_MDMA_CHANNEL_6 0904 * @arg @ref LL_MDMA_CHANNEL_7 0905 * @arg @ref LL_MDMA_CHANNEL_8 0906 * @arg @ref LL_MDMA_CHANNEL_9 0907 * @arg @ref LL_MDMA_CHANNEL_10 0908 * @arg @ref LL_MDMA_CHANNEL_11 0909 * @arg @ref LL_MDMA_CHANNEL_12 0910 * @arg @ref LL_MDMA_CHANNEL_13 0911 * @arg @ref LL_MDMA_CHANNEL_14 0912 * @arg @ref LL_MDMA_CHANNEL_15 0913 * @retval Returned value can be one of the following values: 0914 * @arg @ref LL_MDMA_WORD_ENDIANNESS_PRESERVE 0915 * @arg @ref LL_MDMA_WORD_ENDIANNESS_EXCHANGE 0916 * @retval None 0917 */ 0918 __STATIC_INLINE uint32_t LL_MDMA_GetWordEndianness(MDMA_TypeDef *MDMAx, uint32_t Channel) 0919 { 0920 uint32_t mdma_base_addr = (uint32_t)MDMAx; 0921 0922 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_WEX)); 0923 } 0924 0925 /** 0926 * @brief Set Half Words Endianness. 0927 * @rmtoll CCR HEX LL_MDMA_SetHalfWordEndianness 0928 * @param MDMAx MDMAx Instance 0929 * @param Channel This parameter can be one of the following values: 0930 * @arg @ref LL_MDMA_CHANNEL_0 0931 * @arg @ref LL_MDMA_CHANNEL_1 0932 * @arg @ref LL_MDMA_CHANNEL_2 0933 * @arg @ref LL_MDMA_CHANNEL_3 0934 * @arg @ref LL_MDMA_CHANNEL_4 0935 * @arg @ref LL_MDMA_CHANNEL_5 0936 * @arg @ref LL_MDMA_CHANNEL_6 0937 * @arg @ref LL_MDMA_CHANNEL_7 0938 * @arg @ref LL_MDMA_CHANNEL_8 0939 * @arg @ref LL_MDMA_CHANNEL_9 0940 * @arg @ref LL_MDMA_CHANNEL_10 0941 * @arg @ref LL_MDMA_CHANNEL_11 0942 * @arg @ref LL_MDMA_CHANNEL_12 0943 * @arg @ref LL_MDMA_CHANNEL_13 0944 * @arg @ref LL_MDMA_CHANNEL_14 0945 * @arg @ref LL_MDMA_CHANNEL_15 0946 * @param Endianness This parameter can be one of the following values: 0947 * @arg @ref LL_MDMA_HALFWORD_ENDIANNESS_PRESERVE 0948 * @arg @ref LL_MDMA_HALFWORD_ENDIANNESS_EXCHANGE 0949 * @retval None 0950 */ 0951 __STATIC_INLINE void LL_MDMA_SetHalfWordEndianness(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Endianness) 0952 { 0953 uint32_t mdma_base_addr = (uint32_t)MDMAx; 0954 0955 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_HEX, Endianness); 0956 } 0957 0958 /** 0959 * @brief Get Half Words Endianness. 0960 * @rmtoll CCR HEX LL_MDMA_GetHalfWordEndianness 0961 * @param MDMAx MDMAx Instance 0962 * @param Channel This parameter can be one of the following values: 0963 * @arg @ref LL_MDMA_CHANNEL_0 0964 * @arg @ref LL_MDMA_CHANNEL_1 0965 * @arg @ref LL_MDMA_CHANNEL_2 0966 * @arg @ref LL_MDMA_CHANNEL_3 0967 * @arg @ref LL_MDMA_CHANNEL_4 0968 * @arg @ref LL_MDMA_CHANNEL_5 0969 * @arg @ref LL_MDMA_CHANNEL_6 0970 * @arg @ref LL_MDMA_CHANNEL_7 0971 * @arg @ref LL_MDMA_CHANNEL_8 0972 * @arg @ref LL_MDMA_CHANNEL_9 0973 * @arg @ref LL_MDMA_CHANNEL_10 0974 * @arg @ref LL_MDMA_CHANNEL_11 0975 * @arg @ref LL_MDMA_CHANNEL_12 0976 * @arg @ref LL_MDMA_CHANNEL_13 0977 * @arg @ref LL_MDMA_CHANNEL_14 0978 * @arg @ref LL_MDMA_CHANNEL_15 0979 * @retval Returned value can be one of the following values: 0980 * @arg @ref LL_MDMA_HALFWORD_ENDIANNESS_PRESERVE 0981 * @arg @ref LL_MDMA_HALFWORD_ENDIANNESS_EXCHANGE 0982 * @retval None 0983 */ 0984 __STATIC_INLINE uint32_t LL_MDMA_GetHalfWordEndianness(MDMA_TypeDef *MDMAx, uint32_t Channel) 0985 { 0986 uint32_t mdma_base_addr = (uint32_t)MDMAx; 0987 0988 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_HEX)); 0989 } 0990 0991 /** 0992 * @brief Set Bytes Endianness. 0993 * @rmtoll CCR BEX LL_MDMA_SetByteEndianness 0994 * @param MDMAx MDMAx Instance 0995 * @param Channel This parameter can be one of the following values: 0996 * @arg @ref LL_MDMA_CHANNEL_0 0997 * @arg @ref LL_MDMA_CHANNEL_1 0998 * @arg @ref LL_MDMA_CHANNEL_2 0999 * @arg @ref LL_MDMA_CHANNEL_3 1000 * @arg @ref LL_MDMA_CHANNEL_4 1001 * @arg @ref LL_MDMA_CHANNEL_5 1002 * @arg @ref LL_MDMA_CHANNEL_6 1003 * @arg @ref LL_MDMA_CHANNEL_7 1004 * @arg @ref LL_MDMA_CHANNEL_8 1005 * @arg @ref LL_MDMA_CHANNEL_9 1006 * @arg @ref LL_MDMA_CHANNEL_10 1007 * @arg @ref LL_MDMA_CHANNEL_11 1008 * @arg @ref LL_MDMA_CHANNEL_12 1009 * @arg @ref LL_MDMA_CHANNEL_13 1010 * @arg @ref LL_MDMA_CHANNEL_14 1011 * @arg @ref LL_MDMA_CHANNEL_15 1012 * @param Endianness This parameter can be one of the following values: 1013 * @arg @ref LL_MDMA_BYTE_ENDIANNESS_PRESERVE 1014 * @arg @ref LL_MDMA_BYTE_ENDIANNESS_EXCHANGE 1015 * @retval None 1016 */ 1017 __STATIC_INLINE void LL_MDMA_SetByteEndianness(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Endianness) 1018 { 1019 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1020 1021 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_BEX, Endianness); 1022 } 1023 1024 /** 1025 * @brief Get Bytes Endianness. 1026 * @rmtoll CCR BEX LL_MDMA_GetByteEndianness 1027 * @param MDMAx MDMAx Instance 1028 * @param Channel This parameter can be one of the following values: 1029 * @arg @ref LL_MDMA_CHANNEL_0 1030 * @arg @ref LL_MDMA_CHANNEL_1 1031 * @arg @ref LL_MDMA_CHANNEL_2 1032 * @arg @ref LL_MDMA_CHANNEL_3 1033 * @arg @ref LL_MDMA_CHANNEL_4 1034 * @arg @ref LL_MDMA_CHANNEL_5 1035 * @arg @ref LL_MDMA_CHANNEL_6 1036 * @arg @ref LL_MDMA_CHANNEL_7 1037 * @arg @ref LL_MDMA_CHANNEL_8 1038 * @arg @ref LL_MDMA_CHANNEL_9 1039 * @arg @ref LL_MDMA_CHANNEL_10 1040 * @arg @ref LL_MDMA_CHANNEL_11 1041 * @arg @ref LL_MDMA_CHANNEL_12 1042 * @arg @ref LL_MDMA_CHANNEL_13 1043 * @arg @ref LL_MDMA_CHANNEL_14 1044 * @arg @ref LL_MDMA_CHANNEL_15 1045 * @retval Returned value can be one of the following values: 1046 * @arg @ref LL_MDMA_BYTE_ENDIANNESS_PRESERVE 1047 * @arg @ref LL_MDMA_BYTE_ENDIANNESS_EXCHANGE 1048 * @retval None 1049 */ 1050 __STATIC_INLINE uint32_t LL_MDMA_GetByteEndianness(MDMA_TypeDef *MDMAx, uint32_t Channel) 1051 { 1052 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1053 1054 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_BEX)); 1055 } 1056 1057 /** 1058 * @brief Set Channel priority level. 1059 * @rmtoll CCR PL LL_MDMA_SetChannelPriorityLevel 1060 * @param MDMAx MDMAx Instance 1061 * @param Channel This parameter can be one of the following values: 1062 * @arg @ref LL_MDMA_CHANNEL_0 1063 * @arg @ref LL_MDMA_CHANNEL_1 1064 * @arg @ref LL_MDMA_CHANNEL_2 1065 * @arg @ref LL_MDMA_CHANNEL_3 1066 * @arg @ref LL_MDMA_CHANNEL_4 1067 * @arg @ref LL_MDMA_CHANNEL_5 1068 * @arg @ref LL_MDMA_CHANNEL_6 1069 * @arg @ref LL_MDMA_CHANNEL_7 1070 * @arg @ref LL_MDMA_CHANNEL_8 1071 * @arg @ref LL_MDMA_CHANNEL_9 1072 * @arg @ref LL_MDMA_CHANNEL_10 1073 * @arg @ref LL_MDMA_CHANNEL_11 1074 * @arg @ref LL_MDMA_CHANNEL_12 1075 * @arg @ref LL_MDMA_CHANNEL_13 1076 * @arg @ref LL_MDMA_CHANNEL_14 1077 * @arg @ref LL_MDMA_CHANNEL_15 1078 * @param Priority This parameter can be one of the following values: 1079 * @arg @ref LL_MDMA_PRIORITY_LOW 1080 * @arg @ref LL_MDMA_PRIORITY_MEDIUM 1081 * @arg @ref LL_MDMA_PRIORITY_HIGH 1082 * @arg @ref LL_MDMA_PRIORITY_VERYHIGH 1083 * @retval None 1084 */ 1085 __STATIC_INLINE void LL_MDMA_SetChannelPriorityLevel(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Priority) 1086 { 1087 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1088 1089 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_PL, Priority); 1090 } 1091 1092 /** 1093 * @brief Get Channel priority level. 1094 * @rmtoll CCR PL LL_MDMA_GetChannelPriorityLevel 1095 * @param MDMAx MDMAx Instance 1096 * @param Channel This parameter can be one of the following values: 1097 * @arg @ref LL_MDMA_CHANNEL_0 1098 * @arg @ref LL_MDMA_CHANNEL_1 1099 * @arg @ref LL_MDMA_CHANNEL_2 1100 * @arg @ref LL_MDMA_CHANNEL_3 1101 * @arg @ref LL_MDMA_CHANNEL_4 1102 * @arg @ref LL_MDMA_CHANNEL_5 1103 * @arg @ref LL_MDMA_CHANNEL_6 1104 * @arg @ref LL_MDMA_CHANNEL_7 1105 * @arg @ref LL_MDMA_CHANNEL_8 1106 * @arg @ref LL_MDMA_CHANNEL_9 1107 * @arg @ref LL_MDMA_CHANNEL_10 1108 * @arg @ref LL_MDMA_CHANNEL_11 1109 * @arg @ref LL_MDMA_CHANNEL_12 1110 * @arg @ref LL_MDMA_CHANNEL_13 1111 * @arg @ref LL_MDMA_CHANNEL_14 1112 * @arg @ref LL_MDMA_CHANNEL_15 1113 * @retval Returned value can be one of the following values: 1114 * @arg @ref LL_MDMA_PRIORITY_LOW 1115 * @arg @ref LL_MDMA_PRIORITY_MEDIUM 1116 * @arg @ref LL_MDMA_PRIORITY_HIGH 1117 * @arg @ref LL_MDMA_PRIORITY_VERYHIGH 1118 * @retval None 1119 */ 1120 __STATIC_INLINE uint32_t LL_MDMA_GetChannelPriorityLevel(MDMA_TypeDef *MDMAx, uint32_t Channel) 1121 { 1122 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1123 1124 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_PL)); 1125 } 1126 1127 /** 1128 * @brief Configure MDMA transfer parameters. 1129 * @rmtoll CTCR BWM LL_MDMA_ConfigTransfer\n 1130 * @rmtoll CTCR SWRM LL_MDMA_ConfigTransfer\n 1131 * @rmtoll CTCR TRGM LL_MDMA_ConfigTransfer\n 1132 * @rmtoll CTCR PAM LL_MDMA_ConfigTransfer\n 1133 * @rmtoll CTCR PKE LL_MDMA_ConfigTransfer\n 1134 * @rmtoll CTCR TLEN LL_MDMA_ConfigTransfer\n 1135 * @rmtoll CTCR DBURST LL_MDMA_ConfigTransfer\n 1136 * @rmtoll CTCR SBURST LL_MDMA_ConfigTransfer\n 1137 * @rmtoll CTCR DINCOS LL_MDMA_ConfigTransfer\n 1138 * @rmtoll CTCR SINCOS LL_MDMA_ConfigTransfer\n 1139 * @rmtoll CTCR DSIZE LL_MDMA_ConfigTransfer\n 1140 * @rmtoll CTCR SSIZE LL_MDMA_ConfigTransfer\n 1141 * @rmtoll CTCR DINC LL_MDMA_ConfigTransfer\n 1142 * @rmtoll CTCR SINC LL_MDMA_ConfigTransfer 1143 * @param MDMAx MDMAx Instance 1144 * @param Channel This parameter can be one of the following values: 1145 * @arg @ref LL_MDMA_CHANNEL_0 1146 * @arg @ref LL_MDMA_CHANNEL_1 1147 * @arg @ref LL_MDMA_CHANNEL_2 1148 * @arg @ref LL_MDMA_CHANNEL_3 1149 * @arg @ref LL_MDMA_CHANNEL_4 1150 * @arg @ref LL_MDMA_CHANNEL_5 1151 * @arg @ref LL_MDMA_CHANNEL_6 1152 * @arg @ref LL_MDMA_CHANNEL_7 1153 * @arg @ref LL_MDMA_CHANNEL_8 1154 * @arg @ref LL_MDMA_CHANNEL_9 1155 * @arg @ref LL_MDMA_CHANNEL_10 1156 * @arg @ref LL_MDMA_CHANNEL_11 1157 * @arg @ref LL_MDMA_CHANNEL_12 1158 * @arg @ref LL_MDMA_CHANNEL_13 1159 * @arg @ref LL_MDMA_CHANNEL_14 1160 * @arg @ref LL_MDMA_CHANNEL_15 1161 * @param Configuration This parameter must be a combination of all the following values: 1162 * @arg @ref LL_MDMA_BUFF_WRITE_DISABLE or @ref LL_MDMA_BUFF_WRITE_ENABLE 1163 * @arg @ref LL_MDMA_REQUEST_MODE_HW or @ref LL_MDMA_REQUEST_MODE_SW 1164 * @arg @ref LL_MDMA_BUFFER_TRANSFER or @ref LL_MDMA_BLOCK_TRANSFER or @ref LL_MDMA_REPEAT_BLOCK_TRANSFER or @ref LL_MDMA_FULL_TRANSFER 1165 * @arg @ref LL_MDMA_DATAALIGN_RIGHT or @ref LL_MDMA_DATAALIGN_RIGHT_SIGNED or @ref LL_MDMA_DATAALIGN_LEFT 1166 * @arg @ref LL_MDMA_PACK_DISABLE or @ref LL_MDMA_PACK_ENABLE 1167 * @arg @ref LL_MDMA_DEST_BURST_SINGLE or @ref LL_MDMA_DEST_BURST_2BEATS or @ref LL_MDMA_DEST_BURST_4BEATS or @ref LL_MDMA_DEST_BURST_8BEATS 1168 * or @ref LL_MDMA_DEST_BURST_16BEATS or @ref LL_MDMA_DEST_BURST_32BEATS or @ref LL_MDMA_DEST_BURST_64BEATS or @ref LL_MDMA_DEST_BURST_128BEATS 1169 * @arg @ref LL_MDMA_SRC_BURST_SINGLE or @ref LL_MDMA_SRC_BURST_2BEATS or @ref LL_MDMA_SRC_BURST_4BEATS or @ref LL_MDMA_SRC_BURST_8BEATS 1170 * or @ref LL_MDMA_SRC_BURST_16BEATS or @ref LL_MDMA_SRC_BURST_32BEATS or @ref LL_MDMA_SRC_BURST_64BEATS or @ref LL_MDMA_SRC_BURST_128BEATS 1171 * @arg @ref LL_MDMA_DEST_INC_OFFSET_BYTE or @ref LL_MDMA_DEST_INC_OFFSET_HALFWORD or @ref LL_MDMA_DEST_INC_OFFSET_WORD or @ref LL_MDMA_DEST_INC_OFFSET_DOUBLEWORD 1172 * @arg @ref LL_MDMA_SRC_INC_OFFSET_BYTE or @ref LL_MDMA_SRC_INC_OFFSET_HALFWORD or @ref LL_MDMA_SRC_INC_OFFSET_WORD or @ref LL_MDMA_SRC_INC_OFFSET_DOUBLEWORD 1173 * @arg @ref LL_MDMA_DEST_DATA_SIZE_BYTE or @ref LL_MDMA_DEST_DATA_SIZE_HALFWORD or @ref LL_MDMA_DEST_DATA_SIZE_WORD or @ref LL_MDMA_DEST_DATA_SIZE_DOUBLEWORD 1174 * @arg @ref LL_MDMA_SRC_DATA_SIZE_BYTE or @ref LL_MDMA_SRC_DATA_SIZE_HALFWORD or @ref LL_MDMA_SRC_DATA_SIZE_WORD or @ref LL_MDMA_SRC_DATA_SIZE_DOUBLEWORD 1175 * @arg @ref LL_MDMA_DEST_FIXED or @ref LL_MDMA_DEST_INCREMENT or @ref LL_MDMA_DEST_DECREMENT 1176 * @arg @ref LL_MDMA_SRC_FIXED or @ref LL_MDMA_SRC_INCREMENT or @ref LL_MDMA_SRC_DECREMENT 1177 * @param BufferXferLength This parameter can be a value Between 0 to 0x0000007F 1178 * @retval None 1179 */ 1180 __STATIC_INLINE void LL_MDMA_ConfigTransfer(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Configuration, uint32_t BufferXferLength) 1181 { 1182 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1183 1184 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, 1185 Configuration | ((BufferXferLength << MDMA_CTCR_TLEN_Pos) & MDMA_CTCR_TLEN_Msk)); 1186 } 1187 1188 /** 1189 * @brief Enable Bufferable Write Mode. 1190 * @rmtoll CTCR BWM LL_MDMA_EnableBufferableWrMode 1191 * @param MDMAx MDMAx Instance 1192 * @param Channel This parameter can be one of the following values: 1193 * @arg @ref LL_MDMA_CHANNEL_0 1194 * @arg @ref LL_MDMA_CHANNEL_1 1195 * @arg @ref LL_MDMA_CHANNEL_2 1196 * @arg @ref LL_MDMA_CHANNEL_3 1197 * @arg @ref LL_MDMA_CHANNEL_4 1198 * @arg @ref LL_MDMA_CHANNEL_5 1199 * @arg @ref LL_MDMA_CHANNEL_6 1200 * @arg @ref LL_MDMA_CHANNEL_7 1201 * @arg @ref LL_MDMA_CHANNEL_8 1202 * @arg @ref LL_MDMA_CHANNEL_9 1203 * @arg @ref LL_MDMA_CHANNEL_10 1204 * @arg @ref LL_MDMA_CHANNEL_11 1205 * @arg @ref LL_MDMA_CHANNEL_12 1206 * @arg @ref LL_MDMA_CHANNEL_13 1207 * @arg @ref LL_MDMA_CHANNEL_14 1208 * @arg @ref LL_MDMA_CHANNEL_15 1209 * @retval None 1210 */ 1211 __STATIC_INLINE void LL_MDMA_EnableBufferableWrMode(MDMA_TypeDef *MDMAx, uint32_t Channel) 1212 { 1213 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1214 1215 SET_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_BWM); 1216 } 1217 1218 /** 1219 * @brief Disable Bufferable Write Mode. 1220 * @rmtoll CTCR BWM LL_MDMA_DisableBufferableWrMode 1221 * @param MDMAx MDMAx Instance 1222 * @param Channel This parameter can be one of the following values: 1223 * @arg @ref LL_MDMA_CHANNEL_0 1224 * @arg @ref LL_MDMA_CHANNEL_1 1225 * @arg @ref LL_MDMA_CHANNEL_2 1226 * @arg @ref LL_MDMA_CHANNEL_3 1227 * @arg @ref LL_MDMA_CHANNEL_4 1228 * @arg @ref LL_MDMA_CHANNEL_5 1229 * @arg @ref LL_MDMA_CHANNEL_6 1230 * @arg @ref LL_MDMA_CHANNEL_7 1231 * @arg @ref LL_MDMA_CHANNEL_8 1232 * @arg @ref LL_MDMA_CHANNEL_9 1233 * @arg @ref LL_MDMA_CHANNEL_10 1234 * @arg @ref LL_MDMA_CHANNEL_11 1235 * @arg @ref LL_MDMA_CHANNEL_12 1236 * @arg @ref LL_MDMA_CHANNEL_13 1237 * @arg @ref LL_MDMA_CHANNEL_14 1238 * @arg @ref LL_MDMA_CHANNEL_15 1239 * @retval None 1240 */ 1241 __STATIC_INLINE void LL_MDMA_DisableBufferableWrMode(MDMA_TypeDef *MDMAx, uint32_t Channel) 1242 { 1243 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1244 1245 CLEAR_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_BWM); 1246 } 1247 1248 /** 1249 * @brief Check if Bufferable Write Mode is enabled or disabled. 1250 * @rmtoll CTCR BWM LL_MDMA_IsEnabledBufferableWrMode 1251 * @param MDMAx MDMAx Instance 1252 * @param Channel This parameter can be one of the following values: 1253 * @arg @ref LL_MDMA_CHANNEL_0 1254 * @arg @ref LL_MDMA_CHANNEL_1 1255 * @arg @ref LL_MDMA_CHANNEL_2 1256 * @arg @ref LL_MDMA_CHANNEL_3 1257 * @arg @ref LL_MDMA_CHANNEL_4 1258 * @arg @ref LL_MDMA_CHANNEL_5 1259 * @arg @ref LL_MDMA_CHANNEL_6 1260 * @arg @ref LL_MDMA_CHANNEL_7 1261 * @arg @ref LL_MDMA_CHANNEL_8 1262 * @arg @ref LL_MDMA_CHANNEL_9 1263 * @arg @ref LL_MDMA_CHANNEL_10 1264 * @arg @ref LL_MDMA_CHANNEL_11 1265 * @arg @ref LL_MDMA_CHANNEL_12 1266 * @arg @ref LL_MDMA_CHANNEL_13 1267 * @arg @ref LL_MDMA_CHANNEL_14 1268 * @arg @ref LL_MDMA_CHANNEL_15 1269 * @retval State of bit (1 or 0). 1270 */ 1271 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledBufferableWrMode(MDMA_TypeDef *MDMAx, uint32_t Channel) 1272 { 1273 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1274 1275 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_BWM) == (MDMA_CTCR_BWM)) ? 1UL : 0UL); 1276 } 1277 1278 /** 1279 * @brief Set Request Mode. 1280 * @rmtoll CTCR SWRM LL_MDMA_SetRequestMode 1281 * @param MDMAx MDMAx Instance 1282 * @param Channel This parameter can be one of the following values: 1283 * @arg @ref LL_MDMA_CHANNEL_0 1284 * @arg @ref LL_MDMA_CHANNEL_1 1285 * @arg @ref LL_MDMA_CHANNEL_2 1286 * @arg @ref LL_MDMA_CHANNEL_3 1287 * @arg @ref LL_MDMA_CHANNEL_4 1288 * @arg @ref LL_MDMA_CHANNEL_5 1289 * @arg @ref LL_MDMA_CHANNEL_6 1290 * @arg @ref LL_MDMA_CHANNEL_7 1291 * @arg @ref LL_MDMA_CHANNEL_8 1292 * @arg @ref LL_MDMA_CHANNEL_9 1293 * @arg @ref LL_MDMA_CHANNEL_10 1294 * @arg @ref LL_MDMA_CHANNEL_11 1295 * @arg @ref LL_MDMA_CHANNEL_12 1296 * @arg @ref LL_MDMA_CHANNEL_13 1297 * @arg @ref LL_MDMA_CHANNEL_14 1298 * @arg @ref LL_MDMA_CHANNEL_15 1299 * @param RequestMode This parameter can be one of the following values: 1300 * @arg @ref LL_MDMA_REQUEST_MODE_HW 1301 * @arg @ref LL_MDMA_REQUEST_MODE_SW 1302 * @retval None 1303 */ 1304 __STATIC_INLINE void LL_MDMA_SetRequestMode(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t RequestMode) 1305 { 1306 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1307 1308 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SWRM, RequestMode); 1309 } 1310 1311 /** 1312 * @brief Get Request Mode. 1313 * @rmtoll CTCR SWRM LL_MDMA_GetRequestMode 1314 * @param MDMAx MDMAx Instance 1315 * @param Channel This parameter can be one of the following values: 1316 * @arg @ref LL_MDMA_CHANNEL_0 1317 * @arg @ref LL_MDMA_CHANNEL_1 1318 * @arg @ref LL_MDMA_CHANNEL_2 1319 * @arg @ref LL_MDMA_CHANNEL_3 1320 * @arg @ref LL_MDMA_CHANNEL_4 1321 * @arg @ref LL_MDMA_CHANNEL_5 1322 * @arg @ref LL_MDMA_CHANNEL_6 1323 * @arg @ref LL_MDMA_CHANNEL_7 1324 * @arg @ref LL_MDMA_CHANNEL_8 1325 * @arg @ref LL_MDMA_CHANNEL_9 1326 * @arg @ref LL_MDMA_CHANNEL_10 1327 * @arg @ref LL_MDMA_CHANNEL_11 1328 * @arg @ref LL_MDMA_CHANNEL_12 1329 * @arg @ref LL_MDMA_CHANNEL_13 1330 * @arg @ref LL_MDMA_CHANNEL_14 1331 * @arg @ref LL_MDMA_CHANNEL_15 1332 * @retval Returned value can be one of the following values: 1333 * @arg @ref LL_MDMA_REQUEST_MODE_HW 1334 * @arg @ref LL_MDMA_REQUEST_MODE_SW 1335 * @retval None 1336 */ 1337 __STATIC_INLINE uint32_t LL_MDMA_GetRequestMode(MDMA_TypeDef *MDMAx, uint32_t Channel) 1338 { 1339 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1340 1341 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SWRM)); 1342 } 1343 1344 /** 1345 * @brief Set Trigger Mode. 1346 * @rmtoll CTCR TRGM LL_MDMA_SetTriggerMode 1347 * @param MDMAx MDMAx Instance 1348 * @param Channel This parameter can be one of the following values: 1349 * @arg @ref LL_MDMA_CHANNEL_0 1350 * @arg @ref LL_MDMA_CHANNEL_1 1351 * @arg @ref LL_MDMA_CHANNEL_2 1352 * @arg @ref LL_MDMA_CHANNEL_3 1353 * @arg @ref LL_MDMA_CHANNEL_4 1354 * @arg @ref LL_MDMA_CHANNEL_5 1355 * @arg @ref LL_MDMA_CHANNEL_6 1356 * @arg @ref LL_MDMA_CHANNEL_7 1357 * @arg @ref LL_MDMA_CHANNEL_8 1358 * @arg @ref LL_MDMA_CHANNEL_9 1359 * @arg @ref LL_MDMA_CHANNEL_10 1360 * @arg @ref LL_MDMA_CHANNEL_11 1361 * @arg @ref LL_MDMA_CHANNEL_12 1362 * @arg @ref LL_MDMA_CHANNEL_13 1363 * @arg @ref LL_MDMA_CHANNEL_14 1364 * @arg @ref LL_MDMA_CHANNEL_15 1365 * @param TriggerMode This parameter can be one of the following values: 1366 * @arg @ref LL_MDMA_BUFFER_TRANSFER 1367 * @arg @ref LL_MDMA_BLOCK_TRANSFER 1368 * @arg @ref LL_MDMA_REPEAT_BLOCK_TRANSFER 1369 * @arg @ref LL_MDMA_FULL_TRANSFER 1370 * @retval None 1371 */ 1372 __STATIC_INLINE void LL_MDMA_SetTriggerMode(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t TriggerMode) 1373 { 1374 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1375 1376 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_TRGM, TriggerMode); 1377 } 1378 1379 /** 1380 * @brief Get Trigger Mode. 1381 * @rmtoll CTCR TRGM LL_MDMA_GetTriggerMode 1382 * @param MDMAx MDMAx Instance 1383 * @param Channel This parameter can be one of the following values: 1384 * @arg @ref LL_MDMA_CHANNEL_0 1385 * @arg @ref LL_MDMA_CHANNEL_1 1386 * @arg @ref LL_MDMA_CHANNEL_2 1387 * @arg @ref LL_MDMA_CHANNEL_3 1388 * @arg @ref LL_MDMA_CHANNEL_4 1389 * @arg @ref LL_MDMA_CHANNEL_5 1390 * @arg @ref LL_MDMA_CHANNEL_6 1391 * @arg @ref LL_MDMA_CHANNEL_7 1392 * @arg @ref LL_MDMA_CHANNEL_8 1393 * @arg @ref LL_MDMA_CHANNEL_9 1394 * @arg @ref LL_MDMA_CHANNEL_10 1395 * @arg @ref LL_MDMA_CHANNEL_11 1396 * @arg @ref LL_MDMA_CHANNEL_12 1397 * @arg @ref LL_MDMA_CHANNEL_13 1398 * @arg @ref LL_MDMA_CHANNEL_14 1399 * @arg @ref LL_MDMA_CHANNEL_15 1400 * @retval Returned value can be one of the following values: 1401 * @arg @ref LL_MDMA_BUFFER_TRANSFER 1402 * @arg @ref LL_MDMA_BLOCK_TRANSFER 1403 * @arg @ref LL_MDMA_REPEAT_BLOCK_TRANSFER 1404 * @arg @ref LL_MDMA_FULL_TRANSFER 1405 * @retval None 1406 */ 1407 __STATIC_INLINE uint32_t LL_MDMA_GetTriggerMode(MDMA_TypeDef *MDMAx, uint32_t Channel) 1408 { 1409 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1410 1411 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_TRGM)); 1412 } 1413 1414 /** 1415 * @brief Set Padding Alignment. 1416 * @rmtoll CTCR PAM LL_MDMA_SetPaddingAlignment 1417 * @param MDMAx MDMAx Instance 1418 * @param Channel This parameter can be one of the following values: 1419 * @arg @ref LL_MDMA_CHANNEL_0 1420 * @arg @ref LL_MDMA_CHANNEL_1 1421 * @arg @ref LL_MDMA_CHANNEL_2 1422 * @arg @ref LL_MDMA_CHANNEL_3 1423 * @arg @ref LL_MDMA_CHANNEL_4 1424 * @arg @ref LL_MDMA_CHANNEL_5 1425 * @arg @ref LL_MDMA_CHANNEL_6 1426 * @arg @ref LL_MDMA_CHANNEL_7 1427 * @arg @ref LL_MDMA_CHANNEL_8 1428 * @arg @ref LL_MDMA_CHANNEL_9 1429 * @arg @ref LL_MDMA_CHANNEL_10 1430 * @arg @ref LL_MDMA_CHANNEL_11 1431 * @arg @ref LL_MDMA_CHANNEL_12 1432 * @arg @ref LL_MDMA_CHANNEL_13 1433 * @arg @ref LL_MDMA_CHANNEL_14 1434 * @arg @ref LL_MDMA_CHANNEL_15 1435 * @param PaddingAlignment This parameter can be one of the following values: 1436 * @arg @ref LL_MDMA_DATAALIGN_RIGHT 1437 * @arg @ref LL_MDMA_DATAALIGN_RIGHT_SIGNED 1438 * @arg @ref LL_MDMA_DATAALIGN_LEFT 1439 * @retval None 1440 */ 1441 __STATIC_INLINE void LL_MDMA_SetPaddingAlignment(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t PaddingAlignment) 1442 { 1443 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1444 1445 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_PAM, PaddingAlignment); 1446 } 1447 1448 /** 1449 * @brief Get Padding Alignment. 1450 * @rmtoll CTCR PAM LL_MDMA_GetPaddingAlignment 1451 * @param MDMAx MDMAx Instance 1452 * @param Channel This parameter can be one of the following values: 1453 * @arg @ref LL_MDMA_CHANNEL_0 1454 * @arg @ref LL_MDMA_CHANNEL_1 1455 * @arg @ref LL_MDMA_CHANNEL_2 1456 * @arg @ref LL_MDMA_CHANNEL_3 1457 * @arg @ref LL_MDMA_CHANNEL_4 1458 * @arg @ref LL_MDMA_CHANNEL_5 1459 * @arg @ref LL_MDMA_CHANNEL_6 1460 * @arg @ref LL_MDMA_CHANNEL_7 1461 * @arg @ref LL_MDMA_CHANNEL_8 1462 * @arg @ref LL_MDMA_CHANNEL_9 1463 * @arg @ref LL_MDMA_CHANNEL_10 1464 * @arg @ref LL_MDMA_CHANNEL_11 1465 * @arg @ref LL_MDMA_CHANNEL_12 1466 * @arg @ref LL_MDMA_CHANNEL_13 1467 * @arg @ref LL_MDMA_CHANNEL_14 1468 * @arg @ref LL_MDMA_CHANNEL_15 1469 * @retval Returned value can be one of the following values: 1470 * @arg @ref LL_MDMA_DATAALIGN_RIGHT 1471 * @arg @ref LL_MDMA_DATAALIGN_RIGHT_SIGNED 1472 * @arg @ref LL_MDMA_DATAALIGN_LEFT 1473 * @retval None 1474 */ 1475 __STATIC_INLINE uint32_t LL_MDMA_GetPaddingAlignment(MDMA_TypeDef *MDMAx, uint32_t Channel) 1476 { 1477 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1478 1479 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_PAM)); 1480 } 1481 1482 1483 /** 1484 * @brief Enable Packing. 1485 * @rmtoll CTCR PKE LL_MDMA_EnablePacking 1486 * @param MDMAx MDMAx Instance 1487 * @param Channel This parameter can be one of the following values: 1488 * @arg @ref LL_MDMA_CHANNEL_0 1489 * @arg @ref LL_MDMA_CHANNEL_1 1490 * @arg @ref LL_MDMA_CHANNEL_2 1491 * @arg @ref LL_MDMA_CHANNEL_3 1492 * @arg @ref LL_MDMA_CHANNEL_4 1493 * @arg @ref LL_MDMA_CHANNEL_5 1494 * @arg @ref LL_MDMA_CHANNEL_6 1495 * @arg @ref LL_MDMA_CHANNEL_7 1496 * @arg @ref LL_MDMA_CHANNEL_8 1497 * @arg @ref LL_MDMA_CHANNEL_9 1498 * @arg @ref LL_MDMA_CHANNEL_10 1499 * @arg @ref LL_MDMA_CHANNEL_11 1500 * @arg @ref LL_MDMA_CHANNEL_12 1501 * @arg @ref LL_MDMA_CHANNEL_13 1502 * @arg @ref LL_MDMA_CHANNEL_14 1503 * @arg @ref LL_MDMA_CHANNEL_15 1504 * @retval None 1505 */ 1506 __STATIC_INLINE void LL_MDMA_EnablePacking(MDMA_TypeDef *MDMAx, uint32_t Channel) 1507 { 1508 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1509 1510 SET_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_PKE); 1511 } 1512 1513 /** 1514 * @brief Disable Packing. 1515 * @rmtoll CTCR PKE LL_MDMA_DisablePacking 1516 * @param MDMAx MDMAx Instance 1517 * @param Channel This parameter can be one of the following values: 1518 * @arg @ref LL_MDMA_CHANNEL_0 1519 * @arg @ref LL_MDMA_CHANNEL_1 1520 * @arg @ref LL_MDMA_CHANNEL_2 1521 * @arg @ref LL_MDMA_CHANNEL_3 1522 * @arg @ref LL_MDMA_CHANNEL_4 1523 * @arg @ref LL_MDMA_CHANNEL_5 1524 * @arg @ref LL_MDMA_CHANNEL_6 1525 * @arg @ref LL_MDMA_CHANNEL_7 1526 * @arg @ref LL_MDMA_CHANNEL_8 1527 * @arg @ref LL_MDMA_CHANNEL_9 1528 * @arg @ref LL_MDMA_CHANNEL_10 1529 * @arg @ref LL_MDMA_CHANNEL_11 1530 * @arg @ref LL_MDMA_CHANNEL_12 1531 * @arg @ref LL_MDMA_CHANNEL_13 1532 * @arg @ref LL_MDMA_CHANNEL_14 1533 * @arg @ref LL_MDMA_CHANNEL_15 1534 * @retval None 1535 */ 1536 __STATIC_INLINE void LL_MDMA_DisablePacking(MDMA_TypeDef *MDMAx, uint32_t Channel) 1537 { 1538 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1539 1540 CLEAR_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_PKE); 1541 } 1542 1543 /** 1544 * @brief Check if packing is enabled or disabled. 1545 * @rmtoll CTCR PKE LL_MDMA_IsEnabledPacking 1546 * @param MDMAx MDMAx Instance 1547 * @param Channel This parameter can be one of the following values: 1548 * @arg @ref LL_MDMA_CHANNEL_0 1549 * @arg @ref LL_MDMA_CHANNEL_1 1550 * @arg @ref LL_MDMA_CHANNEL_2 1551 * @arg @ref LL_MDMA_CHANNEL_3 1552 * @arg @ref LL_MDMA_CHANNEL_4 1553 * @arg @ref LL_MDMA_CHANNEL_5 1554 * @arg @ref LL_MDMA_CHANNEL_6 1555 * @arg @ref LL_MDMA_CHANNEL_7 1556 * @arg @ref LL_MDMA_CHANNEL_8 1557 * @arg @ref LL_MDMA_CHANNEL_9 1558 * @arg @ref LL_MDMA_CHANNEL_10 1559 * @arg @ref LL_MDMA_CHANNEL_11 1560 * @arg @ref LL_MDMA_CHANNEL_12 1561 * @arg @ref LL_MDMA_CHANNEL_13 1562 * @arg @ref LL_MDMA_CHANNEL_14 1563 * @arg @ref LL_MDMA_CHANNEL_15 1564 * @retval State of bit (1 or 0). 1565 */ 1566 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledPacking(MDMA_TypeDef *MDMAx, uint32_t Channel) 1567 { 1568 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1569 1570 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_PKE) == (MDMA_CTCR_PKE)) ? 1UL : 0UL); 1571 } 1572 1573 /** 1574 * @brief Set Buffer Transfer Length. 1575 * @rmtoll CTCR TLEN LL_MDMA_SetBufferTransferLength 1576 * @param MDMAx MDMAx Instance 1577 * @param Channel This parameter can be one of the following values: 1578 * @arg @ref LL_MDMA_CHANNEL_0 1579 * @arg @ref LL_MDMA_CHANNEL_1 1580 * @arg @ref LL_MDMA_CHANNEL_2 1581 * @arg @ref LL_MDMA_CHANNEL_3 1582 * @arg @ref LL_MDMA_CHANNEL_4 1583 * @arg @ref LL_MDMA_CHANNEL_5 1584 * @arg @ref LL_MDMA_CHANNEL_6 1585 * @arg @ref LL_MDMA_CHANNEL_7 1586 * @arg @ref LL_MDMA_CHANNEL_8 1587 * @arg @ref LL_MDMA_CHANNEL_9 1588 * @arg @ref LL_MDMA_CHANNEL_10 1589 * @arg @ref LL_MDMA_CHANNEL_11 1590 * @arg @ref LL_MDMA_CHANNEL_12 1591 * @arg @ref LL_MDMA_CHANNEL_13 1592 * @arg @ref LL_MDMA_CHANNEL_14 1593 * @arg @ref LL_MDMA_CHANNEL_15 1594 * @param Length Between 0 to 0x0000007F 1595 * @retval None 1596 */ 1597 __STATIC_INLINE void LL_MDMA_SetBufferTransferLength(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Length) 1598 { 1599 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1600 1601 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_TLEN, 1602 (Length << MDMA_CTCR_TLEN_Pos) & MDMA_CTCR_TLEN_Msk); 1603 } 1604 1605 /** 1606 * @brief Get Buffer Transfer Length. 1607 * @rmtoll CTCR TLEN LL_MDMA_GetBufferTransferLength 1608 * @param MDMAx MDMAx Instance 1609 * @param Channel This parameter can be one of the following values: 1610 * @arg @ref LL_MDMA_CHANNEL_0 1611 * @arg @ref LL_MDMA_CHANNEL_1 1612 * @arg @ref LL_MDMA_CHANNEL_2 1613 * @arg @ref LL_MDMA_CHANNEL_3 1614 * @arg @ref LL_MDMA_CHANNEL_4 1615 * @arg @ref LL_MDMA_CHANNEL_5 1616 * @arg @ref LL_MDMA_CHANNEL_6 1617 * @arg @ref LL_MDMA_CHANNEL_7 1618 * @arg @ref LL_MDMA_CHANNEL_8 1619 * @arg @ref LL_MDMA_CHANNEL_9 1620 * @arg @ref LL_MDMA_CHANNEL_10 1621 * @arg @ref LL_MDMA_CHANNEL_11 1622 * @arg @ref LL_MDMA_CHANNEL_12 1623 * @arg @ref LL_MDMA_CHANNEL_13 1624 * @arg @ref LL_MDMA_CHANNEL_14 1625 * @arg @ref LL_MDMA_CHANNEL_15 1626 * @retval Between 0 to 0x0000007F 1627 * @retval None 1628 */ 1629 __STATIC_INLINE uint32_t LL_MDMA_GetBufferTransferLength(MDMA_TypeDef *MDMAx, uint32_t Channel) 1630 { 1631 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1632 1633 return(READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_TLEN) >> MDMA_CTCR_TLEN_Pos); 1634 } 1635 1636 /** 1637 * @brief Set Destination burst transfer. 1638 * @rmtoll CTCR DBURST LL_MDMA_SetDestinationBurstSize 1639 * @param MDMAx MDMAx Instance 1640 * @param Channel This parameter can be one of the following values: 1641 * @arg @ref LL_MDMA_CHANNEL_0 1642 * @arg @ref LL_MDMA_CHANNEL_1 1643 * @arg @ref LL_MDMA_CHANNEL_2 1644 * @arg @ref LL_MDMA_CHANNEL_3 1645 * @arg @ref LL_MDMA_CHANNEL_4 1646 * @arg @ref LL_MDMA_CHANNEL_5 1647 * @arg @ref LL_MDMA_CHANNEL_6 1648 * @arg @ref LL_MDMA_CHANNEL_7 1649 * @arg @ref LL_MDMA_CHANNEL_8 1650 * @arg @ref LL_MDMA_CHANNEL_9 1651 * @arg @ref LL_MDMA_CHANNEL_10 1652 * @arg @ref LL_MDMA_CHANNEL_11 1653 * @arg @ref LL_MDMA_CHANNEL_12 1654 * @arg @ref LL_MDMA_CHANNEL_13 1655 * @arg @ref LL_MDMA_CHANNEL_14 1656 * @arg @ref LL_MDMA_CHANNEL_15 1657 * @param Dburst This parameter can be one of the following values: 1658 * @arg @ref LL_MDMA_DEST_BURST_SINGLE 1659 * @arg @ref LL_MDMA_DEST_BURST_2BEATS 1660 * @arg @ref LL_MDMA_DEST_BURST_4BEATS 1661 * @arg @ref LL_MDMA_DEST_BURST_8BEATS 1662 * @arg @ref LL_MDMA_DEST_BURST_16BEATS 1663 * @arg @ref LL_MDMA_DEST_BURST_32BEATS 1664 * @arg @ref LL_MDMA_DEST_BURST_64BEATS 1665 * @arg @ref LL_MDMA_DEST_BURST_128BEATS 1666 * @retval None 1667 */ 1668 __STATIC_INLINE void LL_MDMA_SetDestinationBurstSize(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Dburst) 1669 { 1670 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1671 1672 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_DBURST, Dburst); 1673 } 1674 1675 /** 1676 * @brief Get Destination burst transfer. 1677 * @rmtoll CTCR DBURST LL_MDMA_GetDestinationBurstSize 1678 * @param MDMAx MDMAx Instance 1679 * @param Channel This parameter can be one of the following values: 1680 * @arg @ref LL_MDMA_CHANNEL_0 1681 * @arg @ref LL_MDMA_CHANNEL_1 1682 * @arg @ref LL_MDMA_CHANNEL_2 1683 * @arg @ref LL_MDMA_CHANNEL_3 1684 * @arg @ref LL_MDMA_CHANNEL_4 1685 * @arg @ref LL_MDMA_CHANNEL_5 1686 * @arg @ref LL_MDMA_CHANNEL_6 1687 * @arg @ref LL_MDMA_CHANNEL_7 1688 * @arg @ref LL_MDMA_CHANNEL_8 1689 * @arg @ref LL_MDMA_CHANNEL_9 1690 * @arg @ref LL_MDMA_CHANNEL_10 1691 * @arg @ref LL_MDMA_CHANNEL_11 1692 * @arg @ref LL_MDMA_CHANNEL_12 1693 * @arg @ref LL_MDMA_CHANNEL_13 1694 * @arg @ref LL_MDMA_CHANNEL_14 1695 * @arg @ref LL_MDMA_CHANNEL_15 1696 * @retval Returned value can be one of the following values: 1697 * @arg @ref LL_MDMA_DEST_BURST_SINGLE 1698 * @arg @ref LL_MDMA_DEST_BURST_2BEATS 1699 * @arg @ref LL_MDMA_DEST_BURST_4BEATS 1700 * @arg @ref LL_MDMA_DEST_BURST_8BEATS 1701 * @arg @ref LL_MDMA_DEST_BURST_16BEATS 1702 * @arg @ref LL_MDMA_DEST_BURST_32BEATS 1703 * @arg @ref LL_MDMA_DEST_BURST_64BEATS 1704 * @arg @ref LL_MDMA_DEST_BURST_128BEATS 1705 * @retval None 1706 */ 1707 __STATIC_INLINE uint32_t LL_MDMA_GetDestinationBurstSize(MDMA_TypeDef *MDMAx, uint32_t Channel) 1708 { 1709 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1710 1711 return(READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_DBURST)); 1712 } 1713 1714 /** 1715 * @brief Set Source burst transfer. 1716 * @rmtoll CTCR SBURST LL_MDMA_SetSourceBurstSize 1717 * @param MDMAx MDMAx Instance 1718 * @param Channel This parameter can be one of the following values: 1719 * @arg @ref LL_MDMA_CHANNEL_0 1720 * @arg @ref LL_MDMA_CHANNEL_1 1721 * @arg @ref LL_MDMA_CHANNEL_2 1722 * @arg @ref LL_MDMA_CHANNEL_3 1723 * @arg @ref LL_MDMA_CHANNEL_4 1724 * @arg @ref LL_MDMA_CHANNEL_5 1725 * @arg @ref LL_MDMA_CHANNEL_6 1726 * @arg @ref LL_MDMA_CHANNEL_7 1727 * @arg @ref LL_MDMA_CHANNEL_8 1728 * @arg @ref LL_MDMA_CHANNEL_9 1729 * @arg @ref LL_MDMA_CHANNEL_10 1730 * @arg @ref LL_MDMA_CHANNEL_11 1731 * @arg @ref LL_MDMA_CHANNEL_12 1732 * @arg @ref LL_MDMA_CHANNEL_13 1733 * @arg @ref LL_MDMA_CHANNEL_14 1734 * @arg @ref LL_MDMA_CHANNEL_15 1735 * @param Sburst This parameter can be one of the following values: 1736 * @arg @ref LL_MDMA_SRC_BURST_SINGLE 1737 * @arg @ref LL_MDMA_SRC_BURST_2BEATS 1738 * @arg @ref LL_MDMA_SRC_BURST_4BEATS 1739 * @arg @ref LL_MDMA_SRC_BURST_8BEATS 1740 * @arg @ref LL_MDMA_SRC_BURST_16BEATS 1741 * @arg @ref LL_MDMA_SRC_BURST_32BEATS 1742 * @arg @ref LL_MDMA_SRC_BURST_64BEATS 1743 * @arg @ref LL_MDMA_SRC_BURST_128BEATS 1744 * @retval None 1745 */ 1746 __STATIC_INLINE void LL_MDMA_SetSourceBurstSize(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Sburst) 1747 { 1748 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1749 1750 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SBURST, Sburst); 1751 } 1752 1753 /** 1754 * @brief Get Source burst transfer. 1755 * @rmtoll CTCR SBURST LL_MDMA_GetSourceBurstSize 1756 * @param MDMAx MDMAx Instance 1757 * @param Channel This parameter can be one of the following values: 1758 * @arg @ref LL_MDMA_CHANNEL_0 1759 * @arg @ref LL_MDMA_CHANNEL_1 1760 * @arg @ref LL_MDMA_CHANNEL_2 1761 * @arg @ref LL_MDMA_CHANNEL_3 1762 * @arg @ref LL_MDMA_CHANNEL_4 1763 * @arg @ref LL_MDMA_CHANNEL_5 1764 * @arg @ref LL_MDMA_CHANNEL_6 1765 * @arg @ref LL_MDMA_CHANNEL_7 1766 * @arg @ref LL_MDMA_CHANNEL_8 1767 * @arg @ref LL_MDMA_CHANNEL_9 1768 * @arg @ref LL_MDMA_CHANNEL_10 1769 * @arg @ref LL_MDMA_CHANNEL_11 1770 * @arg @ref LL_MDMA_CHANNEL_12 1771 * @arg @ref LL_MDMA_CHANNEL_13 1772 * @arg @ref LL_MDMA_CHANNEL_14 1773 * @arg @ref LL_MDMA_CHANNEL_15 1774 * @retval Returned value can be one of the following values: 1775 * @arg @ref LL_MDMA_SRC_BURST_SINGLE 1776 * @arg @ref LL_MDMA_SRC_BURST_2BEATS 1777 * @arg @ref LL_MDMA_SRC_BURST_4BEATS 1778 * @arg @ref LL_MDMA_SRC_BURST_8BEATS 1779 * @arg @ref LL_MDMA_SRC_BURST_16BEATS 1780 * @arg @ref LL_MDMA_SRC_BURST_32BEATS 1781 * @arg @ref LL_MDMA_SRC_BURST_64BEATS 1782 * @arg @ref LL_MDMA_SRC_BURST_128BEATS 1783 * @retval None 1784 */ 1785 __STATIC_INLINE uint32_t LL_MDMA_GetSourceBurstSize(MDMA_TypeDef *MDMAx, uint32_t Channel) 1786 { 1787 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1788 1789 return(READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SBURST)); 1790 } 1791 1792 /** 1793 * @brief Set Destination Increment Offset Size. 1794 * @rmtoll CTCR DINCOS LL_MDMA_SetDestinationIncSize 1795 * @param MDMAx MDMAx Instance 1796 * @param Channel This parameter can be one of the following values: 1797 * @arg @ref LL_MDMA_CHANNEL_0 1798 * @arg @ref LL_MDMA_CHANNEL_1 1799 * @arg @ref LL_MDMA_CHANNEL_2 1800 * @arg @ref LL_MDMA_CHANNEL_3 1801 * @arg @ref LL_MDMA_CHANNEL_4 1802 * @arg @ref LL_MDMA_CHANNEL_5 1803 * @arg @ref LL_MDMA_CHANNEL_6 1804 * @arg @ref LL_MDMA_CHANNEL_7 1805 * @arg @ref LL_MDMA_CHANNEL_8 1806 * @arg @ref LL_MDMA_CHANNEL_9 1807 * @arg @ref LL_MDMA_CHANNEL_10 1808 * @arg @ref LL_MDMA_CHANNEL_11 1809 * @arg @ref LL_MDMA_CHANNEL_12 1810 * @arg @ref LL_MDMA_CHANNEL_13 1811 * @arg @ref LL_MDMA_CHANNEL_14 1812 * @arg @ref LL_MDMA_CHANNEL_15 1813 * @param IncSize This parameter can be one of the following values: 1814 * @arg @ref LL_MDMA_DEST_INC_OFFSET_BYTE 1815 * @arg @ref LL_MDMA_DEST_INC_OFFSET_HALFWORD 1816 * @arg @ref LL_MDMA_DEST_INC_OFFSET_WORD 1817 * @arg @ref LL_MDMA_DEST_INC_OFFSET_DOUBLEWORD 1818 * @retval None 1819 */ 1820 __STATIC_INLINE void LL_MDMA_SetDestinationIncSize(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t IncSize) 1821 { 1822 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1823 1824 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_DINCOS, IncSize); 1825 } 1826 1827 /** 1828 * @brief Get Destination Increment Offset Size. 1829 * @rmtoll CTCR DINCOS LL_MDMA_GetDestinationIncSize 1830 * @param MDMAx MDMAx Instance 1831 * @param Channel This parameter can be one of the following values: 1832 * @arg @ref LL_MDMA_CHANNEL_0 1833 * @arg @ref LL_MDMA_CHANNEL_1 1834 * @arg @ref LL_MDMA_CHANNEL_2 1835 * @arg @ref LL_MDMA_CHANNEL_3 1836 * @arg @ref LL_MDMA_CHANNEL_4 1837 * @arg @ref LL_MDMA_CHANNEL_5 1838 * @arg @ref LL_MDMA_CHANNEL_6 1839 * @arg @ref LL_MDMA_CHANNEL_7 1840 * @arg @ref LL_MDMA_CHANNEL_8 1841 * @arg @ref LL_MDMA_CHANNEL_9 1842 * @arg @ref LL_MDMA_CHANNEL_10 1843 * @arg @ref LL_MDMA_CHANNEL_11 1844 * @arg @ref LL_MDMA_CHANNEL_12 1845 * @arg @ref LL_MDMA_CHANNEL_13 1846 * @arg @ref LL_MDMA_CHANNEL_14 1847 * @arg @ref LL_MDMA_CHANNEL_15 1848 * @retval Returned value can be one of the following values: 1849 * @arg @ref LL_MDMA_DEST_INC_OFFSET_BYTE 1850 * @arg @ref LL_MDMA_DEST_INC_OFFSET_HALFWORD 1851 * @arg @ref LL_MDMA_DEST_INC_OFFSET_WORD 1852 * @arg @ref LL_MDMA_DEST_INC_OFFSET_DOUBLEWORD 1853 * @retval None 1854 */ 1855 __STATIC_INLINE uint32_t LL_MDMA_GetDestinationIncSize(MDMA_TypeDef *MDMAx, uint32_t Channel) 1856 { 1857 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1858 1859 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_DINCOS)); 1860 } 1861 1862 /** 1863 * @brief Set Source Increment Offset Size. 1864 * @rmtoll CTCR SINCOS LL_MDMA_SetSourceIncSize 1865 * @param MDMAx MDMAx Instance 1866 * @param Channel This parameter can be one of the following values: 1867 * @arg @ref LL_MDMA_CHANNEL_0 1868 * @arg @ref LL_MDMA_CHANNEL_1 1869 * @arg @ref LL_MDMA_CHANNEL_2 1870 * @arg @ref LL_MDMA_CHANNEL_3 1871 * @arg @ref LL_MDMA_CHANNEL_4 1872 * @arg @ref LL_MDMA_CHANNEL_5 1873 * @arg @ref LL_MDMA_CHANNEL_6 1874 * @arg @ref LL_MDMA_CHANNEL_7 1875 * @arg @ref LL_MDMA_CHANNEL_8 1876 * @arg @ref LL_MDMA_CHANNEL_9 1877 * @arg @ref LL_MDMA_CHANNEL_10 1878 * @arg @ref LL_MDMA_CHANNEL_11 1879 * @arg @ref LL_MDMA_CHANNEL_12 1880 * @arg @ref LL_MDMA_CHANNEL_13 1881 * @arg @ref LL_MDMA_CHANNEL_14 1882 * @arg @ref LL_MDMA_CHANNEL_15 1883 * @param IncSize This parameter can be one of the following values: 1884 * @arg @ref LL_MDMA_SRC_INC_OFFSET_BYTE 1885 * @arg @ref LL_MDMA_SRC_INC_OFFSET_HALFWORD 1886 * @arg @ref LL_MDMA_SRC_INC_OFFSET_WORD 1887 * @arg @ref LL_MDMA_SRC_INC_OFFSET_DOUBLEWORD 1888 * @retval None 1889 */ 1890 __STATIC_INLINE void LL_MDMA_SetSourceIncSize(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t IncSize) 1891 { 1892 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1893 1894 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SINCOS, IncSize); 1895 } 1896 1897 /** 1898 * @brief Get Source Increment Offset Size. 1899 * @rmtoll CTCR SINCOS LL_MDMA_GetSourceIncSize 1900 * @param MDMAx MDMAx Instance 1901 * @param Channel This parameter can be one of the following values: 1902 * @arg @ref LL_MDMA_CHANNEL_0 1903 * @arg @ref LL_MDMA_CHANNEL_1 1904 * @arg @ref LL_MDMA_CHANNEL_2 1905 * @arg @ref LL_MDMA_CHANNEL_3 1906 * @arg @ref LL_MDMA_CHANNEL_4 1907 * @arg @ref LL_MDMA_CHANNEL_5 1908 * @arg @ref LL_MDMA_CHANNEL_6 1909 * @arg @ref LL_MDMA_CHANNEL_7 1910 * @arg @ref LL_MDMA_CHANNEL_8 1911 * @arg @ref LL_MDMA_CHANNEL_9 1912 * @arg @ref LL_MDMA_CHANNEL_10 1913 * @arg @ref LL_MDMA_CHANNEL_11 1914 * @arg @ref LL_MDMA_CHANNEL_12 1915 * @arg @ref LL_MDMA_CHANNEL_13 1916 * @arg @ref LL_MDMA_CHANNEL_14 1917 * @arg @ref LL_MDMA_CHANNEL_15 1918 * @retval Returned value can be one of the following values: 1919 * @arg @ref LL_MDMA_SRC_INC_OFFSET_BYTE 1920 * @arg @ref LL_MDMA_SRC_INC_OFFSET_HALFWORD 1921 * @arg @ref LL_MDMA_SRC_INC_OFFSET_WORD 1922 * @arg @ref LL_MDMA_SRC_INC_OFFSET_DOUBLEWORD 1923 * @retval None 1924 */ 1925 __STATIC_INLINE uint32_t LL_MDMA_GetSourceIncSize(MDMA_TypeDef *MDMAx, uint32_t Channel) 1926 { 1927 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1928 1929 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SINCOS)); 1930 } 1931 1932 /** 1933 * @brief Set Destination Data Size. 1934 * @rmtoll CTCR DSIZE LL_MDMA_SetDestinationDataSize 1935 * @param MDMAx MDMAx Instance 1936 * @param Channel This parameter can be one of the following values: 1937 * @arg @ref LL_MDMA_CHANNEL_0 1938 * @arg @ref LL_MDMA_CHANNEL_1 1939 * @arg @ref LL_MDMA_CHANNEL_2 1940 * @arg @ref LL_MDMA_CHANNEL_3 1941 * @arg @ref LL_MDMA_CHANNEL_4 1942 * @arg @ref LL_MDMA_CHANNEL_5 1943 * @arg @ref LL_MDMA_CHANNEL_6 1944 * @arg @ref LL_MDMA_CHANNEL_7 1945 * @arg @ref LL_MDMA_CHANNEL_8 1946 * @arg @ref LL_MDMA_CHANNEL_9 1947 * @arg @ref LL_MDMA_CHANNEL_10 1948 * @arg @ref LL_MDMA_CHANNEL_11 1949 * @arg @ref LL_MDMA_CHANNEL_12 1950 * @arg @ref LL_MDMA_CHANNEL_13 1951 * @arg @ref LL_MDMA_CHANNEL_14 1952 * @arg @ref LL_MDMA_CHANNEL_15 1953 * @param DestDataSize This parameter can be one of the following values: 1954 * @arg @ref LL_MDMA_DEST_DATA_SIZE_BYTE 1955 * @arg @ref LL_MDMA_DEST_DATA_SIZE_HALFWORD 1956 * @arg @ref LL_MDMA_DEST_DATA_SIZE_WORD 1957 * @arg @ref LL_MDMA_DEST_DATA_SIZE_DOUBLEWORD 1958 * @retval None 1959 */ 1960 __STATIC_INLINE void LL_MDMA_SetDestinationDataSize(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t DestDataSize) 1961 { 1962 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1963 1964 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_DSIZE, DestDataSize); 1965 } 1966 1967 /** 1968 * @brief Get Destination Data Size. 1969 * @rmtoll CTCR DSIZE LL_MDMA_GetDestinationDataSize 1970 * @param MDMAx MDMAx Instance 1971 * @param Channel This parameter can be one of the following values: 1972 * @arg @ref LL_MDMA_CHANNEL_0 1973 * @arg @ref LL_MDMA_CHANNEL_1 1974 * @arg @ref LL_MDMA_CHANNEL_2 1975 * @arg @ref LL_MDMA_CHANNEL_3 1976 * @arg @ref LL_MDMA_CHANNEL_4 1977 * @arg @ref LL_MDMA_CHANNEL_5 1978 * @arg @ref LL_MDMA_CHANNEL_6 1979 * @arg @ref LL_MDMA_CHANNEL_7 1980 * @arg @ref LL_MDMA_CHANNEL_8 1981 * @arg @ref LL_MDMA_CHANNEL_9 1982 * @arg @ref LL_MDMA_CHANNEL_10 1983 * @arg @ref LL_MDMA_CHANNEL_11 1984 * @arg @ref LL_MDMA_CHANNEL_12 1985 * @arg @ref LL_MDMA_CHANNEL_13 1986 * @arg @ref LL_MDMA_CHANNEL_14 1987 * @arg @ref LL_MDMA_CHANNEL_15 1988 * @retval Returned value can be one of the following values: 1989 * @arg @ref LL_MDMA_DEST_DATA_SIZE_BYTE 1990 * @arg @ref LL_MDMA_DEST_DATA_SIZE_HALFWORD 1991 * @arg @ref LL_MDMA_DEST_DATA_SIZE_WORD 1992 * @arg @ref LL_MDMA_DEST_DATA_SIZE_DOUBLEWORD 1993 * @retval None 1994 */ 1995 __STATIC_INLINE uint32_t LL_MDMA_GetDestinationDataSize(MDMA_TypeDef *MDMAx, uint32_t Channel) 1996 { 1997 uint32_t mdma_base_addr = (uint32_t)MDMAx; 1998 1999 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_DSIZE)); 2000 } 2001 2002 /** 2003 * @brief Set Source Data Size. 2004 * @rmtoll CTCR SSIZE LL_MDMA_SetSourceDataSize 2005 * @param MDMAx MDMAx Instance 2006 * @param Channel This parameter can be one of the following values: 2007 * @arg @ref LL_MDMA_CHANNEL_0 2008 * @arg @ref LL_MDMA_CHANNEL_1 2009 * @arg @ref LL_MDMA_CHANNEL_2 2010 * @arg @ref LL_MDMA_CHANNEL_3 2011 * @arg @ref LL_MDMA_CHANNEL_4 2012 * @arg @ref LL_MDMA_CHANNEL_5 2013 * @arg @ref LL_MDMA_CHANNEL_6 2014 * @arg @ref LL_MDMA_CHANNEL_7 2015 * @arg @ref LL_MDMA_CHANNEL_8 2016 * @arg @ref LL_MDMA_CHANNEL_9 2017 * @arg @ref LL_MDMA_CHANNEL_10 2018 * @arg @ref LL_MDMA_CHANNEL_11 2019 * @arg @ref LL_MDMA_CHANNEL_12 2020 * @arg @ref LL_MDMA_CHANNEL_13 2021 * @arg @ref LL_MDMA_CHANNEL_14 2022 * @arg @ref LL_MDMA_CHANNEL_15 2023 * @param SrcDataSize This parameter can be one of the following values: 2024 * @arg @ref LL_MDMA_SRC_DATA_SIZE_BYTE 2025 * @arg @ref LL_MDMA_SRC_DATA_SIZE_HALFWORD 2026 * @arg @ref LL_MDMA_SRC_DATA_SIZE_WORD 2027 * @arg @ref LL_MDMA_SRC_DATA_SIZE_DOUBLEWORD 2028 * @retval None 2029 */ 2030 __STATIC_INLINE void LL_MDMA_SetSourceDataSize(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t SrcDataSize) 2031 { 2032 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2033 2034 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SSIZE, SrcDataSize); 2035 } 2036 2037 /** 2038 * @brief Get Source Data Size. 2039 * @rmtoll CTCR SSIZE LL_MDMA_GetSourceDataSize 2040 * @param MDMAx MDMAx Instance 2041 * @param Channel This parameter can be one of the following values: 2042 * @arg @ref LL_MDMA_CHANNEL_0 2043 * @arg @ref LL_MDMA_CHANNEL_1 2044 * @arg @ref LL_MDMA_CHANNEL_2 2045 * @arg @ref LL_MDMA_CHANNEL_3 2046 * @arg @ref LL_MDMA_CHANNEL_4 2047 * @arg @ref LL_MDMA_CHANNEL_5 2048 * @arg @ref LL_MDMA_CHANNEL_6 2049 * @arg @ref LL_MDMA_CHANNEL_7 2050 * @arg @ref LL_MDMA_CHANNEL_8 2051 * @arg @ref LL_MDMA_CHANNEL_9 2052 * @arg @ref LL_MDMA_CHANNEL_10 2053 * @arg @ref LL_MDMA_CHANNEL_11 2054 * @arg @ref LL_MDMA_CHANNEL_12 2055 * @arg @ref LL_MDMA_CHANNEL_13 2056 * @arg @ref LL_MDMA_CHANNEL_14 2057 * @arg @ref LL_MDMA_CHANNEL_15 2058 * @retval Returned value can be one of the following values: 2059 * @arg @ref LL_MDMA_SRC_DATA_SIZE_BYTE 2060 * @arg @ref LL_MDMA_SRC_DATA_SIZE_HALFWORD 2061 * @arg @ref LL_MDMA_SRC_DATA_SIZE_WORD 2062 * @arg @ref LL_MDMA_SRC_DATA_SIZE_DOUBLEWORD 2063 * @retval None 2064 */ 2065 __STATIC_INLINE uint32_t LL_MDMA_GetSourceDataSize(MDMA_TypeDef *MDMAx, uint32_t Channel) 2066 { 2067 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2068 2069 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SSIZE)); 2070 } 2071 2072 /** 2073 * @brief Set Destination Increment Mode. 2074 * @rmtoll CTCR DINC LL_MDMA_SetDestinationIncMode 2075 * @param MDMAx MDMAx Instance 2076 * @param Channel This parameter can be one of the following values: 2077 * @arg @ref LL_MDMA_CHANNEL_0 2078 * @arg @ref LL_MDMA_CHANNEL_1 2079 * @arg @ref LL_MDMA_CHANNEL_2 2080 * @arg @ref LL_MDMA_CHANNEL_3 2081 * @arg @ref LL_MDMA_CHANNEL_4 2082 * @arg @ref LL_MDMA_CHANNEL_5 2083 * @arg @ref LL_MDMA_CHANNEL_6 2084 * @arg @ref LL_MDMA_CHANNEL_7 2085 * @arg @ref LL_MDMA_CHANNEL_8 2086 * @arg @ref LL_MDMA_CHANNEL_9 2087 * @arg @ref LL_MDMA_CHANNEL_10 2088 * @arg @ref LL_MDMA_CHANNEL_11 2089 * @arg @ref LL_MDMA_CHANNEL_12 2090 * @arg @ref LL_MDMA_CHANNEL_13 2091 * @arg @ref LL_MDMA_CHANNEL_14 2092 * @arg @ref LL_MDMA_CHANNEL_15 2093 * @param DestIncMode This parameter can be one of the following values: 2094 * @arg @ref LL_MDMA_DEST_FIXED 2095 * @arg @ref LL_MDMA_DEST_INCREMENT 2096 * @arg @ref LL_MDMA_DEST_DECREMENT 2097 * @retval None 2098 */ 2099 __STATIC_INLINE void LL_MDMA_SetDestinationIncMode(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t DestIncMode) 2100 { 2101 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2102 2103 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_DINC, DestIncMode); 2104 } 2105 2106 /** 2107 * @brief Get Destination Increment Mode. 2108 * @rmtoll CTCR DINC LL_MDMA_GetDestinationIncMode 2109 * @param MDMAx MDMAx Instance 2110 * @param Channel This parameter can be one of the following values: 2111 * @arg @ref LL_MDMA_CHANNEL_0 2112 * @arg @ref LL_MDMA_CHANNEL_1 2113 * @arg @ref LL_MDMA_CHANNEL_2 2114 * @arg @ref LL_MDMA_CHANNEL_3 2115 * @arg @ref LL_MDMA_CHANNEL_4 2116 * @arg @ref LL_MDMA_CHANNEL_5 2117 * @arg @ref LL_MDMA_CHANNEL_6 2118 * @arg @ref LL_MDMA_CHANNEL_7 2119 * @arg @ref LL_MDMA_CHANNEL_8 2120 * @arg @ref LL_MDMA_CHANNEL_9 2121 * @arg @ref LL_MDMA_CHANNEL_10 2122 * @arg @ref LL_MDMA_CHANNEL_11 2123 * @arg @ref LL_MDMA_CHANNEL_12 2124 * @arg @ref LL_MDMA_CHANNEL_13 2125 * @arg @ref LL_MDMA_CHANNEL_14 2126 * @arg @ref LL_MDMA_CHANNEL_15 2127 * @retval Returned value can be one of the following values: 2128 * @arg @ref LL_MDMA_DEST_FIXED 2129 * @arg @ref LL_MDMA_DEST_INCREMENT 2130 * @arg @ref LL_MDMA_DEST_DECREMENT 2131 * @retval None 2132 */ 2133 __STATIC_INLINE uint32_t LL_MDMA_GetDestinationIncMode(MDMA_TypeDef *MDMAx, uint32_t Channel) 2134 { 2135 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2136 2137 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_DINC)); 2138 } 2139 2140 /** 2141 * @brief Set Source Increment Mode. 2142 * @rmtoll CTCR SINC LL_MDMA_SetSourceIncMode 2143 * @param MDMAx MDMAx Instance 2144 * @param Channel This parameter can be one of the following values: 2145 * @arg @ref LL_MDMA_CHANNEL_0 2146 * @arg @ref LL_MDMA_CHANNEL_1 2147 * @arg @ref LL_MDMA_CHANNEL_2 2148 * @arg @ref LL_MDMA_CHANNEL_3 2149 * @arg @ref LL_MDMA_CHANNEL_4 2150 * @arg @ref LL_MDMA_CHANNEL_5 2151 * @arg @ref LL_MDMA_CHANNEL_6 2152 * @arg @ref LL_MDMA_CHANNEL_7 2153 * @arg @ref LL_MDMA_CHANNEL_8 2154 * @arg @ref LL_MDMA_CHANNEL_9 2155 * @arg @ref LL_MDMA_CHANNEL_10 2156 * @arg @ref LL_MDMA_CHANNEL_11 2157 * @arg @ref LL_MDMA_CHANNEL_12 2158 * @arg @ref LL_MDMA_CHANNEL_13 2159 * @arg @ref LL_MDMA_CHANNEL_14 2160 * @arg @ref LL_MDMA_CHANNEL_15 2161 * @param SrcIncMode This parameter can be one of the following values: 2162 * @arg @ref LL_MDMA_SRC_FIXED 2163 * @arg @ref LL_MDMA_SRC_INCREMENT 2164 * @arg @ref LL_MDMA_SRC_DECREMENT 2165 * @retval None 2166 */ 2167 __STATIC_INLINE void LL_MDMA_SetSourceIncMode(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t SrcIncMode) 2168 { 2169 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2170 2171 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SINC, SrcIncMode); 2172 } 2173 2174 /** 2175 * @brief Get Source Increment Mode. 2176 * @rmtoll CTCR SINC LL_MDMA_GetSourceIncMode 2177 * @param MDMAx MDMAx Instance 2178 * @param Channel This parameter can be one of the following values: 2179 * @arg @ref LL_MDMA_CHANNEL_0 2180 * @arg @ref LL_MDMA_CHANNEL_1 2181 * @arg @ref LL_MDMA_CHANNEL_2 2182 * @arg @ref LL_MDMA_CHANNEL_3 2183 * @arg @ref LL_MDMA_CHANNEL_4 2184 * @arg @ref LL_MDMA_CHANNEL_5 2185 * @arg @ref LL_MDMA_CHANNEL_6 2186 * @arg @ref LL_MDMA_CHANNEL_7 2187 * @arg @ref LL_MDMA_CHANNEL_8 2188 * @arg @ref LL_MDMA_CHANNEL_9 2189 * @arg @ref LL_MDMA_CHANNEL_10 2190 * @arg @ref LL_MDMA_CHANNEL_11 2191 * @arg @ref LL_MDMA_CHANNEL_12 2192 * @arg @ref LL_MDMA_CHANNEL_13 2193 * @arg @ref LL_MDMA_CHANNEL_14 2194 * @arg @ref LL_MDMA_CHANNEL_15 2195 * @retval Returned value can be one of the following values: 2196 * @arg @ref LL_MDMA_SRC_FIXED 2197 * @arg @ref LL_MDMA_SRC_INCREMENT 2198 * @arg @ref LL_MDMA_SRC_DECREMENT 2199 * @retval None 2200 */ 2201 __STATIC_INLINE uint32_t LL_MDMA_GetSourceIncMode(MDMA_TypeDef *MDMAx, uint32_t Channel) 2202 { 2203 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2204 2205 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SINC)); 2206 } 2207 2208 /** 2209 * @brief Configure MDMA Block number of data and repeat Count. 2210 * @rmtoll CBNDTR BRC LL_MDMA_ConfigBlkCounters\n 2211 * @rmtoll CBNDTR BNDT LL_MDMA_ConfigBlkCounters 2212 * @param MDMAx MDMAx Instance 2213 * @param Channel This parameter can be one of the following values: 2214 * @arg @ref LL_MDMA_CHANNEL_0 2215 * @arg @ref LL_MDMA_CHANNEL_1 2216 * @arg @ref LL_MDMA_CHANNEL_2 2217 * @arg @ref LL_MDMA_CHANNEL_3 2218 * @arg @ref LL_MDMA_CHANNEL_4 2219 * @arg @ref LL_MDMA_CHANNEL_5 2220 * @arg @ref LL_MDMA_CHANNEL_6 2221 * @arg @ref LL_MDMA_CHANNEL_7 2222 * @arg @ref LL_MDMA_CHANNEL_8 2223 * @arg @ref LL_MDMA_CHANNEL_9 2224 * @arg @ref LL_MDMA_CHANNEL_10 2225 * @arg @ref LL_MDMA_CHANNEL_11 2226 * @arg @ref LL_MDMA_CHANNEL_12 2227 * @arg @ref LL_MDMA_CHANNEL_13 2228 * @arg @ref LL_MDMA_CHANNEL_14 2229 * @arg @ref LL_MDMA_CHANNEL_15 2230 * @param BlockRepeatCount Between 0 to 0x00000FFF 2231 * @param BlkDataLength Between 0 to 0x00010000 2232 * @retval None 2233 */ 2234 __STATIC_INLINE void LL_MDMA_ConfigBlkCounters(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t BlockRepeatCount, uint32_t BlkDataLength) 2235 { 2236 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2237 2238 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, 2239 MDMA_CBNDTR_BRC | MDMA_CBNDTR_BNDT, 2240 ((BlockRepeatCount << MDMA_CBNDTR_BRC_Pos) & MDMA_CBNDTR_BRC_Msk) | (BlkDataLength & MDMA_CBNDTR_BNDT_Msk)); 2241 } 2242 2243 /** 2244 * @brief Set Block Number of data bytes to transfer. 2245 * @rmtoll CBNDTR BNDT LL_MDMA_SetBlkDataLength 2246 * @param MDMAx MDMAx Instance 2247 * @param Channel This parameter can be one of the following values: 2248 * @arg @ref LL_MDMA_CHANNEL_0 2249 * @arg @ref LL_MDMA_CHANNEL_1 2250 * @arg @ref LL_MDMA_CHANNEL_2 2251 * @arg @ref LL_MDMA_CHANNEL_3 2252 * @arg @ref LL_MDMA_CHANNEL_4 2253 * @arg @ref LL_MDMA_CHANNEL_5 2254 * @arg @ref LL_MDMA_CHANNEL_6 2255 * @arg @ref LL_MDMA_CHANNEL_7 2256 * @arg @ref LL_MDMA_CHANNEL_8 2257 * @arg @ref LL_MDMA_CHANNEL_9 2258 * @arg @ref LL_MDMA_CHANNEL_10 2259 * @arg @ref LL_MDMA_CHANNEL_11 2260 * @arg @ref LL_MDMA_CHANNEL_12 2261 * @arg @ref LL_MDMA_CHANNEL_13 2262 * @arg @ref LL_MDMA_CHANNEL_14 2263 * @arg @ref LL_MDMA_CHANNEL_15 2264 * @param BlkDataLength Between 0 to 0x00010000 2265 * @retval None 2266 */ 2267 __STATIC_INLINE void LL_MDMA_SetBlkDataLength(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t BlkDataLength) 2268 { 2269 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2270 2271 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, MDMA_CBNDTR_BNDT, (BlkDataLength & MDMA_CBNDTR_BNDT_Msk)); 2272 } 2273 2274 /** 2275 * @brief Get Block Number of data bytes to transfer. 2276 * @rmtoll CBNDTR BNDT LL_MDMA_GetBlkDataLength 2277 * @param MDMAx MDMAx Instance 2278 * @param Channel This parameter can be one of the following values: 2279 * @arg @ref LL_MDMA_CHANNEL_0 2280 * @arg @ref LL_MDMA_CHANNEL_1 2281 * @arg @ref LL_MDMA_CHANNEL_2 2282 * @arg @ref LL_MDMA_CHANNEL_3 2283 * @arg @ref LL_MDMA_CHANNEL_4 2284 * @arg @ref LL_MDMA_CHANNEL_5 2285 * @arg @ref LL_MDMA_CHANNEL_6 2286 * @arg @ref LL_MDMA_CHANNEL_7 2287 * @arg @ref LL_MDMA_CHANNEL_8 2288 * @arg @ref LL_MDMA_CHANNEL_9 2289 * @arg @ref LL_MDMA_CHANNEL_10 2290 * @arg @ref LL_MDMA_CHANNEL_11 2291 * @arg @ref LL_MDMA_CHANNEL_12 2292 * @arg @ref LL_MDMA_CHANNEL_13 2293 * @arg @ref LL_MDMA_CHANNEL_14 2294 * @arg @ref LL_MDMA_CHANNEL_15 2295 * @retval Between 0 to 0x00010000 2296 * @retval None 2297 */ 2298 __STATIC_INLINE uint32_t LL_MDMA_GetBlkDataLength(MDMA_TypeDef *MDMAx, uint32_t Channel) 2299 { 2300 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2301 2302 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, MDMA_CBNDTR_BNDT)); 2303 } 2304 2305 /** 2306 * @brief Set Block Repeat Count. 2307 * @rmtoll CBNDTR BRC LL_MDMA_SetBlkRepeatCount 2308 * @param MDMAx MDMAx Instance 2309 * @param Channel This parameter can be one of the following values: 2310 * @arg @ref LL_MDMA_CHANNEL_0 2311 * @arg @ref LL_MDMA_CHANNEL_1 2312 * @arg @ref LL_MDMA_CHANNEL_2 2313 * @arg @ref LL_MDMA_CHANNEL_3 2314 * @arg @ref LL_MDMA_CHANNEL_4 2315 * @arg @ref LL_MDMA_CHANNEL_5 2316 * @arg @ref LL_MDMA_CHANNEL_6 2317 * @arg @ref LL_MDMA_CHANNEL_7 2318 * @arg @ref LL_MDMA_CHANNEL_8 2319 * @arg @ref LL_MDMA_CHANNEL_9 2320 * @arg @ref LL_MDMA_CHANNEL_10 2321 * @arg @ref LL_MDMA_CHANNEL_11 2322 * @arg @ref LL_MDMA_CHANNEL_12 2323 * @arg @ref LL_MDMA_CHANNEL_13 2324 * @arg @ref LL_MDMA_CHANNEL_14 2325 * @arg @ref LL_MDMA_CHANNEL_15 2326 * @param BlockRepeatCount Between 0 to 0x00000FFF 2327 * @retval None 2328 */ 2329 __STATIC_INLINE void LL_MDMA_SetBlkRepeatCount(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t BlockRepeatCount) 2330 { 2331 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2332 2333 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, MDMA_CBNDTR_BRC, 2334 (BlockRepeatCount << MDMA_CBNDTR_BRC_Pos) & MDMA_CBNDTR_BRC_Msk); 2335 } 2336 2337 /** 2338 * @brief Get Block Repeat Count. 2339 * @rmtoll CBNDTR BRC LL_MDMA_GetBlkRepeatCount 2340 * @param MDMAx MDMAx Instance 2341 * @param Channel This parameter can be one of the following values: 2342 * @arg @ref LL_MDMA_CHANNEL_0 2343 * @arg @ref LL_MDMA_CHANNEL_1 2344 * @arg @ref LL_MDMA_CHANNEL_2 2345 * @arg @ref LL_MDMA_CHANNEL_3 2346 * @arg @ref LL_MDMA_CHANNEL_4 2347 * @arg @ref LL_MDMA_CHANNEL_5 2348 * @arg @ref LL_MDMA_CHANNEL_6 2349 * @arg @ref LL_MDMA_CHANNEL_7 2350 * @arg @ref LL_MDMA_CHANNEL_8 2351 * @arg @ref LL_MDMA_CHANNEL_9 2352 * @arg @ref LL_MDMA_CHANNEL_10 2353 * @arg @ref LL_MDMA_CHANNEL_11 2354 * @arg @ref LL_MDMA_CHANNEL_12 2355 * @arg @ref LL_MDMA_CHANNEL_13 2356 * @arg @ref LL_MDMA_CHANNEL_14 2357 * @arg @ref LL_MDMA_CHANNEL_15 2358 * @retval Between 0 to 0x00000FFF 2359 * @retval None 2360 */ 2361 __STATIC_INLINE uint32_t LL_MDMA_GetBlkRepeatCount(MDMA_TypeDef *MDMAx, uint32_t Channel) 2362 { 2363 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2364 2365 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, MDMA_CBNDTR_BRC) >> MDMA_CBNDTR_BRC_Pos); 2366 } 2367 2368 /** 2369 * @brief Configure MDMA block repeat address update mode. 2370 * @rmtoll CBNDTR BRDUM LL_MDMA_ConfigBlkRepeatAddrUpdate\n 2371 * @rmtoll CBNDTR BRSUM LL_MDMA_ConfigBlkRepeatAddrUpdate 2372 * @param MDMAx MDMAx Instance 2373 * @param Channel This parameter can be one of the following values: 2374 * @arg @ref LL_MDMA_CHANNEL_0 2375 * @arg @ref LL_MDMA_CHANNEL_1 2376 * @arg @ref LL_MDMA_CHANNEL_2 2377 * @arg @ref LL_MDMA_CHANNEL_3 2378 * @arg @ref LL_MDMA_CHANNEL_4 2379 * @arg @ref LL_MDMA_CHANNEL_5 2380 * @arg @ref LL_MDMA_CHANNEL_6 2381 * @arg @ref LL_MDMA_CHANNEL_7 2382 * @arg @ref LL_MDMA_CHANNEL_8 2383 * @arg @ref LL_MDMA_CHANNEL_9 2384 * @arg @ref LL_MDMA_CHANNEL_10 2385 * @arg @ref LL_MDMA_CHANNEL_11 2386 * @arg @ref LL_MDMA_CHANNEL_12 2387 * @arg @ref LL_MDMA_CHANNEL_13 2388 * @arg @ref LL_MDMA_CHANNEL_14 2389 * @arg @ref LL_MDMA_CHANNEL_15 2390 * @param Configuration This parameter must be a combination of all the following values: 2391 * @arg @ref LL_MDMA_BLK_RPT_DEST_ADDR_INCREMENT or @ref LL_MDMA_BLK_RPT_DEST_ADDR_DECREMENT 2392 * @arg @ref LL_MDMA_BLK_RPT_SRC_ADDR_INCREMENT or @ref LL_MDMA_BLK_RPT_SRC_ADDR_DECREMENT 2393 * @retval None 2394 */ 2395 __STATIC_INLINE void LL_MDMA_ConfigBlkRepeatAddrUpdate(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Configuration) 2396 { 2397 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2398 2399 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, 2400 MDMA_CBNDTR_BRDUM | MDMA_CBNDTR_BRSUM, 2401 Configuration); 2402 } 2403 2404 /** 2405 * @brief Set Block Repeat Destination address Update Mode. 2406 * @rmtoll CBNDTR BRDUM LL_MDMA_SetBlkRepeatDestAddrUpdate 2407 * @param MDMAx MDMAx Instance 2408 * @param Channel This parameter can be one of the following values: 2409 * @arg @ref LL_MDMA_CHANNEL_0 2410 * @arg @ref LL_MDMA_CHANNEL_1 2411 * @arg @ref LL_MDMA_CHANNEL_2 2412 * @arg @ref LL_MDMA_CHANNEL_3 2413 * @arg @ref LL_MDMA_CHANNEL_4 2414 * @arg @ref LL_MDMA_CHANNEL_5 2415 * @arg @ref LL_MDMA_CHANNEL_6 2416 * @arg @ref LL_MDMA_CHANNEL_7 2417 * @arg @ref LL_MDMA_CHANNEL_8 2418 * @arg @ref LL_MDMA_CHANNEL_9 2419 * @arg @ref LL_MDMA_CHANNEL_10 2420 * @arg @ref LL_MDMA_CHANNEL_11 2421 * @arg @ref LL_MDMA_CHANNEL_12 2422 * @arg @ref LL_MDMA_CHANNEL_13 2423 * @arg @ref LL_MDMA_CHANNEL_14 2424 * @arg @ref LL_MDMA_CHANNEL_15 2425 * @param DestAdrUpdateMode This parameter can be one of the following values: 2426 * @arg @ref LL_MDMA_BLK_RPT_DEST_ADDR_INCREMENT 2427 * @arg @ref LL_MDMA_BLK_RPT_DEST_ADDR_DECREMENT 2428 * @retval None 2429 */ 2430 __STATIC_INLINE void LL_MDMA_SetBlkRepeatDestAddrUpdate(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t DestAdrUpdateMode) 2431 { 2432 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2433 2434 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, MDMA_CBNDTR_BRDUM, DestAdrUpdateMode); 2435 } 2436 2437 /** 2438 * @brief Get Block Repeat Destination address Update Mode. 2439 * @rmtoll CBNDTR BRDUM LL_MDMA_GetBlkRepeatDestAddrUpdate 2440 * @param MDMAx MDMAx Instance 2441 * @param Channel This parameter can be one of the following values: 2442 * @arg @ref LL_MDMA_CHANNEL_0 2443 * @arg @ref LL_MDMA_CHANNEL_1 2444 * @arg @ref LL_MDMA_CHANNEL_2 2445 * @arg @ref LL_MDMA_CHANNEL_3 2446 * @arg @ref LL_MDMA_CHANNEL_4 2447 * @arg @ref LL_MDMA_CHANNEL_5 2448 * @arg @ref LL_MDMA_CHANNEL_6 2449 * @arg @ref LL_MDMA_CHANNEL_7 2450 * @arg @ref LL_MDMA_CHANNEL_8 2451 * @arg @ref LL_MDMA_CHANNEL_9 2452 * @arg @ref LL_MDMA_CHANNEL_10 2453 * @arg @ref LL_MDMA_CHANNEL_11 2454 * @arg @ref LL_MDMA_CHANNEL_12 2455 * @arg @ref LL_MDMA_CHANNEL_13 2456 * @arg @ref LL_MDMA_CHANNEL_14 2457 * @arg @ref LL_MDMA_CHANNEL_15 2458 * @retval Returned value can be one of the following values: 2459 * @arg @ref LL_MDMA_BLK_RPT_DEST_ADDR_INCREMENT 2460 * @arg @ref LL_MDMA_BLK_RPT_DEST_ADDR_DECREMENT 2461 * @retval None 2462 */ 2463 __STATIC_INLINE uint32_t LL_MDMA_GetBlkRepeatDestAddrUpdate(MDMA_TypeDef *MDMAx, uint32_t Channel) 2464 { 2465 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2466 2467 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, MDMA_CBNDTR_BRDUM)); 2468 } 2469 2470 /** 2471 * @brief Set Block Repeat Source address Update Mode. 2472 * @rmtoll CBNDTR BRSUM LL_MDMA_SetBlkRepeatSrcAddrUpdate 2473 * @param MDMAx MDMAx Instance 2474 * @param Channel This parameter can be one of the following values: 2475 * @arg @ref LL_MDMA_CHANNEL_0 2476 * @arg @ref LL_MDMA_CHANNEL_1 2477 * @arg @ref LL_MDMA_CHANNEL_2 2478 * @arg @ref LL_MDMA_CHANNEL_3 2479 * @arg @ref LL_MDMA_CHANNEL_4 2480 * @arg @ref LL_MDMA_CHANNEL_5 2481 * @arg @ref LL_MDMA_CHANNEL_6 2482 * @arg @ref LL_MDMA_CHANNEL_7 2483 * @arg @ref LL_MDMA_CHANNEL_8 2484 * @arg @ref LL_MDMA_CHANNEL_9 2485 * @arg @ref LL_MDMA_CHANNEL_10 2486 * @arg @ref LL_MDMA_CHANNEL_11 2487 * @arg @ref LL_MDMA_CHANNEL_12 2488 * @arg @ref LL_MDMA_CHANNEL_13 2489 * @arg @ref LL_MDMA_CHANNEL_14 2490 * @arg @ref LL_MDMA_CHANNEL_15 2491 * @param SrcAdrUpdateMode This parameter can be one of the following values: 2492 * @arg @ref LL_MDMA_BLK_RPT_SRC_ADDR_INCREMENT 2493 * @arg @ref LL_MDMA_BLK_RPT_SRC_ADDR_DECREMENT 2494 * @retval None 2495 */ 2496 __STATIC_INLINE void LL_MDMA_SetBlkRepeatSrcAddrUpdate(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t SrcAdrUpdateMode) 2497 { 2498 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2499 2500 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, MDMA_CBNDTR_BRSUM, SrcAdrUpdateMode); 2501 } 2502 2503 /** 2504 * @brief Get Block Repeat Source address Update Mode. 2505 * @rmtoll CBNDTR BRSUM LL_MDMA_GetBlkRepeatSrcAddrUpdate 2506 * @param MDMAx MDMAx Instance 2507 * @param Channel This parameter can be one of the following values: 2508 * @arg @ref LL_MDMA_CHANNEL_0 2509 * @arg @ref LL_MDMA_CHANNEL_1 2510 * @arg @ref LL_MDMA_CHANNEL_2 2511 * @arg @ref LL_MDMA_CHANNEL_3 2512 * @arg @ref LL_MDMA_CHANNEL_4 2513 * @arg @ref LL_MDMA_CHANNEL_5 2514 * @arg @ref LL_MDMA_CHANNEL_6 2515 * @arg @ref LL_MDMA_CHANNEL_7 2516 * @arg @ref LL_MDMA_CHANNEL_8 2517 * @arg @ref LL_MDMA_CHANNEL_9 2518 * @arg @ref LL_MDMA_CHANNEL_10 2519 * @arg @ref LL_MDMA_CHANNEL_11 2520 * @arg @ref LL_MDMA_CHANNEL_12 2521 * @arg @ref LL_MDMA_CHANNEL_13 2522 * @arg @ref LL_MDMA_CHANNEL_14 2523 * @arg @ref LL_MDMA_CHANNEL_15 2524 * @retval Returned value can be one of the following values: 2525 * @arg @ref LL_MDMA_BLK_RPT_SRC_ADDR_INCREMENT 2526 * @arg @ref LL_MDMA_BLK_RPT_SRC_ADDR_DECREMENT 2527 * @retval None 2528 */ 2529 __STATIC_INLINE uint32_t LL_MDMA_GetBlkRepeatSrcAddrUpdate(MDMA_TypeDef *MDMAx, uint32_t Channel) 2530 { 2531 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2532 2533 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, MDMA_CBNDTR_BRSUM)); 2534 } 2535 2536 /** 2537 * @brief Configure the Source and Destination addresses. 2538 * @note This API must not be called when the MDMA channel is enabled. 2539 * @rmtoll CSAR SAR LL_MDMA_ConfigAddresses\n 2540 * @rmtoll CDAR DAR LL_MDMA_ConfigAddresses 2541 * @param MDMAx MDMAx Instance 2542 * @param Channel This parameter can be one of the following values: 2543 * @arg @ref LL_MDMA_CHANNEL_0 2544 * @arg @ref LL_MDMA_CHANNEL_1 2545 * @arg @ref LL_MDMA_CHANNEL_2 2546 * @arg @ref LL_MDMA_CHANNEL_3 2547 * @arg @ref LL_MDMA_CHANNEL_4 2548 * @arg @ref LL_MDMA_CHANNEL_5 2549 * @arg @ref LL_MDMA_CHANNEL_6 2550 * @arg @ref LL_MDMA_CHANNEL_7 2551 * @arg @ref LL_MDMA_CHANNEL_8 2552 * @arg @ref LL_MDMA_CHANNEL_9 2553 * @arg @ref LL_MDMA_CHANNEL_10 2554 * @arg @ref LL_MDMA_CHANNEL_11 2555 * @arg @ref LL_MDMA_CHANNEL_12 2556 * @arg @ref LL_MDMA_CHANNEL_13 2557 * @arg @ref LL_MDMA_CHANNEL_14 2558 * @arg @ref LL_MDMA_CHANNEL_15 2559 * @param SrcAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF 2560 * @param DstAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF 2561 * @retval None 2562 */ 2563 __STATIC_INLINE void LL_MDMA_ConfigAddresses(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t SrcAddress, uint32_t DstAddress) 2564 { 2565 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2566 2567 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CSAR, SrcAddress); 2568 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CDAR, DstAddress); 2569 } 2570 /** 2571 * @brief Set transfer Source address. 2572 * @rmtoll CSAR SAR LL_MDMA_SetSourceAddress 2573 * @param MDMAx MDMAx Instance 2574 * @param Channel This parameter can be one of the following values: 2575 * @arg @ref LL_MDMA_CHANNEL_0 2576 * @arg @ref LL_MDMA_CHANNEL_1 2577 * @arg @ref LL_MDMA_CHANNEL_2 2578 * @arg @ref LL_MDMA_CHANNEL_3 2579 * @arg @ref LL_MDMA_CHANNEL_4 2580 * @arg @ref LL_MDMA_CHANNEL_5 2581 * @arg @ref LL_MDMA_CHANNEL_6 2582 * @arg @ref LL_MDMA_CHANNEL_7 2583 * @arg @ref LL_MDMA_CHANNEL_8 2584 * @arg @ref LL_MDMA_CHANNEL_9 2585 * @arg @ref LL_MDMA_CHANNEL_10 2586 * @arg @ref LL_MDMA_CHANNEL_11 2587 * @arg @ref LL_MDMA_CHANNEL_12 2588 * @arg @ref LL_MDMA_CHANNEL_13 2589 * @arg @ref LL_MDMA_CHANNEL_14 2590 * @arg @ref LL_MDMA_CHANNEL_15 2591 * @param SrcAddress Between 0 to 0xFFFFFFFF 2592 * @retval None 2593 */ 2594 __STATIC_INLINE void LL_MDMA_SetSourceAddress(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t SrcAddress) 2595 { 2596 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2597 2598 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CSAR, SrcAddress); 2599 } 2600 2601 /** 2602 * @brief Get transfer Source address. 2603 * @rmtoll CSAR SAR LL_MDMA_GetSourceAddress 2604 * @param MDMAx MDMAx Instance 2605 * @param Channel This parameter can be one of the following values: 2606 * @arg @ref LL_MDMA_CHANNEL_0 2607 * @arg @ref LL_MDMA_CHANNEL_1 2608 * @arg @ref LL_MDMA_CHANNEL_2 2609 * @arg @ref LL_MDMA_CHANNEL_3 2610 * @arg @ref LL_MDMA_CHANNEL_4 2611 * @arg @ref LL_MDMA_CHANNEL_5 2612 * @arg @ref LL_MDMA_CHANNEL_6 2613 * @arg @ref LL_MDMA_CHANNEL_7 2614 * @arg @ref LL_MDMA_CHANNEL_8 2615 * @arg @ref LL_MDMA_CHANNEL_9 2616 * @arg @ref LL_MDMA_CHANNEL_10 2617 * @arg @ref LL_MDMA_CHANNEL_11 2618 * @arg @ref LL_MDMA_CHANNEL_12 2619 * @arg @ref LL_MDMA_CHANNEL_13 2620 * @arg @ref LL_MDMA_CHANNEL_14 2621 * @arg @ref LL_MDMA_CHANNEL_15 2622 * @retval Between 0 to 0xFFFFFFFF 2623 * @retval None 2624 */ 2625 __STATIC_INLINE uint32_t LL_MDMA_GetSourceAddress(MDMA_TypeDef *MDMAx, uint32_t Channel) 2626 { 2627 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2628 2629 return (READ_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CSAR)); 2630 } 2631 2632 /** 2633 * @brief Set transfer Destination address. 2634 * @rmtoll CDAR DAR LL_MDMA_SetDestinationAddress 2635 * @param MDMAx MDMAx Instance 2636 * @param Channel This parameter can be one of the following values: 2637 * @arg @ref LL_MDMA_CHANNEL_0 2638 * @arg @ref LL_MDMA_CHANNEL_1 2639 * @arg @ref LL_MDMA_CHANNEL_2 2640 * @arg @ref LL_MDMA_CHANNEL_3 2641 * @arg @ref LL_MDMA_CHANNEL_4 2642 * @arg @ref LL_MDMA_CHANNEL_5 2643 * @arg @ref LL_MDMA_CHANNEL_6 2644 * @arg @ref LL_MDMA_CHANNEL_7 2645 * @arg @ref LL_MDMA_CHANNEL_8 2646 * @arg @ref LL_MDMA_CHANNEL_9 2647 * @arg @ref LL_MDMA_CHANNEL_10 2648 * @arg @ref LL_MDMA_CHANNEL_11 2649 * @arg @ref LL_MDMA_CHANNEL_12 2650 * @arg @ref LL_MDMA_CHANNEL_13 2651 * @arg @ref LL_MDMA_CHANNEL_14 2652 * @arg @ref LL_MDMA_CHANNEL_15 2653 * @param DestAddress Between 0 to 0xFFFFFFFF 2654 * @retval None 2655 */ 2656 __STATIC_INLINE void LL_MDMA_SetDestinationAddress(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t DestAddress) 2657 { 2658 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2659 2660 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CDAR, DestAddress); 2661 } 2662 2663 /** 2664 * @brief Get transfer Destination address. 2665 * @rmtoll CDAR DAR LL_MDMA_GetDestinationAddress 2666 * @param MDMAx MDMAx Instance 2667 * @param Channel This parameter can be one of the following values: 2668 * @arg @ref LL_MDMA_CHANNEL_0 2669 * @arg @ref LL_MDMA_CHANNEL_1 2670 * @arg @ref LL_MDMA_CHANNEL_2 2671 * @arg @ref LL_MDMA_CHANNEL_3 2672 * @arg @ref LL_MDMA_CHANNEL_4 2673 * @arg @ref LL_MDMA_CHANNEL_5 2674 * @arg @ref LL_MDMA_CHANNEL_6 2675 * @arg @ref LL_MDMA_CHANNEL_7 2676 * @arg @ref LL_MDMA_CHANNEL_8 2677 * @arg @ref LL_MDMA_CHANNEL_9 2678 * @arg @ref LL_MDMA_CHANNEL_10 2679 * @arg @ref LL_MDMA_CHANNEL_11 2680 * @arg @ref LL_MDMA_CHANNEL_12 2681 * @arg @ref LL_MDMA_CHANNEL_13 2682 * @arg @ref LL_MDMA_CHANNEL_14 2683 * @arg @ref LL_MDMA_CHANNEL_15 2684 * @retval Between 0 to 0xFFFFFFFF 2685 * @retval None 2686 */ 2687 __STATIC_INLINE uint32_t LL_MDMA_GetDestinationAddress(MDMA_TypeDef *MDMAx, uint32_t Channel) 2688 { 2689 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2690 2691 return (READ_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CDAR)); 2692 } 2693 2694 /** 2695 * @brief Configure the Source and Destination Block repeat addresses Update value. 2696 * @note This API must not be called when the MDMA channel is enabled. 2697 * @rmtoll CBRUR DUV LL_MDMA_ConfigBlkRptAddrUpdateValue\n 2698 * @rmtoll CBRUR SUV LL_MDMA_ConfigBlkRptAddrUpdateValue 2699 * @param MDMAx MDMAx Instance 2700 * @param Channel This parameter can be one of the following values: 2701 * @arg @ref LL_MDMA_CHANNEL_0 2702 * @arg @ref LL_MDMA_CHANNEL_1 2703 * @arg @ref LL_MDMA_CHANNEL_2 2704 * @arg @ref LL_MDMA_CHANNEL_3 2705 * @arg @ref LL_MDMA_CHANNEL_4 2706 * @arg @ref LL_MDMA_CHANNEL_5 2707 * @arg @ref LL_MDMA_CHANNEL_6 2708 * @arg @ref LL_MDMA_CHANNEL_7 2709 * @arg @ref LL_MDMA_CHANNEL_8 2710 * @arg @ref LL_MDMA_CHANNEL_9 2711 * @arg @ref LL_MDMA_CHANNEL_10 2712 * @arg @ref LL_MDMA_CHANNEL_11 2713 * @arg @ref LL_MDMA_CHANNEL_12 2714 * @arg @ref LL_MDMA_CHANNEL_13 2715 * @arg @ref LL_MDMA_CHANNEL_14 2716 * @arg @ref LL_MDMA_CHANNEL_15 2717 * @param SrctAdrUpdateValue Min_Data = 0 and Max_Data = 0x0000FFFF 2718 * @param DestAdrUpdateValue Between Min_Data = 0 and Max_Data = 0x0000FFFF 2719 * @retval None 2720 */ 2721 __STATIC_INLINE void LL_MDMA_ConfigBlkRptAddrUpdateValue(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t SrctAdrUpdateValue, uint32_t DestAdrUpdateValue) 2722 { 2723 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2724 2725 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBRUR, 2726 (SrctAdrUpdateValue & MDMA_CBRUR_SUV_Msk) | ((DestAdrUpdateValue << MDMA_CBRUR_DUV_Pos) & MDMA_CBRUR_DUV_Msk)); 2727 } 2728 2729 /** 2730 * @brief Set transfer Destination address Update Value. 2731 * @rmtoll CBRUR DUV LL_MDMA_SetBlkRptDestAddrUpdateValue 2732 * @param MDMAx MDMAx Instance 2733 * @param Channel This parameter can be one of the following values: 2734 * @arg @ref LL_MDMA_CHANNEL_0 2735 * @arg @ref LL_MDMA_CHANNEL_1 2736 * @arg @ref LL_MDMA_CHANNEL_2 2737 * @arg @ref LL_MDMA_CHANNEL_3 2738 * @arg @ref LL_MDMA_CHANNEL_4 2739 * @arg @ref LL_MDMA_CHANNEL_5 2740 * @arg @ref LL_MDMA_CHANNEL_6 2741 * @arg @ref LL_MDMA_CHANNEL_7 2742 * @arg @ref LL_MDMA_CHANNEL_8 2743 * @arg @ref LL_MDMA_CHANNEL_9 2744 * @arg @ref LL_MDMA_CHANNEL_10 2745 * @arg @ref LL_MDMA_CHANNEL_11 2746 * @arg @ref LL_MDMA_CHANNEL_12 2747 * @arg @ref LL_MDMA_CHANNEL_13 2748 * @arg @ref LL_MDMA_CHANNEL_14 2749 * @arg @ref LL_MDMA_CHANNEL_15 2750 * @param DestAdrUpdateValue Between 0 to 0x0000FFFF 2751 * @retval None 2752 */ 2753 __STATIC_INLINE void LL_MDMA_SetBlkRptDestAddrUpdateValue(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t DestAdrUpdateValue) 2754 { 2755 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2756 2757 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBRUR, MDMA_CBRUR_DUV, 2758 ((DestAdrUpdateValue << MDMA_CBRUR_DUV_Pos) & MDMA_CBRUR_DUV_Msk)); 2759 } 2760 2761 /** 2762 * @brief Get transfer Destination address Update Value. 2763 * @rmtoll CBRUR DUV LL_MDMA_GetBlkRptDestAddrUpdateValue 2764 * @param MDMAx MDMAx Instance 2765 * @param Channel This parameter can be one of the following values: 2766 * @arg @ref LL_MDMA_CHANNEL_0 2767 * @arg @ref LL_MDMA_CHANNEL_1 2768 * @arg @ref LL_MDMA_CHANNEL_2 2769 * @arg @ref LL_MDMA_CHANNEL_3 2770 * @arg @ref LL_MDMA_CHANNEL_4 2771 * @arg @ref LL_MDMA_CHANNEL_5 2772 * @arg @ref LL_MDMA_CHANNEL_6 2773 * @arg @ref LL_MDMA_CHANNEL_7 2774 * @arg @ref LL_MDMA_CHANNEL_8 2775 * @arg @ref LL_MDMA_CHANNEL_9 2776 * @arg @ref LL_MDMA_CHANNEL_10 2777 * @arg @ref LL_MDMA_CHANNEL_11 2778 * @arg @ref LL_MDMA_CHANNEL_12 2779 * @arg @ref LL_MDMA_CHANNEL_13 2780 * @arg @ref LL_MDMA_CHANNEL_14 2781 * @arg @ref LL_MDMA_CHANNEL_15 2782 * @retval Between 0 to 0x0000FFFF 2783 * @retval None 2784 */ 2785 __STATIC_INLINE uint32_t LL_MDMA_GetBlkRptDestAddrUpdateValue(MDMA_TypeDef *MDMAx, uint32_t Channel) 2786 { 2787 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2788 2789 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBRUR, MDMA_CBRUR_DUV) >> MDMA_CBRUR_DUV_Pos); 2790 } 2791 2792 /** 2793 * @brief Set transfer Source address Update Value. 2794 * @rmtoll CBRUR SUV LL_MDMA_SetBlkRptSrcAddrUpdateValue 2795 * @param MDMAx MDMAx Instance 2796 * @param Channel This parameter can be one of the following values: 2797 * @arg @ref LL_MDMA_CHANNEL_0 2798 * @arg @ref LL_MDMA_CHANNEL_1 2799 * @arg @ref LL_MDMA_CHANNEL_2 2800 * @arg @ref LL_MDMA_CHANNEL_3 2801 * @arg @ref LL_MDMA_CHANNEL_4 2802 * @arg @ref LL_MDMA_CHANNEL_5 2803 * @arg @ref LL_MDMA_CHANNEL_6 2804 * @arg @ref LL_MDMA_CHANNEL_7 2805 * @arg @ref LL_MDMA_CHANNEL_8 2806 * @arg @ref LL_MDMA_CHANNEL_9 2807 * @arg @ref LL_MDMA_CHANNEL_10 2808 * @arg @ref LL_MDMA_CHANNEL_11 2809 * @arg @ref LL_MDMA_CHANNEL_12 2810 * @arg @ref LL_MDMA_CHANNEL_13 2811 * @arg @ref LL_MDMA_CHANNEL_14 2812 * @arg @ref LL_MDMA_CHANNEL_15 2813 * @param SrcAdrUpdateValue Between 0 to 0x0000FFFF 2814 * @retval None 2815 */ 2816 __STATIC_INLINE void LL_MDMA_SetBlkRptSrcAddrUpdateValue(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t SrcAdrUpdateValue) 2817 { 2818 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2819 2820 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBRUR, MDMA_CBRUR_SUV, SrcAdrUpdateValue); 2821 } 2822 2823 /** 2824 * @brief Get transfer Source address Update Value. 2825 * @rmtoll CBRUR SUV LL_MDMA_GetBlkRptSrcAddrUpdateValue 2826 * @param MDMAx MDMAx Instance 2827 * @param Channel This parameter can be one of the following values: 2828 * @arg @ref LL_MDMA_CHANNEL_0 2829 * @arg @ref LL_MDMA_CHANNEL_1 2830 * @arg @ref LL_MDMA_CHANNEL_2 2831 * @arg @ref LL_MDMA_CHANNEL_3 2832 * @arg @ref LL_MDMA_CHANNEL_4 2833 * @arg @ref LL_MDMA_CHANNEL_5 2834 * @arg @ref LL_MDMA_CHANNEL_6 2835 * @arg @ref LL_MDMA_CHANNEL_7 2836 * @arg @ref LL_MDMA_CHANNEL_8 2837 * @arg @ref LL_MDMA_CHANNEL_9 2838 * @arg @ref LL_MDMA_CHANNEL_10 2839 * @arg @ref LL_MDMA_CHANNEL_11 2840 * @arg @ref LL_MDMA_CHANNEL_12 2841 * @arg @ref LL_MDMA_CHANNEL_13 2842 * @arg @ref LL_MDMA_CHANNEL_14 2843 * @arg @ref LL_MDMA_CHANNEL_15 2844 * @retval Between 0 to 0x0000FFFF 2845 * @retval None 2846 */ 2847 __STATIC_INLINE uint32_t LL_MDMA_GetBlkRptSrcAddrUpdateValue(MDMA_TypeDef *MDMAx, uint32_t Channel) 2848 { 2849 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2850 2851 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBRUR, MDMA_CBRUR_SUV)); 2852 } 2853 2854 /** 2855 * @brief Set transfer Link Address. 2856 * @rmtoll CLAR LAR LL_MDMA_SetLinkAddress 2857 * @param MDMAx MDMAx Instance 2858 * @param Channel This parameter can be one of the following values: 2859 * @arg @ref LL_MDMA_CHANNEL_0 2860 * @arg @ref LL_MDMA_CHANNEL_1 2861 * @arg @ref LL_MDMA_CHANNEL_2 2862 * @arg @ref LL_MDMA_CHANNEL_3 2863 * @arg @ref LL_MDMA_CHANNEL_4 2864 * @arg @ref LL_MDMA_CHANNEL_5 2865 * @arg @ref LL_MDMA_CHANNEL_6 2866 * @arg @ref LL_MDMA_CHANNEL_7 2867 * @arg @ref LL_MDMA_CHANNEL_8 2868 * @arg @ref LL_MDMA_CHANNEL_9 2869 * @arg @ref LL_MDMA_CHANNEL_10 2870 * @arg @ref LL_MDMA_CHANNEL_11 2871 * @arg @ref LL_MDMA_CHANNEL_12 2872 * @arg @ref LL_MDMA_CHANNEL_13 2873 * @arg @ref LL_MDMA_CHANNEL_14 2874 * @arg @ref LL_MDMA_CHANNEL_15 2875 * @param LinkAddress Between 0 to 0xFFFFFFFF 2876 * @retval None 2877 */ 2878 __STATIC_INLINE void LL_MDMA_SetLinkAddress(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t LinkAddress) 2879 { 2880 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2881 2882 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CLAR, LinkAddress); 2883 } 2884 2885 /** 2886 * @brief Get transfer Link Address. 2887 * @rmtoll CLAR LAR LL_MDMA_GetLinkAddress 2888 * @param MDMAx MDMAx Instance 2889 * @param Channel This parameter can be one of the following values: 2890 * @arg @ref LL_MDMA_CHANNEL_0 2891 * @arg @ref LL_MDMA_CHANNEL_1 2892 * @arg @ref LL_MDMA_CHANNEL_2 2893 * @arg @ref LL_MDMA_CHANNEL_3 2894 * @arg @ref LL_MDMA_CHANNEL_4 2895 * @arg @ref LL_MDMA_CHANNEL_5 2896 * @arg @ref LL_MDMA_CHANNEL_6 2897 * @arg @ref LL_MDMA_CHANNEL_7 2898 * @arg @ref LL_MDMA_CHANNEL_8 2899 * @arg @ref LL_MDMA_CHANNEL_9 2900 * @arg @ref LL_MDMA_CHANNEL_10 2901 * @arg @ref LL_MDMA_CHANNEL_11 2902 * @arg @ref LL_MDMA_CHANNEL_12 2903 * @arg @ref LL_MDMA_CHANNEL_13 2904 * @arg @ref LL_MDMA_CHANNEL_14 2905 * @arg @ref LL_MDMA_CHANNEL_15 2906 * @retval Between 0 to 0xFFFFFFFF 2907 * @retval None 2908 */ 2909 __STATIC_INLINE uint32_t LL_MDMA_GetLinkAddress(MDMA_TypeDef *MDMAx, uint32_t Channel) 2910 { 2911 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2912 2913 return (READ_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CLAR)); 2914 } 2915 2916 /** 2917 * @brief Configure MDMA source and destination bus selection. 2918 * @rmtoll CTBR DBUS LL_MDMA_ConfigBusSelection\n 2919 * @rmtoll CTBR SBUS LL_MDMA_ConfigBusSelection 2920 * @param MDMAx MDMAx Instance 2921 * @param Channel This parameter can be one of the following values: 2922 * @arg @ref LL_MDMA_CHANNEL_0 2923 * @arg @ref LL_MDMA_CHANNEL_1 2924 * @arg @ref LL_MDMA_CHANNEL_2 2925 * @arg @ref LL_MDMA_CHANNEL_3 2926 * @arg @ref LL_MDMA_CHANNEL_4 2927 * @arg @ref LL_MDMA_CHANNEL_5 2928 * @arg @ref LL_MDMA_CHANNEL_6 2929 * @arg @ref LL_MDMA_CHANNEL_7 2930 * @arg @ref LL_MDMA_CHANNEL_8 2931 * @arg @ref LL_MDMA_CHANNEL_9 2932 * @arg @ref LL_MDMA_CHANNEL_10 2933 * @arg @ref LL_MDMA_CHANNEL_11 2934 * @arg @ref LL_MDMA_CHANNEL_12 2935 * @arg @ref LL_MDMA_CHANNEL_13 2936 * @arg @ref LL_MDMA_CHANNEL_14 2937 * @arg @ref LL_MDMA_CHANNEL_15 2938 * @param Configuration This parameter must be a combination of all the following values: 2939 * @arg @ref LL_MDMA_DEST_BUS_SYSTEM_AXI or @ref LL_MDMA_DEST_BUS_AHB_TCM 2940 * @arg @ref LL_MDMA_SRC_BUS_SYSTEM_AXI or @ref LL_MDMA_SRC_BUS_AHB_TCM 2941 * @retval None 2942 */ 2943 __STATIC_INLINE void LL_MDMA_ConfigBusSelection(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Configuration) 2944 { 2945 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2946 2947 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTBR, 2948 MDMA_CTBR_DBUS | MDMA_CTBR_SBUS, 2949 Configuration); 2950 } 2951 2952 /** 2953 * @brief Set Destination Bus Selection. 2954 * @rmtoll CTBR DBUS LL_MDMA_SetDestBusSelection 2955 * @param MDMAx MDMAx Instance 2956 * @param Channel This parameter can be one of the following values: 2957 * @arg @ref LL_MDMA_CHANNEL_0 2958 * @arg @ref LL_MDMA_CHANNEL_1 2959 * @arg @ref LL_MDMA_CHANNEL_2 2960 * @arg @ref LL_MDMA_CHANNEL_3 2961 * @arg @ref LL_MDMA_CHANNEL_4 2962 * @arg @ref LL_MDMA_CHANNEL_5 2963 * @arg @ref LL_MDMA_CHANNEL_6 2964 * @arg @ref LL_MDMA_CHANNEL_7 2965 * @arg @ref LL_MDMA_CHANNEL_8 2966 * @arg @ref LL_MDMA_CHANNEL_9 2967 * @arg @ref LL_MDMA_CHANNEL_10 2968 * @arg @ref LL_MDMA_CHANNEL_11 2969 * @arg @ref LL_MDMA_CHANNEL_12 2970 * @arg @ref LL_MDMA_CHANNEL_13 2971 * @arg @ref LL_MDMA_CHANNEL_14 2972 * @arg @ref LL_MDMA_CHANNEL_15 2973 * @param DestBus This parameter can be one of the following values: 2974 * @arg @ref LL_MDMA_DEST_BUS_SYSTEM_AXI 2975 * @arg @ref LL_MDMA_DEST_BUS_AHB_TCM 2976 * @retval None 2977 */ 2978 __STATIC_INLINE void LL_MDMA_SetDestBusSelection(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t DestBus) 2979 { 2980 uint32_t mdma_base_addr = (uint32_t)MDMAx; 2981 2982 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTBR, MDMA_CTBR_DBUS, DestBus); 2983 } 2984 2985 /** 2986 * @brief Get Destination Bus Selection. 2987 * @rmtoll CTBR DBUS LL_MDMA_GetDestBusSelection 2988 * @param MDMAx MDMAx Instance 2989 * @param Channel This parameter can be one of the following values: 2990 * @arg @ref LL_MDMA_CHANNEL_0 2991 * @arg @ref LL_MDMA_CHANNEL_1 2992 * @arg @ref LL_MDMA_CHANNEL_2 2993 * @arg @ref LL_MDMA_CHANNEL_3 2994 * @arg @ref LL_MDMA_CHANNEL_4 2995 * @arg @ref LL_MDMA_CHANNEL_5 2996 * @arg @ref LL_MDMA_CHANNEL_6 2997 * @arg @ref LL_MDMA_CHANNEL_7 2998 * @arg @ref LL_MDMA_CHANNEL_8 2999 * @arg @ref LL_MDMA_CHANNEL_9 3000 * @arg @ref LL_MDMA_CHANNEL_10 3001 * @arg @ref LL_MDMA_CHANNEL_11 3002 * @arg @ref LL_MDMA_CHANNEL_12 3003 * @arg @ref LL_MDMA_CHANNEL_13 3004 * @arg @ref LL_MDMA_CHANNEL_14 3005 * @arg @ref LL_MDMA_CHANNEL_15 3006 * @retval Returned value can be one of the following values: 3007 * @arg @ref LL_MDMA_DEST_BUS_SYSTEM_AXI 3008 * @arg @ref LL_MDMA_DEST_BUS_AHB_TCM 3009 * @retval None 3010 */ 3011 __STATIC_INLINE uint32_t LL_MDMA_GetDestBusSelection(MDMA_TypeDef *MDMAx, uint32_t Channel) 3012 { 3013 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3014 3015 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTBR, MDMA_CTBR_DBUS)); 3016 } 3017 3018 /** 3019 * @brief Set Source Bus Selection. 3020 * @rmtoll CTBR SBUS LL_MDMA_SetSrcBusSelection 3021 * @param MDMAx MDMAx Instance 3022 * @param Channel This parameter can be one of the following values: 3023 * @arg @ref LL_MDMA_CHANNEL_0 3024 * @arg @ref LL_MDMA_CHANNEL_1 3025 * @arg @ref LL_MDMA_CHANNEL_2 3026 * @arg @ref LL_MDMA_CHANNEL_3 3027 * @arg @ref LL_MDMA_CHANNEL_4 3028 * @arg @ref LL_MDMA_CHANNEL_5 3029 * @arg @ref LL_MDMA_CHANNEL_6 3030 * @arg @ref LL_MDMA_CHANNEL_7 3031 * @arg @ref LL_MDMA_CHANNEL_8 3032 * @arg @ref LL_MDMA_CHANNEL_9 3033 * @arg @ref LL_MDMA_CHANNEL_10 3034 * @arg @ref LL_MDMA_CHANNEL_11 3035 * @arg @ref LL_MDMA_CHANNEL_12 3036 * @arg @ref LL_MDMA_CHANNEL_13 3037 * @arg @ref LL_MDMA_CHANNEL_14 3038 * @arg @ref LL_MDMA_CHANNEL_15 3039 * @param SrcBus This parameter can be one of the following values: 3040 * @arg @ref LL_MDMA_SRC_BUS_SYSTEM_AXI 3041 * @arg @ref LL_MDMA_SRC_BUS_AHB_TCM 3042 * @retval None 3043 */ 3044 __STATIC_INLINE void LL_MDMA_SetSrcBusSelection(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t SrcBus) 3045 { 3046 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3047 3048 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTBR, MDMA_CTBR_SBUS, SrcBus); 3049 } 3050 3051 /** 3052 * @brief Get Source Bus Selection. 3053 * @rmtoll CTBR SBUS LL_MDMA_GetSrcBusSelection 3054 * @param MDMAx MDMAx Instance 3055 * @param Channel This parameter can be one of the following values: 3056 * @arg @ref LL_MDMA_CHANNEL_0 3057 * @arg @ref LL_MDMA_CHANNEL_1 3058 * @arg @ref LL_MDMA_CHANNEL_2 3059 * @arg @ref LL_MDMA_CHANNEL_3 3060 * @arg @ref LL_MDMA_CHANNEL_4 3061 * @arg @ref LL_MDMA_CHANNEL_5 3062 * @arg @ref LL_MDMA_CHANNEL_6 3063 * @arg @ref LL_MDMA_CHANNEL_7 3064 * @arg @ref LL_MDMA_CHANNEL_8 3065 * @arg @ref LL_MDMA_CHANNEL_9 3066 * @arg @ref LL_MDMA_CHANNEL_10 3067 * @arg @ref LL_MDMA_CHANNEL_11 3068 * @arg @ref LL_MDMA_CHANNEL_12 3069 * @arg @ref LL_MDMA_CHANNEL_13 3070 * @arg @ref LL_MDMA_CHANNEL_14 3071 * @arg @ref LL_MDMA_CHANNEL_15 3072 * @retval Returned value can be one of the following values: 3073 * @arg @ref LL_MDMA_SRC_BUS_SYSTEM_AXI 3074 * @arg @ref LL_MDMA_SRC_BUS_AHB_TCM 3075 * @retval None 3076 */ 3077 __STATIC_INLINE uint32_t LL_MDMA_GetSrcBusSelection(MDMA_TypeDef *MDMAx, uint32_t Channel) 3078 { 3079 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3080 3081 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTBR, MDMA_CTBR_SBUS)); 3082 } 3083 3084 /** 3085 * @brief Set Transfer hardware trigger (Request). 3086 * @rmtoll CTBR TSEL LL_MDMA_SetHWTrigger 3087 * @param MDMAx MDMAx Instance 3088 * @param Channel This parameter can be one of the following values: 3089 * @arg @ref LL_MDMA_CHANNEL_0 3090 * @arg @ref LL_MDMA_CHANNEL_1 3091 * @arg @ref LL_MDMA_CHANNEL_2 3092 * @arg @ref LL_MDMA_CHANNEL_3 3093 * @arg @ref LL_MDMA_CHANNEL_4 3094 * @arg @ref LL_MDMA_CHANNEL_5 3095 * @arg @ref LL_MDMA_CHANNEL_6 3096 * @arg @ref LL_MDMA_CHANNEL_7 3097 * @arg @ref LL_MDMA_CHANNEL_8 3098 * @arg @ref LL_MDMA_CHANNEL_9 3099 * @arg @ref LL_MDMA_CHANNEL_10 3100 * @arg @ref LL_MDMA_CHANNEL_11 3101 * @arg @ref LL_MDMA_CHANNEL_12 3102 * @arg @ref LL_MDMA_CHANNEL_13 3103 * @arg @ref LL_MDMA_CHANNEL_14 3104 * @arg @ref LL_MDMA_CHANNEL_15 3105 * @param HWRequest This parameter can be one of the following values: 3106 * @arg @ref LL_MDMA_REQ_DMA1_STREAM0_TC 3107 * @arg @ref LL_MDMA_REQ_DMA1_STREAM1_TC 3108 * @arg @ref LL_MDMA_REQ_DMA1_STREAM2_TC 3109 * @arg @ref LL_MDMA_REQ_DMA1_STREAM3_TC 3110 * @arg @ref LL_MDMA_REQ_DMA1_STREAM4_TC 3111 * @arg @ref LL_MDMA_REQ_DMA1_STREAM5_TC 3112 * @arg @ref LL_MDMA_REQ_DMA1_STREAM6_TC 3113 * @arg @ref LL_MDMA_REQ_DMA1_STREAM7_TC 3114 * @arg @ref LL_MDMA_REQ_DMA2_STREAM0_TC 3115 * @arg @ref LL_MDMA_REQ_DMA2_STREAM1_TC 3116 * @arg @ref LL_MDMA_REQ_DMA2_STREAM2_TC 3117 * @arg @ref LL_MDMA_REQ_DMA2_STREAM3_TC 3118 * @arg @ref LL_MDMA_REQ_DMA2_STREAM4_TC 3119 * @arg @ref LL_MDMA_REQ_DMA2_STREAM5_TC 3120 * @arg @ref LL_MDMA_REQ_DMA2_STREAM6_TC 3121 * @arg @ref LL_MDMA_REQ_DMA2_STREAM7_TC 3122 * @arg @ref LL_MDMA_REQ_LTDC_LINE_IT (*) 3123 * @arg @ref LL_MDMA_REQ_JPEG_INFIFO_TH (*) 3124 * @arg @ref LL_MDMA_REQ_JPEG_INFIFO_NF (*) 3125 * @arg @ref LL_MDMA_REQ_JPEG_OUTFIFO_TH (*) 3126 * @arg @ref LL_MDMA_REQ_JPEG_OUTFIFO_NE (*) 3127 * @arg @ref LL_MDMA_REQ_JPEG_END_CONVERSION (*) 3128 * @arg @ref LL_MDMA_REQ_QUADSPI_FIFO_TH (*) 3129 * @arg @ref LL_MDMA_REQ_QUADSPI_TC (*) 3130 * @arg @ref LL_MDMA_REQ_OCTOSPI1_FIFO_TH (*) 3131 * @arg @ref LL_MDMA_REQ_OCTOSPI1_TC (*) 3132 * @arg @ref LL_MDMA_REQ_DMA2D_CLUT_TC 3133 * @arg @ref LL_MDMA_REQ_DMA2D_TC 3134 * @arg @ref LL_MDMA_REQ_DMA2D_TW 3135 * @arg @ref LL_MDMA_REQ_DSI_TEARING_EFFECT (*) 3136 * @arg @ref LL_MDMA_REQ_DSI_END_REFRESH (*) 3137 * @arg @ref LL_MDMA_REQ_SDMMC1_END_DATA 3138 * @arg @ref LL_MDMA_REQ_SDMMC1_DMA_ENDBUFFER (*) 3139 * @arg @ref LL_MDMA_REQ_SDMMC1_COMMAND_END (*) 3140 * @arg @ref LL_MDMA_REQ_OCTOSPI2_FIFO_TH (*) 3141 * @arg @ref LL_MDMA_REQ_OCTOSPI2_TC (*) 3142 * @note (*) Availability depends on devices. 3143 * @retval None 3144 */ 3145 __STATIC_INLINE void LL_MDMA_SetHWTrigger(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t HWRequest) 3146 { 3147 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3148 3149 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTBR, MDMA_CTBR_TSEL, HWRequest); 3150 } 3151 3152 /** 3153 * @brief Get Transfer hardware trigger (Request). 3154 * @rmtoll CTBR TSEL LL_MDMA_GetHWTrigger 3155 * @param MDMAx MDMAx Instance 3156 * @param Channel This parameter can be one of the following values: 3157 * @arg @ref LL_MDMA_CHANNEL_0 3158 * @arg @ref LL_MDMA_CHANNEL_1 3159 * @arg @ref LL_MDMA_CHANNEL_2 3160 * @arg @ref LL_MDMA_CHANNEL_3 3161 * @arg @ref LL_MDMA_CHANNEL_4 3162 * @arg @ref LL_MDMA_CHANNEL_5 3163 * @arg @ref LL_MDMA_CHANNEL_6 3164 * @arg @ref LL_MDMA_CHANNEL_7 3165 * @arg @ref LL_MDMA_CHANNEL_8 3166 * @arg @ref LL_MDMA_CHANNEL_9 3167 * @arg @ref LL_MDMA_CHANNEL_10 3168 * @arg @ref LL_MDMA_CHANNEL_11 3169 * @arg @ref LL_MDMA_CHANNEL_12 3170 * @arg @ref LL_MDMA_CHANNEL_13 3171 * @arg @ref LL_MDMA_CHANNEL_14 3172 * @arg @ref LL_MDMA_CHANNEL_15 3173 * @retval Returned value can be one of the following values: 3174 * @arg @ref LL_MDMA_REQ_DMA1_STREAM0_TC 3175 * @arg @ref LL_MDMA_REQ_DMA1_STREAM1_TC 3176 * @arg @ref LL_MDMA_REQ_DMA1_STREAM2_TC 3177 * @arg @ref LL_MDMA_REQ_DMA1_STREAM3_TC 3178 * @arg @ref LL_MDMA_REQ_DMA1_STREAM4_TC 3179 * @arg @ref LL_MDMA_REQ_DMA1_STREAM5_TC 3180 * @arg @ref LL_MDMA_REQ_DMA1_STREAM6_TC 3181 * @arg @ref LL_MDMA_REQ_DMA1_STREAM7_TC 3182 * @arg @ref LL_MDMA_REQ_DMA2_STREAM0_TC 3183 * @arg @ref LL_MDMA_REQ_DMA2_STREAM1_TC 3184 * @arg @ref LL_MDMA_REQ_DMA2_STREAM2_TC 3185 * @arg @ref LL_MDMA_REQ_DMA2_STREAM3_TC 3186 * @arg @ref LL_MDMA_REQ_DMA2_STREAM4_TC 3187 * @arg @ref LL_MDMA_REQ_DMA2_STREAM5_TC 3188 * @arg @ref LL_MDMA_REQ_DMA2_STREAM6_TC 3189 * @arg @ref LL_MDMA_REQ_DMA2_STREAM7_TC 3190 * @arg @ref LL_MDMA_REQ_LTDC_LINE_IT (*) 3191 * @arg @ref LL_MDMA_REQ_JPEG_INFIFO_TH (*) 3192 * @arg @ref LL_MDMA_REQ_JPEG_INFIFO_NF (*) 3193 * @arg @ref LL_MDMA_REQ_JPEG_OUTFIFO_TH (*) 3194 * @arg @ref LL_MDMA_REQ_JPEG_OUTFIFO_NE (*) 3195 * @arg @ref LL_MDMA_REQ_JPEG_END_CONVERSION (*) 3196 * @arg @ref LL_MDMA_REQ_QUADSPI_FIFO_TH (*) 3197 * @arg @ref LL_MDMA_REQ_QUADSPI_TC (*) 3198 * @arg @ref LL_MDMA_REQ_OCTOSPI1_FIFO_TH (*) 3199 * @arg @ref LL_MDMA_REQ_OCTOSPI1_TC (*) 3200 * @arg @ref LL_MDMA_REQ_DMA2D_CLUT_TC 3201 * @arg @ref LL_MDMA_REQ_DMA2D_TC 3202 * @arg @ref LL_MDMA_REQ_DMA2D_TW 3203 * @arg @ref LL_MDMA_REQ_DSI_TEARING_EFFECT (*) 3204 * @arg @ref LL_MDMA_REQ_DSI_END_REFRESH (*) 3205 * @arg @ref LL_MDMA_REQ_SDMMC1_END_DATA 3206 * @arg @ref LL_MDMA_REQ_SDMMC1_DMA_ENDBUFFER (*) 3207 * @arg @ref LL_MDMA_REQ_SDMMC1_COMMAND_END (*) 3208 * @arg @ref LL_MDMA_REQ_OCTOSPI2_FIFO_TH (*) 3209 * @arg @ref LL_MDMA_REQ_OCTOSPI2_TC (*) 3210 * @note (*) Availability depends on devices. 3211 * @retval None 3212 */ 3213 __STATIC_INLINE uint32_t LL_MDMA_GetHWTrigger(MDMA_TypeDef *MDMAx, uint32_t Channel) 3214 { 3215 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3216 3217 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTBR, MDMA_CTBR_TSEL)); 3218 } 3219 3220 /** 3221 * @brief Set Mask Address. 3222 * @rmtoll CMAR MAR LL_MDMA_SetMaskAddress 3223 * @param MDMAx MDMAx Instance 3224 * @param Channel This parameter can be one of the following values: 3225 * @arg @ref LL_MDMA_CHANNEL_0 3226 * @arg @ref LL_MDMA_CHANNEL_1 3227 * @arg @ref LL_MDMA_CHANNEL_2 3228 * @arg @ref LL_MDMA_CHANNEL_3 3229 * @arg @ref LL_MDMA_CHANNEL_4 3230 * @arg @ref LL_MDMA_CHANNEL_5 3231 * @arg @ref LL_MDMA_CHANNEL_6 3232 * @arg @ref LL_MDMA_CHANNEL_7 3233 * @arg @ref LL_MDMA_CHANNEL_8 3234 * @arg @ref LL_MDMA_CHANNEL_9 3235 * @arg @ref LL_MDMA_CHANNEL_10 3236 * @arg @ref LL_MDMA_CHANNEL_11 3237 * @arg @ref LL_MDMA_CHANNEL_12 3238 * @arg @ref LL_MDMA_CHANNEL_13 3239 * @arg @ref LL_MDMA_CHANNEL_14 3240 * @arg @ref LL_MDMA_CHANNEL_15 3241 * @param MaskAddress Between 0 to 0xFFFFFFFF 3242 * @retval None 3243 */ 3244 __STATIC_INLINE void LL_MDMA_SetMaskAddress(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t MaskAddress) 3245 { 3246 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3247 3248 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CMAR, MaskAddress); 3249 } 3250 3251 /** 3252 * @brief Get Mask Address. 3253 * @rmtoll CMAR MAR LL_MDMA_GetMaskAddress 3254 * @param MDMAx MDMAx Instance 3255 * @param Channel This parameter can be one of the following values: 3256 * @arg @ref LL_MDMA_CHANNEL_0 3257 * @arg @ref LL_MDMA_CHANNEL_1 3258 * @arg @ref LL_MDMA_CHANNEL_2 3259 * @arg @ref LL_MDMA_CHANNEL_3 3260 * @arg @ref LL_MDMA_CHANNEL_4 3261 * @arg @ref LL_MDMA_CHANNEL_5 3262 * @arg @ref LL_MDMA_CHANNEL_6 3263 * @arg @ref LL_MDMA_CHANNEL_7 3264 * @arg @ref LL_MDMA_CHANNEL_8 3265 * @arg @ref LL_MDMA_CHANNEL_9 3266 * @arg @ref LL_MDMA_CHANNEL_10 3267 * @arg @ref LL_MDMA_CHANNEL_11 3268 * @arg @ref LL_MDMA_CHANNEL_12 3269 * @arg @ref LL_MDMA_CHANNEL_13 3270 * @arg @ref LL_MDMA_CHANNEL_14 3271 * @arg @ref LL_MDMA_CHANNEL_15 3272 * @retval Between 0 to 0xFFFFFFFF 3273 * @retval None 3274 */ 3275 __STATIC_INLINE uint32_t LL_MDMA_GetMaskAddress(MDMA_TypeDef *MDMAx, uint32_t Channel) 3276 { 3277 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3278 3279 return (READ_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CMAR)); 3280 } 3281 3282 /** 3283 * @brief Set Mask Data. 3284 * @rmtoll CMDR MDR LL_MDMA_SetMaskData 3285 * @param MDMAx MDMAx Instance 3286 * @param Channel This parameter can be one of the following values: 3287 * @arg @ref LL_MDMA_CHANNEL_0 3288 * @arg @ref LL_MDMA_CHANNEL_1 3289 * @arg @ref LL_MDMA_CHANNEL_2 3290 * @arg @ref LL_MDMA_CHANNEL_3 3291 * @arg @ref LL_MDMA_CHANNEL_4 3292 * @arg @ref LL_MDMA_CHANNEL_5 3293 * @arg @ref LL_MDMA_CHANNEL_6 3294 * @arg @ref LL_MDMA_CHANNEL_7 3295 * @arg @ref LL_MDMA_CHANNEL_8 3296 * @arg @ref LL_MDMA_CHANNEL_9 3297 * @arg @ref LL_MDMA_CHANNEL_10 3298 * @arg @ref LL_MDMA_CHANNEL_11 3299 * @arg @ref LL_MDMA_CHANNEL_12 3300 * @arg @ref LL_MDMA_CHANNEL_13 3301 * @arg @ref LL_MDMA_CHANNEL_14 3302 * @arg @ref LL_MDMA_CHANNEL_15 3303 * @param MaskData Between 0 to 0xFFFFFFFF 3304 * @retval None 3305 */ 3306 __STATIC_INLINE void LL_MDMA_SetMaskData(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t MaskData) 3307 { 3308 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3309 3310 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CMDR, MaskData); 3311 } 3312 3313 /** 3314 * @brief Get Mask Data. 3315 * @rmtoll CMDR MDR LL_MDMA_GetMaskData 3316 * @param MDMAx MDMAx Instance 3317 * @param Channel This parameter can be one of the following values: 3318 * @arg @ref LL_MDMA_CHANNEL_0 3319 * @arg @ref LL_MDMA_CHANNEL_1 3320 * @arg @ref LL_MDMA_CHANNEL_2 3321 * @arg @ref LL_MDMA_CHANNEL_3 3322 * @arg @ref LL_MDMA_CHANNEL_4 3323 * @arg @ref LL_MDMA_CHANNEL_5 3324 * @arg @ref LL_MDMA_CHANNEL_6 3325 * @arg @ref LL_MDMA_CHANNEL_7 3326 * @arg @ref LL_MDMA_CHANNEL_8 3327 * @arg @ref LL_MDMA_CHANNEL_9 3328 * @arg @ref LL_MDMA_CHANNEL_10 3329 * @arg @ref LL_MDMA_CHANNEL_11 3330 * @arg @ref LL_MDMA_CHANNEL_12 3331 * @arg @ref LL_MDMA_CHANNEL_13 3332 * @arg @ref LL_MDMA_CHANNEL_14 3333 * @arg @ref LL_MDMA_CHANNEL_15 3334 * @retval Between 0 to 0xFFFFFFFF 3335 * @retval None 3336 */ 3337 __STATIC_INLINE uint32_t LL_MDMA_GetMaskData(MDMA_TypeDef *MDMAx, uint32_t Channel) 3338 { 3339 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3340 3341 return (READ_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CMDR)); 3342 } 3343 3344 /** 3345 * @brief Get Transfer Error Direction. 3346 * @rmtoll CESR TED LL_MDMA_GetXferErrorDirection 3347 * @param MDMAx MDMAx Instance 3348 * @param Channel This parameter can be one of the following values: 3349 * @arg @ref LL_MDMA_CHANNEL_0 3350 * @arg @ref LL_MDMA_CHANNEL_1 3351 * @arg @ref LL_MDMA_CHANNEL_2 3352 * @arg @ref LL_MDMA_CHANNEL_3 3353 * @arg @ref LL_MDMA_CHANNEL_4 3354 * @arg @ref LL_MDMA_CHANNEL_5 3355 * @arg @ref LL_MDMA_CHANNEL_6 3356 * @arg @ref LL_MDMA_CHANNEL_7 3357 * @arg @ref LL_MDMA_CHANNEL_8 3358 * @arg @ref LL_MDMA_CHANNEL_9 3359 * @arg @ref LL_MDMA_CHANNEL_10 3360 * @arg @ref LL_MDMA_CHANNEL_11 3361 * @arg @ref LL_MDMA_CHANNEL_12 3362 * @arg @ref LL_MDMA_CHANNEL_13 3363 * @arg @ref LL_MDMA_CHANNEL_14 3364 * @arg @ref LL_MDMA_CHANNEL_15 3365 * @retval Returned value can be one of the following values: 3366 * @arg @ref LL_MDMA_READ_ERROR 3367 * @arg @ref LL_MDMA_WRITE_ERROR 3368 * @retval None 3369 */ 3370 __STATIC_INLINE uint32_t LL_MDMA_GetXferErrorDirection(MDMA_TypeDef *MDMAx, uint32_t Channel) 3371 { 3372 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3373 3374 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CESR, MDMA_CESR_TED)); 3375 } 3376 3377 /** 3378 * @brief Get Transfer Error LSB Address. 3379 * @rmtoll CESR TEA LL_MDMA_GetXferErrorLSBAddress 3380 * @param MDMAx MDMAx Instance 3381 * @param Channel This parameter can be one of the following values: 3382 * @arg @ref LL_MDMA_CHANNEL_0 3383 * @arg @ref LL_MDMA_CHANNEL_1 3384 * @arg @ref LL_MDMA_CHANNEL_2 3385 * @arg @ref LL_MDMA_CHANNEL_3 3386 * @arg @ref LL_MDMA_CHANNEL_4 3387 * @arg @ref LL_MDMA_CHANNEL_5 3388 * @arg @ref LL_MDMA_CHANNEL_6 3389 * @arg @ref LL_MDMA_CHANNEL_7 3390 * @arg @ref LL_MDMA_CHANNEL_8 3391 * @arg @ref LL_MDMA_CHANNEL_9 3392 * @arg @ref LL_MDMA_CHANNEL_10 3393 * @arg @ref LL_MDMA_CHANNEL_11 3394 * @arg @ref LL_MDMA_CHANNEL_12 3395 * @arg @ref LL_MDMA_CHANNEL_13 3396 * @arg @ref LL_MDMA_CHANNEL_14 3397 * @arg @ref LL_MDMA_CHANNEL_15 3398 * @retval Between 0 to 0x0000007F 3399 * @retval None 3400 */ 3401 __STATIC_INLINE uint32_t LL_MDMA_GetXferErrorLSBAddress(MDMA_TypeDef *MDMAx, uint32_t Channel) 3402 { 3403 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3404 3405 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CESR, MDMA_CESR_TEA)); 3406 } 3407 3408 /** 3409 * @} 3410 */ 3411 3412 /** @defgroup MDMA_LL_EF_FLAG_Management FLAG_Management 3413 * @ingroup RTEMSBSPsARMSTM32H7 3414 * @{ 3415 */ 3416 3417 /** 3418 * @brief Get MDMA Channel x Global Interrupt flag. 3419 * @rmtoll GISR0 GIFx LL_MDMA_IsActiveFlag_GI 3420 * @param MDMAx MDMAx Instance 3421 * @param Channel This parameter can be one of the following values: 3422 * @arg @ref LL_MDMA_CHANNEL_0 3423 * @arg @ref LL_MDMA_CHANNEL_1 3424 * @arg @ref LL_MDMA_CHANNEL_2 3425 * @arg @ref LL_MDMA_CHANNEL_3 3426 * @arg @ref LL_MDMA_CHANNEL_4 3427 * @arg @ref LL_MDMA_CHANNEL_5 3428 * @arg @ref LL_MDMA_CHANNEL_6 3429 * @arg @ref LL_MDMA_CHANNEL_7 3430 * @arg @ref LL_MDMA_CHANNEL_8 3431 * @arg @ref LL_MDMA_CHANNEL_9 3432 * @arg @ref LL_MDMA_CHANNEL_10 3433 * @arg @ref LL_MDMA_CHANNEL_11 3434 * @arg @ref LL_MDMA_CHANNEL_12 3435 * @arg @ref LL_MDMA_CHANNEL_13 3436 * @arg @ref LL_MDMA_CHANNEL_14 3437 * @arg @ref LL_MDMA_CHANNEL_15 3438 * @retval State of bit (1 or 0). 3439 */ 3440 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_GI(MDMA_TypeDef *MDMAx, uint32_t Channel) 3441 { 3442 return ((READ_BIT(MDMAx->GISR0 ,(MDMA_GISR0_GIF0 << (Channel & 0x0000000FU)))==(MDMA_GISR0_GIF0 << (Channel & 0x0000000FU))) ? 1UL : 0UL); 3443 } 3444 3445 /** 3446 * @brief Get MDMA Channel x Transfer Error interrupt flag. 3447 * @rmtoll CISR TEIF LL_MDMA_IsActiveFlag_TE 3448 * @param MDMAx MDMAx Instance 3449 * @param Channel This parameter can be one of the following values: 3450 * @arg @ref LL_MDMA_CHANNEL_0 3451 * @arg @ref LL_MDMA_CHANNEL_1 3452 * @arg @ref LL_MDMA_CHANNEL_2 3453 * @arg @ref LL_MDMA_CHANNEL_3 3454 * @arg @ref LL_MDMA_CHANNEL_4 3455 * @arg @ref LL_MDMA_CHANNEL_5 3456 * @arg @ref LL_MDMA_CHANNEL_6 3457 * @arg @ref LL_MDMA_CHANNEL_7 3458 * @arg @ref LL_MDMA_CHANNEL_8 3459 * @arg @ref LL_MDMA_CHANNEL_9 3460 * @arg @ref LL_MDMA_CHANNEL_10 3461 * @arg @ref LL_MDMA_CHANNEL_11 3462 * @arg @ref LL_MDMA_CHANNEL_12 3463 * @arg @ref LL_MDMA_CHANNEL_13 3464 * @arg @ref LL_MDMA_CHANNEL_14 3465 * @arg @ref LL_MDMA_CHANNEL_15 3466 * @retval State of bit (1 or 0). 3467 */ 3468 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_TE(MDMA_TypeDef *MDMAx, uint32_t Channel) 3469 { 3470 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3471 3472 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CISR, MDMA_CISR_TEIF) == (MDMA_CISR_TEIF)) ? 1UL : 0UL); 3473 } 3474 3475 /** 3476 * @brief Get MDMA Channel x Channel Transfer Complete interrupt flag. 3477 * @rmtoll CISR CTCIF LL_MDMA_IsActiveFlag_CTC 3478 * @param MDMAx MDMAx Instance 3479 * @param Channel This parameter can be one of the following values: 3480 * @arg @ref LL_MDMA_CHANNEL_0 3481 * @arg @ref LL_MDMA_CHANNEL_1 3482 * @arg @ref LL_MDMA_CHANNEL_2 3483 * @arg @ref LL_MDMA_CHANNEL_3 3484 * @arg @ref LL_MDMA_CHANNEL_4 3485 * @arg @ref LL_MDMA_CHANNEL_5 3486 * @arg @ref LL_MDMA_CHANNEL_6 3487 * @arg @ref LL_MDMA_CHANNEL_7 3488 * @arg @ref LL_MDMA_CHANNEL_8 3489 * @arg @ref LL_MDMA_CHANNEL_9 3490 * @arg @ref LL_MDMA_CHANNEL_10 3491 * @arg @ref LL_MDMA_CHANNEL_11 3492 * @arg @ref LL_MDMA_CHANNEL_12 3493 * @arg @ref LL_MDMA_CHANNEL_13 3494 * @arg @ref LL_MDMA_CHANNEL_14 3495 * @arg @ref LL_MDMA_CHANNEL_15 3496 * @retval State of bit (1 or 0). 3497 */ 3498 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_CTC(MDMA_TypeDef *MDMAx, uint32_t Channel) 3499 { 3500 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3501 3502 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CISR, MDMA_CISR_CTCIF) == (MDMA_CISR_CTCIF)) ? 1UL : 0UL); 3503 } 3504 3505 /** 3506 * @brief Get MDMA Channel x Block Repeat Transfer complete interrupt flag. 3507 * @rmtoll CISR BRTIF LL_MDMA_IsActiveFlag_BRT 3508 * @param MDMAx MDMAx Instance 3509 * @param Channel This parameter can be one of the following values: 3510 * @arg @ref LL_MDMA_CHANNEL_0 3511 * @arg @ref LL_MDMA_CHANNEL_1 3512 * @arg @ref LL_MDMA_CHANNEL_2 3513 * @arg @ref LL_MDMA_CHANNEL_3 3514 * @arg @ref LL_MDMA_CHANNEL_4 3515 * @arg @ref LL_MDMA_CHANNEL_5 3516 * @arg @ref LL_MDMA_CHANNEL_6 3517 * @arg @ref LL_MDMA_CHANNEL_7 3518 * @arg @ref LL_MDMA_CHANNEL_8 3519 * @arg @ref LL_MDMA_CHANNEL_9 3520 * @arg @ref LL_MDMA_CHANNEL_10 3521 * @arg @ref LL_MDMA_CHANNEL_11 3522 * @arg @ref LL_MDMA_CHANNEL_12 3523 * @arg @ref LL_MDMA_CHANNEL_13 3524 * @arg @ref LL_MDMA_CHANNEL_14 3525 * @arg @ref LL_MDMA_CHANNEL_15 3526 * @retval State of bit (1 or 0). 3527 */ 3528 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_BRT(MDMA_TypeDef *MDMAx, uint32_t Channel) 3529 { 3530 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3531 3532 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CISR, MDMA_CISR_BRTIF) == (MDMA_CISR_BRTIF)) ? 1UL : 0UL); 3533 } 3534 3535 /** 3536 * @brief Get MDMA Channel x Block Transfer complete interrupt flag. 3537 * @rmtoll CISR BTIF LL_MDMA_IsActiveFlag_BT 3538 * @param MDMAx MDMAx Instance 3539 * @param Channel This parameter can be one of the following values: 3540 * @arg @ref LL_MDMA_CHANNEL_0 3541 * @arg @ref LL_MDMA_CHANNEL_1 3542 * @arg @ref LL_MDMA_CHANNEL_2 3543 * @arg @ref LL_MDMA_CHANNEL_3 3544 * @arg @ref LL_MDMA_CHANNEL_4 3545 * @arg @ref LL_MDMA_CHANNEL_5 3546 * @arg @ref LL_MDMA_CHANNEL_6 3547 * @arg @ref LL_MDMA_CHANNEL_7 3548 * @arg @ref LL_MDMA_CHANNEL_8 3549 * @arg @ref LL_MDMA_CHANNEL_9 3550 * @arg @ref LL_MDMA_CHANNEL_10 3551 * @arg @ref LL_MDMA_CHANNEL_11 3552 * @arg @ref LL_MDMA_CHANNEL_12 3553 * @arg @ref LL_MDMA_CHANNEL_13 3554 * @arg @ref LL_MDMA_CHANNEL_14 3555 * @arg @ref LL_MDMA_CHANNEL_15 3556 * @retval State of bit (1 or 0). 3557 */ 3558 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_BT(MDMA_TypeDef *MDMAx, uint32_t Channel) 3559 { 3560 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3561 3562 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CISR, MDMA_CISR_BTIF) == (MDMA_CISR_BTIF)) ? 1UL : 0UL); 3563 } 3564 3565 /** 3566 * @brief Get MDMA Channel x buffer transfer complete interrupt flag. 3567 * @rmtoll CISR TCIF LL_MDMA_IsActiveFlag_TC 3568 * @param MDMAx MDMAx Instance 3569 * @param Channel This parameter can be one of the following values: 3570 * @arg @ref LL_MDMA_CHANNEL_0 3571 * @arg @ref LL_MDMA_CHANNEL_1 3572 * @arg @ref LL_MDMA_CHANNEL_2 3573 * @arg @ref LL_MDMA_CHANNEL_3 3574 * @arg @ref LL_MDMA_CHANNEL_4 3575 * @arg @ref LL_MDMA_CHANNEL_5 3576 * @arg @ref LL_MDMA_CHANNEL_6 3577 * @arg @ref LL_MDMA_CHANNEL_7 3578 * @arg @ref LL_MDMA_CHANNEL_8 3579 * @arg @ref LL_MDMA_CHANNEL_9 3580 * @arg @ref LL_MDMA_CHANNEL_10 3581 * @arg @ref LL_MDMA_CHANNEL_11 3582 * @arg @ref LL_MDMA_CHANNEL_12 3583 * @arg @ref LL_MDMA_CHANNEL_13 3584 * @arg @ref LL_MDMA_CHANNEL_14 3585 * @arg @ref LL_MDMA_CHANNEL_15 3586 * @retval State of bit (1 or 0). 3587 */ 3588 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_TC(MDMA_TypeDef *MDMAx, uint32_t Channel) 3589 { 3590 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3591 3592 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CISR, MDMA_CISR_TCIF) == (MDMA_CISR_TCIF)) ? 1UL : 0UL); 3593 } 3594 3595 /** 3596 * @brief Get MDMA Channel x ReQuest Active flag. 3597 * @rmtoll CISR CRQA LL_MDMA_IsActiveFlag_CRQA 3598 * @param MDMAx MDMAx Instance 3599 * @param Channel This parameter can be one of the following values: 3600 * @arg @ref LL_MDMA_CHANNEL_0 3601 * @arg @ref LL_MDMA_CHANNEL_1 3602 * @arg @ref LL_MDMA_CHANNEL_2 3603 * @arg @ref LL_MDMA_CHANNEL_3 3604 * @arg @ref LL_MDMA_CHANNEL_4 3605 * @arg @ref LL_MDMA_CHANNEL_5 3606 * @arg @ref LL_MDMA_CHANNEL_6 3607 * @arg @ref LL_MDMA_CHANNEL_7 3608 * @arg @ref LL_MDMA_CHANNEL_8 3609 * @arg @ref LL_MDMA_CHANNEL_9 3610 * @arg @ref LL_MDMA_CHANNEL_10 3611 * @arg @ref LL_MDMA_CHANNEL_11 3612 * @arg @ref LL_MDMA_CHANNEL_12 3613 * @arg @ref LL_MDMA_CHANNEL_13 3614 * @arg @ref LL_MDMA_CHANNEL_14 3615 * @arg @ref LL_MDMA_CHANNEL_15 3616 * @retval State of bit (1 or 0). 3617 */ 3618 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_CRQA(MDMA_TypeDef *MDMAx, uint32_t Channel) 3619 { 3620 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3621 3622 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CISR, MDMA_CISR_CRQA) == (MDMA_CISR_CRQA)) ? 1UL : 0UL); 3623 } 3624 3625 /** 3626 * @brief Get MDMA Channel x Block Size Error flag. 3627 * @rmtoll CESR BSE LL_MDMA_IsActiveFlag_BSE 3628 * @param MDMAx MDMAx Instance 3629 * @param Channel This parameter can be one of the following values: 3630 * @arg @ref LL_MDMA_CHANNEL_0 3631 * @arg @ref LL_MDMA_CHANNEL_1 3632 * @arg @ref LL_MDMA_CHANNEL_2 3633 * @arg @ref LL_MDMA_CHANNEL_3 3634 * @arg @ref LL_MDMA_CHANNEL_4 3635 * @arg @ref LL_MDMA_CHANNEL_5 3636 * @arg @ref LL_MDMA_CHANNEL_6 3637 * @arg @ref LL_MDMA_CHANNEL_7 3638 * @arg @ref LL_MDMA_CHANNEL_8 3639 * @arg @ref LL_MDMA_CHANNEL_9 3640 * @arg @ref LL_MDMA_CHANNEL_10 3641 * @arg @ref LL_MDMA_CHANNEL_11 3642 * @arg @ref LL_MDMA_CHANNEL_12 3643 * @arg @ref LL_MDMA_CHANNEL_13 3644 * @arg @ref LL_MDMA_CHANNEL_14 3645 * @arg @ref LL_MDMA_CHANNEL_15 3646 * @retval State of bit (1 or 0). 3647 */ 3648 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_BSE(MDMA_TypeDef *MDMAx, uint32_t Channel) 3649 { 3650 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3651 3652 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CESR, MDMA_CESR_BSE) == (MDMA_CESR_BSE)) ? 1UL : 0UL); 3653 } 3654 3655 /** 3656 * @brief Get MDMA Channel x Address/Size Error flag. 3657 * @rmtoll CESR ASE LL_MDMA_IsActiveFlag_ASE 3658 * @param MDMAx MDMAx Instance 3659 * @param Channel This parameter can be one of the following values: 3660 * @arg @ref LL_MDMA_CHANNEL_0 3661 * @arg @ref LL_MDMA_CHANNEL_1 3662 * @arg @ref LL_MDMA_CHANNEL_2 3663 * @arg @ref LL_MDMA_CHANNEL_3 3664 * @arg @ref LL_MDMA_CHANNEL_4 3665 * @arg @ref LL_MDMA_CHANNEL_5 3666 * @arg @ref LL_MDMA_CHANNEL_6 3667 * @arg @ref LL_MDMA_CHANNEL_7 3668 * @arg @ref LL_MDMA_CHANNEL_8 3669 * @arg @ref LL_MDMA_CHANNEL_9 3670 * @arg @ref LL_MDMA_CHANNEL_10 3671 * @arg @ref LL_MDMA_CHANNEL_11 3672 * @arg @ref LL_MDMA_CHANNEL_12 3673 * @arg @ref LL_MDMA_CHANNEL_13 3674 * @arg @ref LL_MDMA_CHANNEL_14 3675 * @arg @ref LL_MDMA_CHANNEL_15 3676 * @retval State of bit (1 or 0). 3677 */ 3678 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_ASE(MDMA_TypeDef *MDMAx, uint32_t Channel) 3679 { 3680 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3681 3682 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CESR, MDMA_CESR_ASE) == (MDMA_CESR_ASE)) ? 1UL : 0UL); 3683 } 3684 3685 /** 3686 * @brief Get MDMA Channel x Transfer Error Mask Data flag. 3687 * @rmtoll CESR TEMD LL_MDMA_IsActiveFlag_TEMD 3688 * @param MDMAx MDMAx Instance 3689 * @param Channel This parameter can be one of the following values: 3690 * @arg @ref LL_MDMA_CHANNEL_0 3691 * @arg @ref LL_MDMA_CHANNEL_1 3692 * @arg @ref LL_MDMA_CHANNEL_2 3693 * @arg @ref LL_MDMA_CHANNEL_3 3694 * @arg @ref LL_MDMA_CHANNEL_4 3695 * @arg @ref LL_MDMA_CHANNEL_5 3696 * @arg @ref LL_MDMA_CHANNEL_6 3697 * @arg @ref LL_MDMA_CHANNEL_7 3698 * @arg @ref LL_MDMA_CHANNEL_8 3699 * @arg @ref LL_MDMA_CHANNEL_9 3700 * @arg @ref LL_MDMA_CHANNEL_10 3701 * @arg @ref LL_MDMA_CHANNEL_11 3702 * @arg @ref LL_MDMA_CHANNEL_12 3703 * @arg @ref LL_MDMA_CHANNEL_13 3704 * @arg @ref LL_MDMA_CHANNEL_14 3705 * @arg @ref LL_MDMA_CHANNEL_15 3706 * @retval State of bit (1 or 0). 3707 */ 3708 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_TEMD(MDMA_TypeDef *MDMAx, uint32_t Channel) 3709 { 3710 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3711 3712 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CESR, MDMA_CESR_TEMD) == (MDMA_CESR_TEMD)) ? 1UL : 0UL); 3713 } 3714 3715 /** 3716 * @brief Get MDMA Channel x Transfer Error Link Data flag. 3717 * @rmtoll CESR TELD LL_MDMA_IsActiveFlag_TELD 3718 * @param MDMAx MDMAx Instance 3719 * @param Channel This parameter can be one of the following values: 3720 * @arg @ref LL_MDMA_CHANNEL_0 3721 * @arg @ref LL_MDMA_CHANNEL_1 3722 * @arg @ref LL_MDMA_CHANNEL_2 3723 * @arg @ref LL_MDMA_CHANNEL_3 3724 * @arg @ref LL_MDMA_CHANNEL_4 3725 * @arg @ref LL_MDMA_CHANNEL_5 3726 * @arg @ref LL_MDMA_CHANNEL_6 3727 * @arg @ref LL_MDMA_CHANNEL_7 3728 * @arg @ref LL_MDMA_CHANNEL_8 3729 * @arg @ref LL_MDMA_CHANNEL_9 3730 * @arg @ref LL_MDMA_CHANNEL_10 3731 * @arg @ref LL_MDMA_CHANNEL_11 3732 * @arg @ref LL_MDMA_CHANNEL_12 3733 * @arg @ref LL_MDMA_CHANNEL_13 3734 * @arg @ref LL_MDMA_CHANNEL_14 3735 * @arg @ref LL_MDMA_CHANNEL_15 3736 * @retval State of bit (1 or 0). 3737 */ 3738 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_TELD(MDMA_TypeDef *MDMAx, uint32_t Channel) 3739 { 3740 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3741 3742 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CESR, MDMA_CESR_TELD) == (MDMA_CESR_TELD)) ? 1UL : 0UL); 3743 } 3744 3745 /** 3746 * @brief Clear MDMA Channel x Transfer Error interrupt flag. 3747 * @rmtoll CIFCR CTEIF LL_MDMA_ClearFlag_TE 3748 * @param MDMAx MDMAx Instance 3749 * @param Channel This parameter can be one of the following values: 3750 * @arg @ref LL_MDMA_CHANNEL_0 3751 * @arg @ref LL_MDMA_CHANNEL_1 3752 * @arg @ref LL_MDMA_CHANNEL_2 3753 * @arg @ref LL_MDMA_CHANNEL_3 3754 * @arg @ref LL_MDMA_CHANNEL_4 3755 * @arg @ref LL_MDMA_CHANNEL_5 3756 * @arg @ref LL_MDMA_CHANNEL_6 3757 * @arg @ref LL_MDMA_CHANNEL_7 3758 * @arg @ref LL_MDMA_CHANNEL_8 3759 * @arg @ref LL_MDMA_CHANNEL_9 3760 * @arg @ref LL_MDMA_CHANNEL_10 3761 * @arg @ref LL_MDMA_CHANNEL_11 3762 * @arg @ref LL_MDMA_CHANNEL_12 3763 * @arg @ref LL_MDMA_CHANNEL_13 3764 * @arg @ref LL_MDMA_CHANNEL_14 3765 * @arg @ref LL_MDMA_CHANNEL_15 3766 * @retval None 3767 */ 3768 __STATIC_INLINE void LL_MDMA_ClearFlag_TE(MDMA_TypeDef *MDMAx, uint32_t Channel) 3769 { 3770 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3771 3772 WRITE_REG(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CIFCR ,MDMA_CIFCR_CTEIF); 3773 } 3774 3775 /** 3776 * @brief Clear MDMA Channel x Channel Transfer Complete interrupt flag. 3777 * @rmtoll CIFCR CCTCIF LL_MDMA_ClearFlag_CTC 3778 * @param MDMAx MDMAx Instance 3779 * @param Channel This parameter can be one of the following values: 3780 * @arg @ref LL_MDMA_CHANNEL_0 3781 * @arg @ref LL_MDMA_CHANNEL_1 3782 * @arg @ref LL_MDMA_CHANNEL_2 3783 * @arg @ref LL_MDMA_CHANNEL_3 3784 * @arg @ref LL_MDMA_CHANNEL_4 3785 * @arg @ref LL_MDMA_CHANNEL_5 3786 * @arg @ref LL_MDMA_CHANNEL_6 3787 * @arg @ref LL_MDMA_CHANNEL_7 3788 * @arg @ref LL_MDMA_CHANNEL_8 3789 * @arg @ref LL_MDMA_CHANNEL_9 3790 * @arg @ref LL_MDMA_CHANNEL_10 3791 * @arg @ref LL_MDMA_CHANNEL_11 3792 * @arg @ref LL_MDMA_CHANNEL_12 3793 * @arg @ref LL_MDMA_CHANNEL_13 3794 * @arg @ref LL_MDMA_CHANNEL_14 3795 * @arg @ref LL_MDMA_CHANNEL_15 3796 * @retval None 3797 */ 3798 __STATIC_INLINE void LL_MDMA_ClearFlag_CTC(MDMA_TypeDef *MDMAx, uint32_t Channel) 3799 { 3800 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3801 3802 WRITE_REG(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CIFCR ,MDMA_CIFCR_CCTCIF); 3803 } 3804 3805 /** 3806 * @brief Clear MDMA Channel x Block Repeat Transfer complete interrupt flag. 3807 * @rmtoll CIFCR CBRTIF LL_MDMA_ClearFlag_BRT 3808 * @param MDMAx MDMAx Instance 3809 * @param Channel This parameter can be one of the following values: 3810 * @arg @ref LL_MDMA_CHANNEL_0 3811 * @arg @ref LL_MDMA_CHANNEL_1 3812 * @arg @ref LL_MDMA_CHANNEL_2 3813 * @arg @ref LL_MDMA_CHANNEL_3 3814 * @arg @ref LL_MDMA_CHANNEL_4 3815 * @arg @ref LL_MDMA_CHANNEL_5 3816 * @arg @ref LL_MDMA_CHANNEL_6 3817 * @arg @ref LL_MDMA_CHANNEL_7 3818 * @arg @ref LL_MDMA_CHANNEL_8 3819 * @arg @ref LL_MDMA_CHANNEL_9 3820 * @arg @ref LL_MDMA_CHANNEL_10 3821 * @arg @ref LL_MDMA_CHANNEL_11 3822 * @arg @ref LL_MDMA_CHANNEL_12 3823 * @arg @ref LL_MDMA_CHANNEL_13 3824 * @arg @ref LL_MDMA_CHANNEL_14 3825 * @arg @ref LL_MDMA_CHANNEL_15 3826 * @retval None 3827 */ 3828 __STATIC_INLINE void LL_MDMA_ClearFlag_BRT(MDMA_TypeDef *MDMAx, uint32_t Channel) 3829 { 3830 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3831 3832 WRITE_REG(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CIFCR ,MDMA_CIFCR_CBRTIF); 3833 } 3834 3835 /** 3836 * @brief Clear MDMA Channel x Block Transfer complete interrupt flag. 3837 * @rmtoll CIFCR CBTIF LL_MDMA_ClearFlag_BT 3838 * @param MDMAx MDMAx Instance 3839 * @param Channel This parameter can be one of the following values: 3840 * @arg @ref LL_MDMA_CHANNEL_0 3841 * @arg @ref LL_MDMA_CHANNEL_1 3842 * @arg @ref LL_MDMA_CHANNEL_2 3843 * @arg @ref LL_MDMA_CHANNEL_3 3844 * @arg @ref LL_MDMA_CHANNEL_4 3845 * @arg @ref LL_MDMA_CHANNEL_5 3846 * @arg @ref LL_MDMA_CHANNEL_6 3847 * @arg @ref LL_MDMA_CHANNEL_7 3848 * @arg @ref LL_MDMA_CHANNEL_8 3849 * @arg @ref LL_MDMA_CHANNEL_9 3850 * @arg @ref LL_MDMA_CHANNEL_10 3851 * @arg @ref LL_MDMA_CHANNEL_11 3852 * @arg @ref LL_MDMA_CHANNEL_12 3853 * @arg @ref LL_MDMA_CHANNEL_13 3854 * @arg @ref LL_MDMA_CHANNEL_14 3855 * @arg @ref LL_MDMA_CHANNEL_15 3856 * @retval None 3857 */ 3858 __STATIC_INLINE void LL_MDMA_ClearFlag_BT(MDMA_TypeDef *MDMAx, uint32_t Channel) 3859 { 3860 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3861 3862 WRITE_REG(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CIFCR ,MDMA_CIFCR_CBTIF); 3863 } 3864 3865 /** 3866 * @brief Clear MDMA Channel x buffer transfer Complete Interrupt Flag. 3867 * @rmtoll CIFCR CLTCIF LL_MDMA_ClearFlag_TC 3868 * @param MDMAx MDMAx Instance 3869 * @param Channel This parameter can be one of the following values: 3870 * @arg @ref LL_MDMA_CHANNEL_0 3871 * @arg @ref LL_MDMA_CHANNEL_1 3872 * @arg @ref LL_MDMA_CHANNEL_2 3873 * @arg @ref LL_MDMA_CHANNEL_3 3874 * @arg @ref LL_MDMA_CHANNEL_4 3875 * @arg @ref LL_MDMA_CHANNEL_5 3876 * @arg @ref LL_MDMA_CHANNEL_6 3877 * @arg @ref LL_MDMA_CHANNEL_7 3878 * @arg @ref LL_MDMA_CHANNEL_8 3879 * @arg @ref LL_MDMA_CHANNEL_9 3880 * @arg @ref LL_MDMA_CHANNEL_10 3881 * @arg @ref LL_MDMA_CHANNEL_11 3882 * @arg @ref LL_MDMA_CHANNEL_12 3883 * @arg @ref LL_MDMA_CHANNEL_13 3884 * @arg @ref LL_MDMA_CHANNEL_14 3885 * @arg @ref LL_MDMA_CHANNEL_15 3886 * @retval None 3887 */ 3888 __STATIC_INLINE void LL_MDMA_ClearFlag_TC(MDMA_TypeDef *MDMAx, uint32_t Channel) 3889 { 3890 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3891 3892 WRITE_REG(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CIFCR ,MDMA_CIFCR_CLTCIF); 3893 } 3894 3895 /** 3896 * @} 3897 */ 3898 3899 /** @defgroup MDMA_LL_EF_IT_Management IT_Management 3900 * @ingroup RTEMSBSPsARMSTM32H7 3901 * @{ 3902 */ 3903 3904 /** 3905 * @brief Enable MDMA Channel x Transfer Error interrupt. 3906 * @rmtoll CCR TEIE LL_MDMA_EnableIT_TE 3907 * @param MDMAx MDMAx Instance 3908 * @param Channel This parameter can be one of the following values: 3909 * @arg @ref LL_MDMA_CHANNEL_0 3910 * @arg @ref LL_MDMA_CHANNEL_1 3911 * @arg @ref LL_MDMA_CHANNEL_2 3912 * @arg @ref LL_MDMA_CHANNEL_3 3913 * @arg @ref LL_MDMA_CHANNEL_4 3914 * @arg @ref LL_MDMA_CHANNEL_5 3915 * @arg @ref LL_MDMA_CHANNEL_6 3916 * @arg @ref LL_MDMA_CHANNEL_7 3917 * @arg @ref LL_MDMA_CHANNEL_8 3918 * @arg @ref LL_MDMA_CHANNEL_9 3919 * @arg @ref LL_MDMA_CHANNEL_10 3920 * @arg @ref LL_MDMA_CHANNEL_11 3921 * @arg @ref LL_MDMA_CHANNEL_12 3922 * @arg @ref LL_MDMA_CHANNEL_13 3923 * @arg @ref LL_MDMA_CHANNEL_14 3924 * @arg @ref LL_MDMA_CHANNEL_15 3925 * @retval None 3926 */ 3927 __STATIC_INLINE void LL_MDMA_EnableIT_TE(MDMA_TypeDef *MDMAx, uint32_t Channel) 3928 { 3929 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3930 3931 SET_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_TEIE); 3932 } 3933 3934 /** 3935 * @brief Enable MDMA Channel x Channel Transfer Complete interrupt. 3936 * @rmtoll CCR CTCIE LL_MDMA_EnableIT_CTC 3937 * @param MDMAx MDMAx Instance 3938 * @param Channel This parameter can be one of the following values: 3939 * @arg @ref LL_MDMA_CHANNEL_0 3940 * @arg @ref LL_MDMA_CHANNEL_1 3941 * @arg @ref LL_MDMA_CHANNEL_2 3942 * @arg @ref LL_MDMA_CHANNEL_3 3943 * @arg @ref LL_MDMA_CHANNEL_4 3944 * @arg @ref LL_MDMA_CHANNEL_5 3945 * @arg @ref LL_MDMA_CHANNEL_6 3946 * @arg @ref LL_MDMA_CHANNEL_7 3947 * @arg @ref LL_MDMA_CHANNEL_8 3948 * @arg @ref LL_MDMA_CHANNEL_9 3949 * @arg @ref LL_MDMA_CHANNEL_10 3950 * @arg @ref LL_MDMA_CHANNEL_11 3951 * @arg @ref LL_MDMA_CHANNEL_12 3952 * @arg @ref LL_MDMA_CHANNEL_13 3953 * @arg @ref LL_MDMA_CHANNEL_14 3954 * @arg @ref LL_MDMA_CHANNEL_15 3955 * @retval None 3956 */ 3957 __STATIC_INLINE void LL_MDMA_EnableIT_CTC(MDMA_TypeDef *MDMAx, uint32_t Channel) 3958 { 3959 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3960 3961 SET_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_CTCIE); 3962 } 3963 3964 /** 3965 * @brief Enable MDMA Channel x Block Repeat Transfer interrupt. 3966 * @rmtoll CCR BRTIE LL_MDMA_EnableIT_BRT 3967 * @param MDMAx MDMAx Instance 3968 * @param Channel This parameter can be one of the following values: 3969 * @arg @ref LL_MDMA_CHANNEL_0 3970 * @arg @ref LL_MDMA_CHANNEL_1 3971 * @arg @ref LL_MDMA_CHANNEL_2 3972 * @arg @ref LL_MDMA_CHANNEL_3 3973 * @arg @ref LL_MDMA_CHANNEL_4 3974 * @arg @ref LL_MDMA_CHANNEL_5 3975 * @arg @ref LL_MDMA_CHANNEL_6 3976 * @arg @ref LL_MDMA_CHANNEL_7 3977 * @arg @ref LL_MDMA_CHANNEL_8 3978 * @arg @ref LL_MDMA_CHANNEL_9 3979 * @arg @ref LL_MDMA_CHANNEL_10 3980 * @arg @ref LL_MDMA_CHANNEL_11 3981 * @arg @ref LL_MDMA_CHANNEL_12 3982 * @arg @ref LL_MDMA_CHANNEL_13 3983 * @arg @ref LL_MDMA_CHANNEL_14 3984 * @arg @ref LL_MDMA_CHANNEL_15 3985 * @retval None 3986 */ 3987 __STATIC_INLINE void LL_MDMA_EnableIT_BRT(MDMA_TypeDef *MDMAx, uint32_t Channel) 3988 { 3989 uint32_t mdma_base_addr = (uint32_t)MDMAx; 3990 3991 SET_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_BRTIE); 3992 } 3993 3994 /** 3995 * @brief Enable MDMA Channel x Block Transfer interrupt. 3996 * @rmtoll CCR BTIE LL_MDMA_EnableIT_BT 3997 * @param MDMAx MDMAx Instance 3998 * @param Channel This parameter can be one of the following values: 3999 * @arg @ref LL_MDMA_CHANNEL_0 4000 * @arg @ref LL_MDMA_CHANNEL_1 4001 * @arg @ref LL_MDMA_CHANNEL_2 4002 * @arg @ref LL_MDMA_CHANNEL_3 4003 * @arg @ref LL_MDMA_CHANNEL_4 4004 * @arg @ref LL_MDMA_CHANNEL_5 4005 * @arg @ref LL_MDMA_CHANNEL_6 4006 * @arg @ref LL_MDMA_CHANNEL_7 4007 * @arg @ref LL_MDMA_CHANNEL_8 4008 * @arg @ref LL_MDMA_CHANNEL_9 4009 * @arg @ref LL_MDMA_CHANNEL_10 4010 * @arg @ref LL_MDMA_CHANNEL_11 4011 * @arg @ref LL_MDMA_CHANNEL_12 4012 * @arg @ref LL_MDMA_CHANNEL_13 4013 * @arg @ref LL_MDMA_CHANNEL_14 4014 * @arg @ref LL_MDMA_CHANNEL_15 4015 * @retval None 4016 */ 4017 __STATIC_INLINE void LL_MDMA_EnableIT_BT(MDMA_TypeDef *MDMAx, uint32_t Channel) 4018 { 4019 uint32_t mdma_base_addr = (uint32_t)MDMAx; 4020 4021 SET_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_BTIE); 4022 } 4023 4024 /** 4025 * @brief Enable MDMA Channel x buffer transfer complete interrupt. 4026 * @rmtoll CCR TCIE LL_MDMA_EnableIT_TC 4027 * @param MDMAx MDMAx Instance 4028 * @param Channel This parameter can be one of the following values: 4029 * @arg @ref LL_MDMA_CHANNEL_0 4030 * @arg @ref LL_MDMA_CHANNEL_1 4031 * @arg @ref LL_MDMA_CHANNEL_2 4032 * @arg @ref LL_MDMA_CHANNEL_3 4033 * @arg @ref LL_MDMA_CHANNEL_4 4034 * @arg @ref LL_MDMA_CHANNEL_5 4035 * @arg @ref LL_MDMA_CHANNEL_6 4036 * @arg @ref LL_MDMA_CHANNEL_7 4037 * @arg @ref LL_MDMA_CHANNEL_8 4038 * @arg @ref LL_MDMA_CHANNEL_9 4039 * @arg @ref LL_MDMA_CHANNEL_10 4040 * @arg @ref LL_MDMA_CHANNEL_11 4041 * @arg @ref LL_MDMA_CHANNEL_12 4042 * @arg @ref LL_MDMA_CHANNEL_13 4043 * @arg @ref LL_MDMA_CHANNEL_14 4044 * @arg @ref LL_MDMA_CHANNEL_15 4045 * @retval None 4046 */ 4047 __STATIC_INLINE void LL_MDMA_EnableIT_TC(MDMA_TypeDef *MDMAx, uint32_t Channel) 4048 { 4049 uint32_t mdma_base_addr = (uint32_t)MDMAx; 4050 4051 SET_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_TCIE); 4052 } 4053 4054 /** 4055 * @brief Disable MDMA Channel x Transfer Error interrupt. 4056 * @rmtoll CCR TEIE LL_MDMA_DisableIT_TE 4057 * @param MDMAx MDMAx Instance 4058 * @param Channel This parameter can be one of the following values: 4059 * @arg @ref LL_MDMA_CHANNEL_0 4060 * @arg @ref LL_MDMA_CHANNEL_1 4061 * @arg @ref LL_MDMA_CHANNEL_2 4062 * @arg @ref LL_MDMA_CHANNEL_3 4063 * @arg @ref LL_MDMA_CHANNEL_4 4064 * @arg @ref LL_MDMA_CHANNEL_5 4065 * @arg @ref LL_MDMA_CHANNEL_6 4066 * @arg @ref LL_MDMA_CHANNEL_7 4067 * @arg @ref LL_MDMA_CHANNEL_8 4068 * @arg @ref LL_MDMA_CHANNEL_9 4069 * @arg @ref LL_MDMA_CHANNEL_10 4070 * @arg @ref LL_MDMA_CHANNEL_11 4071 * @arg @ref LL_MDMA_CHANNEL_12 4072 * @arg @ref LL_MDMA_CHANNEL_13 4073 * @arg @ref LL_MDMA_CHANNEL_14 4074 * @arg @ref LL_MDMA_CHANNEL_15 4075 * @retval None 4076 */ 4077 __STATIC_INLINE void LL_MDMA_DisableIT_TE(MDMA_TypeDef *MDMAx, uint32_t Channel) 4078 { 4079 uint32_t mdma_base_addr = (uint32_t)MDMAx; 4080 4081 CLEAR_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_TEIE); 4082 } 4083 4084 /** 4085 * @brief Disable MDMA Channel x Channel Transfer Complete interrupt. 4086 * @rmtoll CCR CTCIE LL_MDMA_DisableIT_CTC 4087 * @param MDMAx MDMAx Instance 4088 * @param Channel This parameter can be one of the following values: 4089 * @arg @ref LL_MDMA_CHANNEL_0 4090 * @arg @ref LL_MDMA_CHANNEL_1 4091 * @arg @ref LL_MDMA_CHANNEL_2 4092 * @arg @ref LL_MDMA_CHANNEL_3 4093 * @arg @ref LL_MDMA_CHANNEL_4 4094 * @arg @ref LL_MDMA_CHANNEL_5 4095 * @arg @ref LL_MDMA_CHANNEL_6 4096 * @arg @ref LL_MDMA_CHANNEL_7 4097 * @arg @ref LL_MDMA_CHANNEL_8 4098 * @arg @ref LL_MDMA_CHANNEL_9 4099 * @arg @ref LL_MDMA_CHANNEL_10 4100 * @arg @ref LL_MDMA_CHANNEL_11 4101 * @arg @ref LL_MDMA_CHANNEL_12 4102 * @arg @ref LL_MDMA_CHANNEL_13 4103 * @arg @ref LL_MDMA_CHANNEL_14 4104 * @arg @ref LL_MDMA_CHANNEL_15 4105 * @retval None 4106 */ 4107 __STATIC_INLINE void LL_MDMA_DisableIT_CTC(MDMA_TypeDef *MDMAx, uint32_t Channel) 4108 { 4109 uint32_t mdma_base_addr = (uint32_t)MDMAx; 4110 4111 CLEAR_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_CTCIE); 4112 } 4113 4114 /** 4115 * @brief Disable MDMA Channel x Block Repeat Transfer interrupt. 4116 * @rmtoll CCR BRTIE LL_MDMA_DisableIT_BRT 4117 * @param MDMAx MDMAx Instance 4118 * @param Channel This parameter can be one of the following values: 4119 * @arg @ref LL_MDMA_CHANNEL_0 4120 * @arg @ref LL_MDMA_CHANNEL_1 4121 * @arg @ref LL_MDMA_CHANNEL_2 4122 * @arg @ref LL_MDMA_CHANNEL_3 4123 * @arg @ref LL_MDMA_CHANNEL_4 4124 * @arg @ref LL_MDMA_CHANNEL_5 4125 * @arg @ref LL_MDMA_CHANNEL_6 4126 * @arg @ref LL_MDMA_CHANNEL_7 4127 * @arg @ref LL_MDMA_CHANNEL_8 4128 * @arg @ref LL_MDMA_CHANNEL_9 4129 * @arg @ref LL_MDMA_CHANNEL_10 4130 * @arg @ref LL_MDMA_CHANNEL_11 4131 * @arg @ref LL_MDMA_CHANNEL_12 4132 * @arg @ref LL_MDMA_CHANNEL_13 4133 * @arg @ref LL_MDMA_CHANNEL_14 4134 * @arg @ref LL_MDMA_CHANNEL_15 4135 * @retval None 4136 */ 4137 __STATIC_INLINE void LL_MDMA_DisableIT_BRT(MDMA_TypeDef *MDMAx, uint32_t Channel) 4138 { 4139 uint32_t mdma_base_addr = (uint32_t)MDMAx; 4140 4141 CLEAR_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_BRTIE); 4142 } 4143 4144 /** 4145 * @brief Disable MDMA Channel x Block Transfer interrupt. 4146 * @rmtoll CCR BTIE LL_MDMA_DisableIT_BT 4147 * @param MDMAx MDMAx Instance 4148 * @param Channel This parameter can be one of the following values: 4149 * @arg @ref LL_MDMA_CHANNEL_0 4150 * @arg @ref LL_MDMA_CHANNEL_1 4151 * @arg @ref LL_MDMA_CHANNEL_2 4152 * @arg @ref LL_MDMA_CHANNEL_3 4153 * @arg @ref LL_MDMA_CHANNEL_4 4154 * @arg @ref LL_MDMA_CHANNEL_5 4155 * @arg @ref LL_MDMA_CHANNEL_6 4156 * @arg @ref LL_MDMA_CHANNEL_7 4157 * @arg @ref LL_MDMA_CHANNEL_8 4158 * @arg @ref LL_MDMA_CHANNEL_9 4159 * @arg @ref LL_MDMA_CHANNEL_10 4160 * @arg @ref LL_MDMA_CHANNEL_11 4161 * @arg @ref LL_MDMA_CHANNEL_12 4162 * @arg @ref LL_MDMA_CHANNEL_13 4163 * @arg @ref LL_MDMA_CHANNEL_14 4164 * @arg @ref LL_MDMA_CHANNEL_15 4165 * @retval None 4166 */ 4167 __STATIC_INLINE void LL_MDMA_DisableIT_BT(MDMA_TypeDef *MDMAx, uint32_t Channel) 4168 { 4169 uint32_t mdma_base_addr = (uint32_t)MDMAx; 4170 4171 CLEAR_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_BTIE); 4172 } 4173 4174 /** 4175 * @brief Disable MDMA Channel x buffer transfer complete interrupt. 4176 * @rmtoll CCR TCIE LL_MDMA_DisableIT_TC 4177 * @param MDMAx MDMAx Instance 4178 * @param Channel This parameter can be one of the following values: 4179 * @arg @ref LL_MDMA_CHANNEL_0 4180 * @arg @ref LL_MDMA_CHANNEL_1 4181 * @arg @ref LL_MDMA_CHANNEL_2 4182 * @arg @ref LL_MDMA_CHANNEL_3 4183 * @arg @ref LL_MDMA_CHANNEL_4 4184 * @arg @ref LL_MDMA_CHANNEL_5 4185 * @arg @ref LL_MDMA_CHANNEL_6 4186 * @arg @ref LL_MDMA_CHANNEL_7 4187 * @arg @ref LL_MDMA_CHANNEL_8 4188 * @arg @ref LL_MDMA_CHANNEL_9 4189 * @arg @ref LL_MDMA_CHANNEL_10 4190 * @arg @ref LL_MDMA_CHANNEL_11 4191 * @arg @ref LL_MDMA_CHANNEL_12 4192 * @arg @ref LL_MDMA_CHANNEL_13 4193 * @arg @ref LL_MDMA_CHANNEL_14 4194 * @arg @ref LL_MDMA_CHANNEL_15 4195 * @retval None 4196 */ 4197 __STATIC_INLINE void LL_MDMA_DisableIT_TC(MDMA_TypeDef *MDMAx, uint32_t Channel) 4198 { 4199 uint32_t mdma_base_addr = (uint32_t)MDMAx; 4200 4201 CLEAR_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_TCIE); 4202 } 4203 4204 /** 4205 * @brief Check if MDMA Channel x Transfer Error interrupt is enabled. 4206 * @rmtoll CCR TEIE LL_MDMA_IsEnabledIT_TE 4207 * @param MDMAx MDMAx Instance 4208 * @param Channel This parameter can be one of the following values: 4209 * @arg @ref LL_MDMA_CHANNEL_0 4210 * @arg @ref LL_MDMA_CHANNEL_1 4211 * @arg @ref LL_MDMA_CHANNEL_2 4212 * @arg @ref LL_MDMA_CHANNEL_3 4213 * @arg @ref LL_MDMA_CHANNEL_4 4214 * @arg @ref LL_MDMA_CHANNEL_5 4215 * @arg @ref LL_MDMA_CHANNEL_6 4216 * @arg @ref LL_MDMA_CHANNEL_7 4217 * @arg @ref LL_MDMA_CHANNEL_8 4218 * @arg @ref LL_MDMA_CHANNEL_9 4219 * @arg @ref LL_MDMA_CHANNEL_10 4220 * @arg @ref LL_MDMA_CHANNEL_11 4221 * @arg @ref LL_MDMA_CHANNEL_12 4222 * @arg @ref LL_MDMA_CHANNEL_13 4223 * @arg @ref LL_MDMA_CHANNEL_14 4224 * @arg @ref LL_MDMA_CHANNEL_15 4225 * @retval State of bit (1 or 0). 4226 */ 4227 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledIT_TE(MDMA_TypeDef *MDMAx, uint32_t Channel) 4228 { 4229 uint32_t mdma_base_addr = (uint32_t)MDMAx; 4230 4231 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_TEIE) == MDMA_CCR_TEIE) ? 1UL : 0UL); 4232 } 4233 4234 /** 4235 * @brief Check if MDMA Channel x Channel Transfer Complete interrupt is enabled. 4236 * @rmtoll CCR CTCIE LL_MDMA_IsEnabledIT_CTC 4237 * @param MDMAx MDMAx Instance 4238 * @param Channel This parameter can be one of the following values: 4239 * @arg @ref LL_MDMA_CHANNEL_0 4240 * @arg @ref LL_MDMA_CHANNEL_1 4241 * @arg @ref LL_MDMA_CHANNEL_2 4242 * @arg @ref LL_MDMA_CHANNEL_3 4243 * @arg @ref LL_MDMA_CHANNEL_4 4244 * @arg @ref LL_MDMA_CHANNEL_5 4245 * @arg @ref LL_MDMA_CHANNEL_6 4246 * @arg @ref LL_MDMA_CHANNEL_7 4247 * @arg @ref LL_MDMA_CHANNEL_8 4248 * @arg @ref LL_MDMA_CHANNEL_9 4249 * @arg @ref LL_MDMA_CHANNEL_10 4250 * @arg @ref LL_MDMA_CHANNEL_11 4251 * @arg @ref LL_MDMA_CHANNEL_12 4252 * @arg @ref LL_MDMA_CHANNEL_13 4253 * @arg @ref LL_MDMA_CHANNEL_14 4254 * @arg @ref LL_MDMA_CHANNEL_15 4255 * @retval State of bit (1 or 0). 4256 */ 4257 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledIT_CTC(MDMA_TypeDef *MDMAx, uint32_t Channel) 4258 { 4259 uint32_t mdma_base_addr = (uint32_t)MDMAx; 4260 4261 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_CTCIE) == MDMA_CCR_CTCIE) ? 1UL : 0UL); 4262 } 4263 4264 /** 4265 * @brief Check if MDMA Channel x Block Repeat Transfer complete interrupt is enabled. 4266 * @rmtoll CCR BRTIE LL_MDMA_IsEnabledIT_BRT 4267 * @param MDMAx MDMAx Instance 4268 * @param Channel This parameter can be one of the following values: 4269 * @arg @ref LL_MDMA_CHANNEL_0 4270 * @arg @ref LL_MDMA_CHANNEL_1 4271 * @arg @ref LL_MDMA_CHANNEL_2 4272 * @arg @ref LL_MDMA_CHANNEL_3 4273 * @arg @ref LL_MDMA_CHANNEL_4 4274 * @arg @ref LL_MDMA_CHANNEL_5 4275 * @arg @ref LL_MDMA_CHANNEL_6 4276 * @arg @ref LL_MDMA_CHANNEL_7 4277 * @arg @ref LL_MDMA_CHANNEL_8 4278 * @arg @ref LL_MDMA_CHANNEL_9 4279 * @arg @ref LL_MDMA_CHANNEL_10 4280 * @arg @ref LL_MDMA_CHANNEL_11 4281 * @arg @ref LL_MDMA_CHANNEL_12 4282 * @arg @ref LL_MDMA_CHANNEL_13 4283 * @arg @ref LL_MDMA_CHANNEL_14 4284 * @arg @ref LL_MDMA_CHANNEL_15 4285 * @retval State of bit (1 or 0). 4286 */ 4287 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledIT_BRT(MDMA_TypeDef *MDMAx, uint32_t Channel) 4288 { 4289 uint32_t mdma_base_addr = (uint32_t)MDMAx; 4290 4291 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_BRTIE) == MDMA_CCR_BRTIE) ? 1UL : 0UL); 4292 } 4293 4294 /** 4295 * @brief Check if MDMA Channel x Block Transfer interrupt is enabled. 4296 * @rmtoll CCR BTIE LL_MDMA_IsEnabledIT_BT 4297 * @param MDMAx MDMAx Instance 4298 * @param Channel This parameter can be one of the following values: 4299 * @arg @ref LL_MDMA_CHANNEL_0 4300 * @arg @ref LL_MDMA_CHANNEL_1 4301 * @arg @ref LL_MDMA_CHANNEL_2 4302 * @arg @ref LL_MDMA_CHANNEL_3 4303 * @arg @ref LL_MDMA_CHANNEL_4 4304 * @arg @ref LL_MDMA_CHANNEL_5 4305 * @arg @ref LL_MDMA_CHANNEL_6 4306 * @arg @ref LL_MDMA_CHANNEL_7 4307 * @arg @ref LL_MDMA_CHANNEL_8 4308 * @arg @ref LL_MDMA_CHANNEL_9 4309 * @arg @ref LL_MDMA_CHANNEL_10 4310 * @arg @ref LL_MDMA_CHANNEL_11 4311 * @arg @ref LL_MDMA_CHANNEL_12 4312 * @arg @ref LL_MDMA_CHANNEL_13 4313 * @arg @ref LL_MDMA_CHANNEL_14 4314 * @arg @ref LL_MDMA_CHANNEL_15 4315 * @retval State of bit (1 or 0). 4316 */ 4317 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledIT_BT(MDMA_TypeDef *MDMAx, uint32_t Channel) 4318 { 4319 uint32_t mdma_base_addr = (uint32_t)MDMAx; 4320 4321 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_BTIE) == MDMA_CCR_BTIE) ? 1UL : 0UL); 4322 } 4323 4324 /** 4325 * @brief Check if MDMA Channel x buffer transfer complete interrupt is enabled. 4326 * @rmtoll CCR TCIE LL_MDMA_IsEnabledIT_TC 4327 * @param MDMAx MDMAx Instance 4328 * @param Channel This parameter can be one of the following values: 4329 * @arg @ref LL_MDMA_CHANNEL_0 4330 * @arg @ref LL_MDMA_CHANNEL_1 4331 * @arg @ref LL_MDMA_CHANNEL_2 4332 * @arg @ref LL_MDMA_CHANNEL_3 4333 * @arg @ref LL_MDMA_CHANNEL_4 4334 * @arg @ref LL_MDMA_CHANNEL_5 4335 * @arg @ref LL_MDMA_CHANNEL_6 4336 * @arg @ref LL_MDMA_CHANNEL_7 4337 * @arg @ref LL_MDMA_CHANNEL_8 4338 * @arg @ref LL_MDMA_CHANNEL_9 4339 * @arg @ref LL_MDMA_CHANNEL_10 4340 * @arg @ref LL_MDMA_CHANNEL_11 4341 * @arg @ref LL_MDMA_CHANNEL_12 4342 * @arg @ref LL_MDMA_CHANNEL_13 4343 * @arg @ref LL_MDMA_CHANNEL_14 4344 * @arg @ref LL_MDMA_CHANNEL_15 4345 * @retval State of bit (1 or 0). 4346 */ 4347 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledIT_TC(MDMA_TypeDef *MDMAx, uint32_t Channel) 4348 { 4349 uint32_t mdma_base_addr = (uint32_t)MDMAx; 4350 4351 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_TCIE) == MDMA_CCR_TCIE) ? 1UL : 0UL); 4352 } 4353 4354 /** 4355 * @} 4356 */ 4357 4358 #if defined(USE_FULL_LL_DRIVER) || defined(__rtems__) 4359 /** @defgroup MDMA_LL_EF_Init Initialization and de-initialization functions 4360 * @ingroup RTEMSBSPsARMSTM32H7 4361 * @{ 4362 */ 4363 4364 uint32_t LL_MDMA_Init(MDMA_TypeDef *MDMAx, uint32_t Channel, LL_MDMA_InitTypeDef *MDMA_InitStruct); 4365 uint32_t LL_MDMA_DeInit(MDMA_TypeDef *MDMAx, uint32_t Channel); 4366 void LL_MDMA_StructInit(LL_MDMA_InitTypeDef *MDMA_InitStruct); 4367 void LL_MDMA_CreateLinkNode(LL_MDMA_InitTypeDef *MDMA_InitStruct, LL_MDMA_LinkNodeTypeDef *pNode); 4368 void LL_MDMA_ConnectLinkNode(LL_MDMA_LinkNodeTypeDef *pPrevLinkNode, LL_MDMA_LinkNodeTypeDef *pNewLinkNode); 4369 void LL_MDMA_DisconnectNextLinkNode(LL_MDMA_LinkNodeTypeDef *pLinkNode); 4370 4371 /** 4372 * @} 4373 */ 4374 #endif /* USE_FULL_LL_DRIVER */ 4375 4376 /** 4377 * @} 4378 */ 4379 4380 /** 4381 * @} 4382 */ 4383 4384 #endif /* MDMA */ 4385 4386 /** 4387 * @} 4388 */ 4389 4390 #ifdef __cplusplus 4391 } 4392 #endif 4393 4394 #endif /* STM32H7xx_LL_MDMA_H */ 4395
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