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File indexing completed on 2025-05-11 08:23:37
0001 /** 0002 ****************************************************************************** 0003 * @file stm32h7xx_ll_iwdg.h 0004 * @author MCD Application Team 0005 * @brief Header file of IWDG LL module. 0006 ****************************************************************************** 0007 * @attention 0008 * 0009 * Copyright (c) 2017 STMicroelectronics. 0010 * All rights reserved. 0011 * 0012 * This software is licensed under terms that can be found in the LICENSE file 0013 * in the root directory of this software component. 0014 * If no LICENSE file comes with this software, it is provided AS-IS. 0015 * 0016 ****************************************************************************** 0017 */ 0018 0019 /* Define to prevent recursive inclusion -------------------------------------*/ 0020 #ifndef STM32H7xx_LL_IWDG_H 0021 #define STM32H7xx_LL_IWDG_H 0022 0023 #ifdef __cplusplus 0024 extern "C" { 0025 #endif 0026 0027 /* Includes ------------------------------------------------------------------*/ 0028 #include "stm32h7xx.h" 0029 0030 /** @addtogroup STM32H7xx_LL_Driver 0031 * @{ 0032 */ 0033 0034 #if defined(IWDG1) || defined(IWDG2) 0035 0036 /** @defgroup IWDG_LL IWDG 0037 * @ingroup RTEMSBSPsARMSTM32H7 0038 * @{ 0039 */ 0040 0041 /* Private types -------------------------------------------------------------*/ 0042 /* Private variables ---------------------------------------------------------*/ 0043 0044 /* Private constants ---------------------------------------------------------*/ 0045 /** @defgroup IWDG_LL_Private_Constants IWDG Private Constants 0046 * @ingroup RTEMSBSPsARMSTM32H7 0047 * @{ 0048 */ 0049 #define LL_IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */ 0050 #define LL_IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */ 0051 #define LL_IWDG_KEY_WR_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */ 0052 #define LL_IWDG_KEY_WR_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */ 0053 /** 0054 * @} 0055 */ 0056 0057 /* Private macros ------------------------------------------------------------*/ 0058 0059 /* Exported types ------------------------------------------------------------*/ 0060 /* Exported constants --------------------------------------------------------*/ 0061 /** @defgroup IWDG_LL_Exported_Constants IWDG Exported Constants 0062 * @ingroup RTEMSBSPsARMSTM32H7 0063 * @{ 0064 */ 0065 0066 /** @defgroup IWDG_LL_EC_GET_FLAG Get Flags Defines 0067 * @ingroup RTEMSBSPsARMSTM32H7 0068 * @brief Flags defines which can be used with LL_IWDG_ReadReg function 0069 * @{ 0070 */ 0071 #define LL_IWDG_SR_PVU IWDG_SR_PVU /*!< Watchdog prescaler value update */ 0072 #define LL_IWDG_SR_RVU IWDG_SR_RVU /*!< Watchdog counter reload value update */ 0073 #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog counter window value update */ 0074 /** 0075 * @} 0076 */ 0077 0078 /** @defgroup IWDG_LL_EC_PRESCALER Prescaler Divider 0079 * @ingroup RTEMSBSPsARMSTM32H7 0080 * @{ 0081 */ 0082 #define LL_IWDG_PRESCALER_4 0x00000000U /*!< Divider by 4 */ 0083 #define LL_IWDG_PRESCALER_8 (IWDG_PR_PR_0) /*!< Divider by 8 */ 0084 #define LL_IWDG_PRESCALER_16 (IWDG_PR_PR_1) /*!< Divider by 16 */ 0085 #define LL_IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< Divider by 32 */ 0086 #define LL_IWDG_PRESCALER_64 (IWDG_PR_PR_2) /*!< Divider by 64 */ 0087 #define LL_IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< Divider by 128 */ 0088 #define LL_IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< Divider by 256 */ 0089 /** 0090 * @} 0091 */ 0092 0093 /** 0094 * @} 0095 */ 0096 0097 /* Exported macro ------------------------------------------------------------*/ 0098 /** @defgroup IWDG_LL_Exported_Macros IWDG Exported Macros 0099 * @ingroup RTEMSBSPsARMSTM32H7 0100 * @{ 0101 */ 0102 0103 /** @defgroup IWDG_LL_EM_WRITE_READ Common Write and read registers Macros 0104 * @ingroup RTEMSBSPsARMSTM32H7 0105 * @{ 0106 */ 0107 0108 /** 0109 * @brief Write a value in IWDG register 0110 * @param __INSTANCE__ IWDG Instance 0111 * @param __REG__ Register to be written 0112 * @param __VALUE__ Value to be written in the register 0113 * @retval None 0114 */ 0115 #define LL_IWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) 0116 0117 /** 0118 * @brief Read a value in IWDG register 0119 * @param __INSTANCE__ IWDG Instance 0120 * @param __REG__ Register to be read 0121 * @retval Register value 0122 */ 0123 #define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 0124 /** 0125 * @} 0126 */ 0127 0128 /** 0129 * @} 0130 */ 0131 0132 0133 /* Exported functions --------------------------------------------------------*/ 0134 /** @defgroup IWDG_LL_Exported_Functions IWDG Exported Functions 0135 * @ingroup RTEMSBSPsARMSTM32H7 0136 * @{ 0137 */ 0138 /** @defgroup IWDG_LL_EF_Configuration Configuration 0139 * @ingroup RTEMSBSPsARMSTM32H7 0140 * @{ 0141 */ 0142 0143 /** 0144 * @brief Start the Independent Watchdog 0145 * @note Except if the hardware watchdog option is selected 0146 * @rmtoll KR KEY LL_IWDG_Enable 0147 * @param IWDGx IWDG Instance 0148 * @retval None 0149 */ 0150 __STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx) 0151 { 0152 WRITE_REG(IWDGx->KR, LL_IWDG_KEY_ENABLE); 0153 } 0154 0155 /** 0156 * @brief Reloads IWDG counter with value defined in the reload register 0157 * @rmtoll KR KEY LL_IWDG_ReloadCounter 0158 * @param IWDGx IWDG Instance 0159 * @retval None 0160 */ 0161 __STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx) 0162 { 0163 WRITE_REG(IWDGx->KR, LL_IWDG_KEY_RELOAD); 0164 } 0165 0166 /** 0167 * @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers 0168 * @rmtoll KR KEY LL_IWDG_EnableWriteAccess 0169 * @param IWDGx IWDG Instance 0170 * @retval None 0171 */ 0172 __STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx) 0173 { 0174 WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE); 0175 } 0176 0177 /** 0178 * @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers 0179 * @rmtoll KR KEY LL_IWDG_DisableWriteAccess 0180 * @param IWDGx IWDG Instance 0181 * @retval None 0182 */ 0183 __STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx) 0184 { 0185 WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE); 0186 } 0187 0188 /** 0189 * @brief Select the prescaler of the IWDG 0190 * @rmtoll PR PR LL_IWDG_SetPrescaler 0191 * @param IWDGx IWDG Instance 0192 * @param Prescaler This parameter can be one of the following values: 0193 * @arg @ref LL_IWDG_PRESCALER_4 0194 * @arg @ref LL_IWDG_PRESCALER_8 0195 * @arg @ref LL_IWDG_PRESCALER_16 0196 * @arg @ref LL_IWDG_PRESCALER_32 0197 * @arg @ref LL_IWDG_PRESCALER_64 0198 * @arg @ref LL_IWDG_PRESCALER_128 0199 * @arg @ref LL_IWDG_PRESCALER_256 0200 * @retval None 0201 */ 0202 __STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescaler) 0203 { 0204 WRITE_REG(IWDGx->PR, IWDG_PR_PR & Prescaler); 0205 } 0206 0207 /** 0208 * @brief Get the selected prescaler of the IWDG 0209 * @rmtoll PR PR LL_IWDG_GetPrescaler 0210 * @param IWDGx IWDG Instance 0211 * @retval Returned value can be one of the following values: 0212 * @arg @ref LL_IWDG_PRESCALER_4 0213 * @arg @ref LL_IWDG_PRESCALER_8 0214 * @arg @ref LL_IWDG_PRESCALER_16 0215 * @arg @ref LL_IWDG_PRESCALER_32 0216 * @arg @ref LL_IWDG_PRESCALER_64 0217 * @arg @ref LL_IWDG_PRESCALER_128 0218 * @arg @ref LL_IWDG_PRESCALER_256 0219 */ 0220 __STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx) 0221 { 0222 return (READ_REG(IWDGx->PR)); 0223 } 0224 0225 /** 0226 * @brief Specify the IWDG down-counter reload value 0227 * @rmtoll RLR RL LL_IWDG_SetReloadCounter 0228 * @param IWDGx IWDG Instance 0229 * @param Counter Value between Min_Data=0 and Max_Data=0x0FFF 0230 * @retval None 0231 */ 0232 __STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Counter) 0233 { 0234 WRITE_REG(IWDGx->RLR, IWDG_RLR_RL & Counter); 0235 } 0236 0237 /** 0238 * @brief Get the specified IWDG down-counter reload value 0239 * @rmtoll RLR RL LL_IWDG_GetReloadCounter 0240 * @param IWDGx IWDG Instance 0241 * @retval Value between Min_Data=0 and Max_Data=0x0FFF 0242 */ 0243 __STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx) 0244 { 0245 return (READ_REG(IWDGx->RLR)); 0246 } 0247 0248 /** 0249 * @brief Specify high limit of the window value to be compared to the down-counter. 0250 * @rmtoll WINR WIN LL_IWDG_SetWindow 0251 * @param IWDGx IWDG Instance 0252 * @param Window Value between Min_Data=0 and Max_Data=0x0FFF 0253 * @retval None 0254 */ 0255 __STATIC_INLINE void LL_IWDG_SetWindow(IWDG_TypeDef *IWDGx, uint32_t Window) 0256 { 0257 WRITE_REG(IWDGx->WINR, IWDG_WINR_WIN & Window); 0258 } 0259 0260 /** 0261 * @brief Get the high limit of the window value specified. 0262 * @rmtoll WINR WIN LL_IWDG_GetWindow 0263 * @param IWDGx IWDG Instance 0264 * @retval Value between Min_Data=0 and Max_Data=0x0FFF 0265 */ 0266 __STATIC_INLINE uint32_t LL_IWDG_GetWindow(IWDG_TypeDef *IWDGx) 0267 { 0268 return (READ_REG(IWDGx->WINR)); 0269 } 0270 0271 /** 0272 * @} 0273 */ 0274 0275 /** @defgroup IWDG_LL_EF_FLAG_Management FLAG_Management 0276 * @ingroup RTEMSBSPsARMSTM32H7 0277 * @{ 0278 */ 0279 0280 /** 0281 * @brief Check if flag Prescaler Value Update is set or not 0282 * @rmtoll SR PVU LL_IWDG_IsActiveFlag_PVU 0283 * @param IWDGx IWDG Instance 0284 * @retval State of bit (1 or 0). 0285 */ 0286 __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx) 0287 { 0288 return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)) ? 1UL : 0UL); 0289 } 0290 0291 /** 0292 * @brief Check if flag Reload Value Update is set or not 0293 * @rmtoll SR RVU LL_IWDG_IsActiveFlag_RVU 0294 * @param IWDGx IWDG Instance 0295 * @retval State of bit (1 or 0). 0296 */ 0297 __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx) 0298 { 0299 return ((READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)) ? 1UL : 0UL); 0300 } 0301 0302 /** 0303 * @brief Check if flag Window Value Update is set or not 0304 * @rmtoll SR WVU LL_IWDG_IsActiveFlag_WVU 0305 * @param IWDGx IWDG Instance 0306 * @retval State of bit (1 or 0). 0307 */ 0308 __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(IWDG_TypeDef *IWDGx) 0309 { 0310 return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); 0311 } 0312 0313 /** 0314 * @brief Check if all flags Prescaler, Reload & Window Value Update are reset or not 0315 * @rmtoll SR PVU LL_IWDG_IsReady\n 0316 * SR RVU LL_IWDG_IsReady\n 0317 * SR WVU LL_IWDG_IsReady 0318 * @param IWDGx IWDG Instance 0319 * @retval State of bits (1 or 0). 0320 */ 0321 __STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx) 0322 { 0323 return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL); 0324 } 0325 0326 /** 0327 * @} 0328 */ 0329 0330 /** 0331 * @} 0332 */ 0333 0334 /** 0335 * @} 0336 */ 0337 0338 #endif /* IWDG1 || IWDG2 */ 0339 0340 /** 0341 * @} 0342 */ 0343 0344 #ifdef __cplusplus 0345 } 0346 #endif 0347 0348 #endif /* STM32H7xx_LL_IWDG_H */
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