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File indexing completed on 2025-05-11 08:23:37
0001 /** 0002 ****************************************************************************** 0003 * @file stm32h7xx_ll_exti.h 0004 * @author MCD Application Team 0005 * @brief Header file of EXTI LL module. 0006 ****************************************************************************** 0007 * @attention 0008 * 0009 * Copyright (c) 2017 STMicroelectronics. 0010 * All rights reserved. 0011 * 0012 * This software is licensed under terms that can be found in the LICENSE file 0013 * in the root directory of this software component. 0014 * If no LICENSE file comes with this software, it is provided AS-IS. 0015 * 0016 ****************************************************************************** 0017 */ 0018 0019 /* Define to prevent recursive inclusion -------------------------------------*/ 0020 #ifndef __STM32H7xx_LL_EXTI_H 0021 #define __STM32H7xx_LL_EXTI_H 0022 0023 #ifdef __cplusplus 0024 extern "C" { 0025 #endif 0026 0027 /* Includes ------------------------------------------------------------------*/ 0028 #include "stm32h7xx.h" 0029 0030 /** @addtogroup STM32H7xx_LL_Driver 0031 * @{ 0032 */ 0033 0034 #if defined (EXTI) 0035 0036 /** @defgroup EXTI_LL EXTI 0037 * @ingroup RTEMSBSPsARMSTM32H7 0038 * @{ 0039 */ 0040 0041 /* Private types -------------------------------------------------------------*/ 0042 /* Private variables ---------------------------------------------------------*/ 0043 /* Private constants ---------------------------------------------------------*/ 0044 /* Private Macros ------------------------------------------------------------*/ 0045 #if defined(USE_FULL_LL_DRIVER) || defined(__rtems__) 0046 /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros 0047 * @ingroup RTEMSBSPsARMSTM32H7 0048 * @{ 0049 */ 0050 /** 0051 * @} 0052 */ 0053 #endif /*USE_FULL_LL_DRIVER*/ 0054 /* Exported types ------------------------------------------------------------*/ 0055 #if defined(USE_FULL_LL_DRIVER) || defined(__rtems__) 0056 /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure 0057 * @ingroup RTEMSBSPsARMSTM32H7 0058 * @{ 0059 */ 0060 typedef struct 0061 { 0062 0063 uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31 0064 This parameter can be any combination of @ref EXTI_LL_EC_LINE */ 0065 0066 uint32_t Line_32_63; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 32 to 63 0067 This parameter can be any combination of @ref EXTI_LL_EC_LINE */ 0068 0069 uint32_t Line_64_95; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 64 to 95 0070 This parameter can be any combination of @ref EXTI_LL_EC_LINE */ 0071 0072 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines. 0073 This parameter can be set either to ENABLE or DISABLE */ 0074 0075 uint8_t Mode; /*!< Specifies the mode for the EXTI lines. 0076 This parameter can be a value of @ref EXTI_LL_EC_MODE. */ 0077 0078 uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines. 0079 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */ 0080 } LL_EXTI_InitTypeDef; 0081 0082 /** 0083 * @} 0084 */ 0085 #endif /*USE_FULL_LL_DRIVER*/ 0086 0087 /* Exported constants --------------------------------------------------------*/ 0088 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants 0089 * @ingroup RTEMSBSPsARMSTM32H7 0090 * @{ 0091 */ 0092 0093 /** @defgroup EXTI_LL_EC_LINE LINE 0094 * @ingroup RTEMSBSPsARMSTM32H7 0095 * @{ 0096 */ 0097 #define LL_EXTI_LINE_0 EXTI_IMR1_IM0 /*!< Extended line 0 */ 0098 #define LL_EXTI_LINE_1 EXTI_IMR1_IM1 /*!< Extended line 1 */ 0099 #define LL_EXTI_LINE_2 EXTI_IMR1_IM2 /*!< Extended line 2 */ 0100 #define LL_EXTI_LINE_3 EXTI_IMR1_IM3 /*!< Extended line 3 */ 0101 #define LL_EXTI_LINE_4 EXTI_IMR1_IM4 /*!< Extended line 4 */ 0102 #define LL_EXTI_LINE_5 EXTI_IMR1_IM5 /*!< Extended line 5 */ 0103 #define LL_EXTI_LINE_6 EXTI_IMR1_IM6 /*!< Extended line 6 */ 0104 #define LL_EXTI_LINE_7 EXTI_IMR1_IM7 /*!< Extended line 7 */ 0105 #define LL_EXTI_LINE_8 EXTI_IMR1_IM8 /*!< Extended line 8 */ 0106 #define LL_EXTI_LINE_9 EXTI_IMR1_IM9 /*!< Extended line 9 */ 0107 #define LL_EXTI_LINE_10 EXTI_IMR1_IM10 /*!< Extended line 10 */ 0108 #define LL_EXTI_LINE_11 EXTI_IMR1_IM11 /*!< Extended line 11 */ 0109 #define LL_EXTI_LINE_12 EXTI_IMR1_IM12 /*!< Extended line 12 */ 0110 #define LL_EXTI_LINE_13 EXTI_IMR1_IM13 /*!< Extended line 13 */ 0111 #define LL_EXTI_LINE_14 EXTI_IMR1_IM14 /*!< Extended line 14 */ 0112 #define LL_EXTI_LINE_15 EXTI_IMR1_IM15 /*!< Extended line 15 */ 0113 #define LL_EXTI_LINE_16 EXTI_IMR1_IM16 /*!< Extended line 16 */ 0114 #define LL_EXTI_LINE_17 EXTI_IMR1_IM17 /*!< Extended line 17 */ 0115 #define LL_EXTI_LINE_18 EXTI_IMR1_IM18 /*!< Extended line 18 */ 0116 #define LL_EXTI_LINE_19 EXTI_IMR1_IM19 /*!< Extended line 19 */ 0117 #define LL_EXTI_LINE_20 EXTI_IMR1_IM20 /*!< Extended line 20 */ 0118 #define LL_EXTI_LINE_21 EXTI_IMR1_IM21 /*!< Extended line 21 */ 0119 #define LL_EXTI_LINE_22 EXTI_IMR1_IM22 /*!< Extended line 22 */ 0120 #define LL_EXTI_LINE_23 EXTI_IMR1_IM23 /*!< Extended line 23 */ 0121 #define LL_EXTI_LINE_24 EXTI_IMR1_IM24 /*!< Extended line 24 */ 0122 #define LL_EXTI_LINE_25 EXTI_IMR1_IM25 /*!< Extended line 25 */ 0123 #define LL_EXTI_LINE_26 EXTI_IMR1_IM26 /*!< Extended line 26 */ 0124 #define LL_EXTI_LINE_27 EXTI_IMR1_IM27 /*!< Extended line 27 */ 0125 #define LL_EXTI_LINE_28 EXTI_IMR1_IM28 /*!< Extended line 28 */ 0126 #define LL_EXTI_LINE_29 EXTI_IMR1_IM29 /*!< Extended line 29 */ 0127 #define LL_EXTI_LINE_30 EXTI_IMR1_IM30 /*!< Extended line 30 */ 0128 #define LL_EXTI_LINE_31 EXTI_IMR1_IM31 /*!< Extended line 31 */ 0129 #define LL_EXTI_LINE_ALL_0_31 EXTI_IMR1_IM /*!< All Extended line not reserved*/ 0130 0131 #define LL_EXTI_LINE_32 EXTI_IMR2_IM32 /*!< Extended line 32 */ 0132 #define LL_EXTI_LINE_33 EXTI_IMR2_IM33 /*!< Extended line 33 */ 0133 #define LL_EXTI_LINE_34 EXTI_IMR2_IM34 /*!< Extended line 34 */ 0134 #define LL_EXTI_LINE_35 EXTI_IMR2_IM35 /*!< Extended line 35 */ 0135 #define LL_EXTI_LINE_36 EXTI_IMR2_IM36 /*!< Extended line 36 */ 0136 #define LL_EXTI_LINE_37 EXTI_IMR2_IM37 /*!< Extended line 37 */ 0137 #define LL_EXTI_LINE_38 EXTI_IMR2_IM38 /*!< Extended line 38 */ 0138 #define LL_EXTI_LINE_39 EXTI_IMR2_IM39 /*!< Extended line 39 */ 0139 #define LL_EXTI_LINE_40 EXTI_IMR2_IM40 /*!< Extended line 40 */ 0140 #define LL_EXTI_LINE_41 EXTI_IMR2_IM41 /*!< Extended line 41 */ 0141 #define LL_EXTI_LINE_42 EXTI_IMR2_IM42 /*!< Extended line 42 */ 0142 #define LL_EXTI_LINE_43 EXTI_IMR2_IM43 /*!< Extended line 43 */ 0143 #if defined(USB2_OTG_FS) 0144 #define LL_EXTI_LINE_44 EXTI_IMR2_IM44 /*!< Extended line 44 */ 0145 #endif /* USB2_OTG_FS */ 0146 #if defined(DSI) 0147 #define LL_EXTI_LINE_46 EXTI_IMR2_IM46 /*!< Extended line 46 */ 0148 #endif /* DSI */ 0149 #define LL_EXTI_LINE_47 EXTI_IMR2_IM47 /*!< Extended line 47 */ 0150 #define LL_EXTI_LINE_48 EXTI_IMR2_IM48 /*!< Extended line 48 */ 0151 #define LL_EXTI_LINE_49 EXTI_IMR2_IM49 /*!< Extended line 49 */ 0152 #define LL_EXTI_LINE_50 EXTI_IMR2_IM50 /*!< Extended line 50 */ 0153 #define LL_EXTI_LINE_51 EXTI_IMR2_IM51 /*!< Extended line 51 */ 0154 #define LL_EXTI_LINE_52 EXTI_IMR2_IM52 /*!< Extended line 52 */ 0155 #define LL_EXTI_LINE_53 EXTI_IMR2_IM53 /*!< Extended line 53 */ 0156 #define LL_EXTI_LINE_54 EXTI_IMR2_IM54 /*!< Extended line 54 */ 0157 #define LL_EXTI_LINE_55 EXTI_IMR2_IM55 /*!< Extended line 55 */ 0158 #define LL_EXTI_LINE_56 EXTI_IMR2_IM56 /*!< Extended line 56 */ 0159 #if defined(EXTI_IMR2_IM57) 0160 #define LL_EXTI_LINE_57 EXTI_IMR2_IM57 /*!< Extended line 57 */ 0161 #endif /*EXTI_IMR2_IM57*/ 0162 #define LL_EXTI_LINE_58 EXTI_IMR2_IM58 /*!< Extended line 58 */ 0163 #if defined(EXTI_IMR2_IM59) 0164 #define LL_EXTI_LINE_59 EXTI_IMR2_IM59 /*!< Extended line 59 */ 0165 #endif /*EXTI_IMR2_IM59*/ 0166 #define LL_EXTI_LINE_60 EXTI_IMR2_IM60 /*!< Extended line 60 */ 0167 #define LL_EXTI_LINE_61 EXTI_IMR2_IM61 /*!< Extended line 61 */ 0168 #define LL_EXTI_LINE_62 EXTI_IMR2_IM62 /*!< Extended line 62 */ 0169 #define LL_EXTI_LINE_63 EXTI_IMR2_IM63 /*!< Extended line 63 */ 0170 #define LL_EXTI_LINE_ALL_32_63 EXTI_IMR2_IM /*!< All Extended line not reserved*/ 0171 0172 #define LL_EXTI_LINE_64 EXTI_IMR3_IM64 /*!< Extended line 64 */ 0173 #define LL_EXTI_LINE_65 EXTI_IMR3_IM65 /*!< Extended line 65 */ 0174 #define LL_EXTI_LINE_66 EXTI_IMR3_IM66 /*!< Extended line 66 */ 0175 #define LL_EXTI_LINE_67 EXTI_IMR3_IM67 /*!< Extended line 67 */ 0176 #define LL_EXTI_LINE_68 EXTI_IMR3_IM68 /*!< Extended line 68 */ 0177 #define LL_EXTI_LINE_69 EXTI_IMR3_IM69 /*!< Extended line 69 */ 0178 #define LL_EXTI_LINE_70 EXTI_IMR3_IM70 /*!< Extended line 70 */ 0179 #define LL_EXTI_LINE_71 EXTI_IMR3_IM71 /*!< Extended line 71 */ 0180 #define LL_EXTI_LINE_72 EXTI_IMR3_IM72 /*!< Extended line 72 */ 0181 #define LL_EXTI_LINE_73 EXTI_IMR3_IM73 /*!< Extended line 73 */ 0182 #define LL_EXTI_LINE_74 EXTI_IMR3_IM74 /*!< Extended line 74 */ 0183 #if defined(ADC3) 0184 #define LL_EXTI_LINE_75 EXTI_IMR3_IM75 /*!< Extended line 75 */ 0185 #endif /* ADC3 */ 0186 #if defined(SAI4) 0187 #define LL_EXTI_LINE_76 EXTI_IMR3_IM76 /*!< Extended line 76 */ 0188 #endif /* SAI4 */ 0189 #if defined(DUAL_CORE) 0190 #define LL_EXTI_LINE_77 EXTI_IMR3_IM77 /*!< Extended line 77 */ 0191 #define LL_EXTI_LINE_78 EXTI_IMR3_IM78 /*!< Extended line 78 */ 0192 #define LL_EXTI_LINE_79 EXTI_IMR3_IM79 /*!< Extended line 79 */ 0193 #define LL_EXTI_LINE_80 EXTI_IMR3_IM80 /*!< Extended line 80 */ 0194 #define LL_EXTI_LINE_82 EXTI_IMR3_IM82 /*!< Extended line 82 */ 0195 #define LL_EXTI_LINE_84 EXTI_IMR3_IM84 /*!< Extended line 84 */ 0196 #endif /* DUAL_CORE */ 0197 #define LL_EXTI_LINE_85 EXTI_IMR3_IM85 /*!< Extended line 85 */ 0198 #if defined(ETH) 0199 #define LL_EXTI_LINE_86 EXTI_IMR3_IM86 /*!< Extended line 86 */ 0200 #endif /* ETH */ 0201 #define LL_EXTI_LINE_87 EXTI_IMR3_IM87 /*!< Extended line 87 */ 0202 #if defined(DTS) 0203 #define LL_EXTI_LINE_88 EXTI_IMR3_IM88 /*!< Extended line 88 */ 0204 #endif /* DTS */ 0205 #if defined(EXTI_IMR3_IM89) 0206 #define LL_EXTI_LINE_89 EXTI_IMR3_IM89 /*!< Extended line 89 */ 0207 #endif /* EXTI_IMR3_IM89 */ 0208 #if defined(EXTI_IMR3_IM90) 0209 #define LL_EXTI_LINE_90 EXTI_IMR3_IM90 /*!< Extended line 90 */ 0210 #endif /* EXTI_IMR3_IM90 */ 0211 #if defined(I2C5) 0212 #define LL_EXTI_LINE_91 EXTI_IMR3_IM91 /*!< Extended line 91 */ 0213 #endif /* I2C5 */ 0214 #define LL_EXTI_LINE_ALL_64_95 EXTI_IMR3_IM /*!< All Extended line not reserved*/ 0215 0216 0217 #define LL_EXTI_LINE_ALL (0xFFFFFFFFU) /*!< All Extended line */ 0218 0219 #if defined(USE_FULL_LL_DRIVER) || defined(__rtems__) 0220 #define LL_EXTI_LINE_NONE (0x00000000U) /*!< None Extended line */ 0221 #endif /*USE_FULL_LL_DRIVER*/ 0222 0223 /** 0224 * @} 0225 */ 0226 #if defined(USE_FULL_LL_DRIVER) || defined(__rtems__) 0227 0228 /** @defgroup EXTI_LL_EC_MODE Mode 0229 * @ingroup RTEMSBSPsARMSTM32H7 0230 * @{ 0231 */ 0232 #define LL_EXTI_MODE_IT ((uint8_t)0x01U) /*!< Cortex-M7 Interrupt Mode */ 0233 #define LL_EXTI_MODE_EVENT ((uint8_t)0x02U) /*!< Cortex-M7 Event Mode */ 0234 #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x03U) /*!< Cortex-M7 Interrupt & Event Mode */ 0235 0236 #if defined(DUAL_CORE) 0237 #define LL_EXTI_MODE_C1_IT LL_EXTI_MODE_IT /*!< Cortex-M7 Interrupt Mode */ 0238 #define LL_EXTI_MODE_C1_EVENT LL_EXTI_MODE_EVENT /*!< Cortex-M7 Event Mode */ 0239 #define LL_EXTI_MODE_C1_IT_EVENT LL_EXTI_MODE_IT_EVENT /*!< Cortex-M7 Interrupt & Event Mode */ 0240 0241 #define LL_EXTI_MODE_C2_IT ((uint8_t)0x10U) /*!< Cortex-M4 Interrupt Mode */ 0242 #define LL_EXTI_MODE_C2_EVENT ((uint8_t)0x20U) /*!< Cortex-M4 Event Mode */ 0243 #define LL_EXTI_MODE_C2_IT_EVENT ((uint8_t)0x30U) /*!< Cortex-M4 Interrupt & Event Mode */ 0244 #endif /* DUAL_CORE */ 0245 0246 /** 0247 * @} 0248 */ 0249 0250 /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger 0251 * @ingroup RTEMSBSPsARMSTM32H7 0252 * @{ 0253 */ 0254 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */ 0255 #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */ 0256 #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */ 0257 #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */ 0258 0259 /** 0260 * @} 0261 */ 0262 0263 /** @defgroup EXTI_LL_D3_PEND_CLR D3 Pend Clear Source 0264 * @ingroup RTEMSBSPsARMSTM32H7 0265 * @{ 0266 */ 0267 #define LL_EXTI_D3_PEND_CLR_DMACH6 ((uint8_t)0x00U) /*!< DMA ch6 event selected as D3 domain pendclear source */ 0268 #define LL_EXTI_D3_PEND_CLR_DMACH7 ((uint8_t)0x01U) /*!< DMA ch7 event selected as D3 domain pendclear source */ 0269 #if defined (LPTIM4) 0270 #define LL_EXTI_D3_PEND_CLR_LPTIM4 ((uint8_t)0x02U) /*!< LPTIM4 out selected as D3 domain pendclear source */ 0271 #else 0272 #define LL_EXTI_D3_PEND_CLR_LPTIM2 ((uint8_t)0x02U) /*!< LPTIM2 out selected as D3 domain pendclear source */ 0273 #endif /*LPTIM4*/ 0274 #if defined (LPTIM5) 0275 #define LL_EXTI_D3_PEND_CLR_LPTIM5 ((uint8_t)0x03U) /*!< LPTIM5 out selected as D3 domain pendclear source */ 0276 #else 0277 #define LL_EXTI_D3_PEND_CLR_LPTIM3 ((uint8_t)0x02U) /*!< LPTIM3 out selected as D3 domain pendclear source */ 0278 #endif /*LPTIM5*/ 0279 /** 0280 * @} 0281 */ 0282 0283 0284 #endif /*USE_FULL_LL_DRIVER*/ 0285 0286 0287 /** 0288 * @} 0289 */ 0290 0291 /* Exported macro ------------------------------------------------------------*/ 0292 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros 0293 * @ingroup RTEMSBSPsARMSTM32H7 0294 * @{ 0295 */ 0296 0297 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros 0298 * @ingroup RTEMSBSPsARMSTM32H7 0299 * @{ 0300 */ 0301 0302 /** 0303 * @brief Write a value in EXTI register 0304 * @param __REG__ Register to be written 0305 * @param __VALUE__ Value to be written in the register 0306 * @retval None 0307 */ 0308 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__)) 0309 0310 /** 0311 * @brief Read a value in EXTI register 0312 * @param __REG__ Register to be read 0313 * @retval Register value 0314 */ 0315 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__) 0316 0317 /** 0318 * @} 0319 */ 0320 0321 0322 /** 0323 * @} 0324 */ 0325 0326 0327 0328 /* Exported functions --------------------------------------------------------*/ 0329 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions 0330 * @ingroup RTEMSBSPsARMSTM32H7 0331 * @{ 0332 */ 0333 /** @defgroup EXTI_LL_EF_IT_Management IT_Management 0334 * @ingroup RTEMSBSPsARMSTM32H7 0335 * @{ 0336 */ 0337 0338 /** 0339 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31 0340 * @rmtoll IMR1 IMx LL_EXTI_EnableIT_0_31 0341 * @param ExtiLine This parameter can be one of the following values: 0342 * @arg @ref LL_EXTI_LINE_0 0343 * @arg @ref LL_EXTI_LINE_1 0344 * @arg @ref LL_EXTI_LINE_2 0345 * @arg @ref LL_EXTI_LINE_3 0346 * @arg @ref LL_EXTI_LINE_4 0347 * @arg @ref LL_EXTI_LINE_5 0348 * @arg @ref LL_EXTI_LINE_6 0349 * @arg @ref LL_EXTI_LINE_7 0350 * @arg @ref LL_EXTI_LINE_8 0351 * @arg @ref LL_EXTI_LINE_9 0352 * @arg @ref LL_EXTI_LINE_10 0353 * @arg @ref LL_EXTI_LINE_11 0354 * @arg @ref LL_EXTI_LINE_12 0355 * @arg @ref LL_EXTI_LINE_13 0356 * @arg @ref LL_EXTI_LINE_14 0357 * @arg @ref LL_EXTI_LINE_15 0358 * @arg @ref LL_EXTI_LINE_16 0359 * @arg @ref LL_EXTI_LINE_17 0360 * @arg @ref LL_EXTI_LINE_18 0361 * @arg @ref LL_EXTI_LINE_19 0362 * @arg @ref LL_EXTI_LINE_20 0363 * @arg @ref LL_EXTI_LINE_21 0364 * @arg @ref LL_EXTI_LINE_22 0365 * @arg @ref LL_EXTI_LINE_23 0366 * @arg @ref LL_EXTI_LINE_24 0367 * @arg @ref LL_EXTI_LINE_25 0368 * @arg @ref LL_EXTI_LINE_26 0369 * @arg @ref LL_EXTI_LINE_27 0370 * @arg @ref LL_EXTI_LINE_28 0371 * @arg @ref LL_EXTI_LINE_29 0372 * @arg @ref LL_EXTI_LINE_30 0373 * @arg @ref LL_EXTI_LINE_31 0374 * @arg @ref LL_EXTI_LINE_ALL_0_31 0375 * @retval None 0376 */ 0377 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine) 0378 { 0379 SET_BIT(EXTI->IMR1, ExtiLine); 0380 } 0381 0382 /** 0383 * @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63 0384 * @rmtoll IMR2 IMx LL_EXTI_EnableIT_32_63 0385 * @param ExtiLine This parameter can be one of the following values: 0386 * @arg @ref LL_EXTI_LINE_32 0387 * @arg @ref LL_EXTI_LINE_33 0388 * @arg @ref LL_EXTI_LINE_34 0389 * @arg @ref LL_EXTI_LINE_35 0390 * @arg @ref LL_EXTI_LINE_36 0391 * @arg @ref LL_EXTI_LINE_37 0392 * @arg @ref LL_EXTI_LINE_38 0393 * @arg @ref LL_EXTI_LINE_39 0394 * @arg @ref LL_EXTI_LINE_40 0395 * @arg @ref LL_EXTI_LINE_41 0396 * @arg @ref LL_EXTI_LINE_42 0397 * @arg @ref LL_EXTI_LINE_43 0398 * @arg @ref LL_EXTI_LINE_44 (*) 0399 * @arg @ref LL_EXTI_LINE_46 (*) 0400 * @arg @ref LL_EXTI_LINE_47 0401 * @arg @ref LL_EXTI_LINE_48 0402 * @arg @ref LL_EXTI_LINE_49 0403 * @arg @ref LL_EXTI_LINE_50 0404 * @arg @ref LL_EXTI_LINE_51 0405 * @arg @ref LL_EXTI_LINE_52 0406 * @arg @ref LL_EXTI_LINE_53 0407 * @arg @ref LL_EXTI_LINE_54 0408 * @arg @ref LL_EXTI_LINE_55 0409 * @arg @ref LL_EXTI_LINE_56 0410 * @arg @ref LL_EXTI_LINE_57 (*) 0411 * @arg @ref LL_EXTI_LINE_58 0412 * @arg @ref LL_EXTI_LINE_59 (*) 0413 * @arg @ref LL_EXTI_LINE_60 0414 * @arg @ref LL_EXTI_LINE_61 0415 * @arg @ref LL_EXTI_LINE_62 0416 * @arg @ref LL_EXTI_LINE_63 0417 * @arg @ref LL_EXTI_LINE_ALL_32_63 0418 * 0419 * (*) value not defined in all devices. 0420 * @retval None 0421 */ 0422 __STATIC_INLINE void LL_EXTI_EnableIT_32_63(uint32_t ExtiLine) 0423 { 0424 SET_BIT(EXTI->IMR2, ExtiLine); 0425 } 0426 0427 0428 /** 0429 * @brief Enable ExtiLine Interrupt request for Lines in range 64 to 95 0430 * @rmtoll IMR3 IMx LL_EXTI_EnableIT_64_95 0431 * @param ExtiLine This parameter can be one of the following values: 0432 * @arg @ref LL_EXTI_LINE_64 0433 * @arg @ref LL_EXTI_LINE_65 0434 * @arg @ref LL_EXTI_LINE_66 0435 * @arg @ref LL_EXTI_LINE_67 0436 * @arg @ref LL_EXTI_LINE_68 0437 * @arg @ref LL_EXTI_LINE_69 0438 * @arg @ref LL_EXTI_LINE_70 0439 * @arg @ref LL_EXTI_LINE_71 0440 * @arg @ref LL_EXTI_LINE_72 0441 * @arg @ref LL_EXTI_LINE_73 0442 * @arg @ref LL_EXTI_LINE_74 0443 * @arg @ref LL_EXTI_LINE_75 (*) 0444 * @arg @ref LL_EXTI_LINE_76 (*) 0445 * @arg @ref LL_EXTI_LINE_77 (**) 0446 * @arg @ref LL_EXTI_LINE_78 (**) 0447 * @arg @ref LL_EXTI_LINE_79 (**) 0448 * @arg @ref LL_EXTI_LINE_80 (**) 0449 * @arg @ref LL_EXTI_LINE_82 (**) 0450 * @arg @ref LL_EXTI_LINE_84 (**) 0451 * @arg @ref LL_EXTI_LINE_85 0452 * @arg @ref LL_EXTI_LINE_86 (*) 0453 * @arg @ref LL_EXTI_LINE_87 0454 * @arg @ref LL_EXTI_LINE_88 (*) 0455 * @arg @ref LL_EXTI_LINE_89 (*) 0456 * @arg @ref LL_EXTI_LINE_90 (*) 0457 * @arg @ref LL_EXTI_LINE_91 (*) 0458 * @arg @ref LL_EXTI_LINE_ALL_64_95 0459 * 0460 * (*) value not defined in all devices. 0461 * (**) value only defined in dual core devices. 0462 * @retval None 0463 */ 0464 __STATIC_INLINE void LL_EXTI_EnableIT_64_95(uint32_t ExtiLine) 0465 { 0466 SET_BIT(EXTI->IMR3, ExtiLine); 0467 } 0468 0469 0470 /** 0471 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31 0472 * @rmtoll IMR1 IMx LL_EXTI_DisableIT_0_31 0473 * @param ExtiLine This parameter can be one of the following values: 0474 * @arg @ref LL_EXTI_LINE_0 0475 * @arg @ref LL_EXTI_LINE_1 0476 * @arg @ref LL_EXTI_LINE_2 0477 * @arg @ref LL_EXTI_LINE_3 0478 * @arg @ref LL_EXTI_LINE_4 0479 * @arg @ref LL_EXTI_LINE_5 0480 * @arg @ref LL_EXTI_LINE_6 0481 * @arg @ref LL_EXTI_LINE_7 0482 * @arg @ref LL_EXTI_LINE_8 0483 * @arg @ref LL_EXTI_LINE_9 0484 * @arg @ref LL_EXTI_LINE_10 0485 * @arg @ref LL_EXTI_LINE_11 0486 * @arg @ref LL_EXTI_LINE_12 0487 * @arg @ref LL_EXTI_LINE_13 0488 * @arg @ref LL_EXTI_LINE_14 0489 * @arg @ref LL_EXTI_LINE_15 0490 * @arg @ref LL_EXTI_LINE_16 0491 * @arg @ref LL_EXTI_LINE_17 0492 * @arg @ref LL_EXTI_LINE_18 0493 * @arg @ref LL_EXTI_LINE_19 0494 * @arg @ref LL_EXTI_LINE_20 0495 * @arg @ref LL_EXTI_LINE_21 0496 * @arg @ref LL_EXTI_LINE_22 0497 * @arg @ref LL_EXTI_LINE_23 0498 * @arg @ref LL_EXTI_LINE_24 0499 * @arg @ref LL_EXTI_LINE_25 0500 * @arg @ref LL_EXTI_LINE_26 0501 * @arg @ref LL_EXTI_LINE_27 0502 * @arg @ref LL_EXTI_LINE_28 0503 * @arg @ref LL_EXTI_LINE_29 0504 * @arg @ref LL_EXTI_LINE_30 0505 * @arg @ref LL_EXTI_LINE_31 0506 * @arg @ref LL_EXTI_LINE_ALL_0_31 0507 * @retval None 0508 */ 0509 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine) 0510 { 0511 CLEAR_BIT(EXTI->IMR1, ExtiLine); 0512 } 0513 0514 0515 /** 0516 * @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63 0517 * @rmtoll IMR2 IMx LL_EXTI_DisableIT_32_63 0518 * @param ExtiLine This parameter can be one of the following values: 0519 * @arg @ref LL_EXTI_LINE_32 0520 * @arg @ref LL_EXTI_LINE_33 0521 * @arg @ref LL_EXTI_LINE_34 0522 * @arg @ref LL_EXTI_LINE_35 0523 * @arg @ref LL_EXTI_LINE_36 0524 * @arg @ref LL_EXTI_LINE_37 0525 * @arg @ref LL_EXTI_LINE_38 0526 * @arg @ref LL_EXTI_LINE_39 0527 * @arg @ref LL_EXTI_LINE_40 0528 * @arg @ref LL_EXTI_LINE_41 0529 * @arg @ref LL_EXTI_LINE_42 0530 * @arg @ref LL_EXTI_LINE_43 0531 * @arg @ref LL_EXTI_LINE_44 (*) 0532 * @arg @ref LL_EXTI_LINE_46 (*) 0533 * @arg @ref LL_EXTI_LINE_47 0534 * @arg @ref LL_EXTI_LINE_48 0535 * @arg @ref LL_EXTI_LINE_49 0536 * @arg @ref LL_EXTI_LINE_50 0537 * @arg @ref LL_EXTI_LINE_51 0538 * @arg @ref LL_EXTI_LINE_52 0539 * @arg @ref LL_EXTI_LINE_53 0540 * @arg @ref LL_EXTI_LINE_54 0541 * @arg @ref LL_EXTI_LINE_55 0542 * @arg @ref LL_EXTI_LINE_56 0543 * @arg @ref LL_EXTI_LINE_57 (*) 0544 * @arg @ref LL_EXTI_LINE_58 0545 * @arg @ref LL_EXTI_LINE_59 (*) 0546 * @arg @ref LL_EXTI_LINE_60 0547 * @arg @ref LL_EXTI_LINE_61 0548 * @arg @ref LL_EXTI_LINE_62 0549 * @arg @ref LL_EXTI_LINE_63 0550 * @arg @ref LL_EXTI_LINE_ALL_32_63 0551 * 0552 * (*) value not defined in all devices. 0553 * @retval None 0554 */ 0555 __STATIC_INLINE void LL_EXTI_DisableIT_32_63(uint32_t ExtiLine) 0556 { 0557 CLEAR_BIT(EXTI->IMR2, ExtiLine); 0558 } 0559 0560 /** 0561 * @brief Disable ExtiLine Interrupt request for Lines in range 64 to 95 0562 * @rmtoll IMR3 IMx LL_EXTI_DisableIT_64_95 0563 * @param ExtiLine This parameter can be one of the following values: 0564 * @arg @ref LL_EXTI_LINE_64 0565 * @arg @ref LL_EXTI_LINE_65 0566 * @arg @ref LL_EXTI_LINE_66 0567 * @arg @ref LL_EXTI_LINE_67 0568 * @arg @ref LL_EXTI_LINE_68 0569 * @arg @ref LL_EXTI_LINE_69 0570 * @arg @ref LL_EXTI_LINE_70 0571 * @arg @ref LL_EXTI_LINE_71 0572 * @arg @ref LL_EXTI_LINE_72 0573 * @arg @ref LL_EXTI_LINE_73 0574 * @arg @ref LL_EXTI_LINE_74 0575 * @arg @ref LL_EXTI_LINE_75 (*) 0576 * @arg @ref LL_EXTI_LINE_76 (*) 0577 * @arg @ref LL_EXTI_LINE_77 (**) 0578 * @arg @ref LL_EXTI_LINE_78 (**) 0579 * @arg @ref LL_EXTI_LINE_79 (**) 0580 * @arg @ref LL_EXTI_LINE_80 (**) 0581 * @arg @ref LL_EXTI_LINE_82 (**) 0582 * @arg @ref LL_EXTI_LINE_84 (**) 0583 * @arg @ref LL_EXTI_LINE_85 0584 * @arg @ref LL_EXTI_LINE_86 (*) 0585 * @arg @ref LL_EXTI_LINE_87 0586 * @arg @ref LL_EXTI_LINE_88 (*) 0587 * @arg @ref LL_EXTI_LINE_89 (*) 0588 * @arg @ref LL_EXTI_LINE_90 (*) 0589 * @arg @ref LL_EXTI_LINE_91 (*) 0590 * @arg @ref LL_EXTI_LINE_ALL_64_95 0591 * 0592 * (*) value not defined in all devices. 0593 * (**) value only defined in dual core devices. 0594 * @retval None 0595 */ 0596 __STATIC_INLINE void LL_EXTI_DisableIT_64_95(uint32_t ExtiLine) 0597 { 0598 CLEAR_BIT(EXTI->IMR3, ExtiLine); 0599 } 0600 0601 0602 /** 0603 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31 0604 * @rmtoll IMR1 IMx LL_EXTI_IsEnabledIT_0_31 0605 * @param ExtiLine This parameter can be one of the following values: 0606 * @arg @ref LL_EXTI_LINE_0 0607 * @arg @ref LL_EXTI_LINE_1 0608 * @arg @ref LL_EXTI_LINE_2 0609 * @arg @ref LL_EXTI_LINE_3 0610 * @arg @ref LL_EXTI_LINE_4 0611 * @arg @ref LL_EXTI_LINE_5 0612 * @arg @ref LL_EXTI_LINE_6 0613 * @arg @ref LL_EXTI_LINE_7 0614 * @arg @ref LL_EXTI_LINE_8 0615 * @arg @ref LL_EXTI_LINE_9 0616 * @arg @ref LL_EXTI_LINE_10 0617 * @arg @ref LL_EXTI_LINE_11 0618 * @arg @ref LL_EXTI_LINE_12 0619 * @arg @ref LL_EXTI_LINE_13 0620 * @arg @ref LL_EXTI_LINE_14 0621 * @arg @ref LL_EXTI_LINE_15 0622 * @arg @ref LL_EXTI_LINE_16 0623 * @arg @ref LL_EXTI_LINE_17 0624 * @arg @ref LL_EXTI_LINE_18 0625 * @arg @ref LL_EXTI_LINE_19 0626 * @arg @ref LL_EXTI_LINE_20 0627 * @arg @ref LL_EXTI_LINE_21 0628 * @arg @ref LL_EXTI_LINE_22 0629 * @arg @ref LL_EXTI_LINE_23 0630 * @arg @ref LL_EXTI_LINE_24 0631 * @arg @ref LL_EXTI_LINE_25 0632 * @arg @ref LL_EXTI_LINE_26 0633 * @arg @ref LL_EXTI_LINE_27 0634 * @arg @ref LL_EXTI_LINE_28 0635 * @arg @ref LL_EXTI_LINE_29 0636 * @arg @ref LL_EXTI_LINE_30 0637 * @arg @ref LL_EXTI_LINE_31 0638 * @arg @ref LL_EXTI_LINE_ALL_0_31 0639 * @retval State of bit (1 or 0). 0640 */ 0641 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine) 0642 { 0643 return ((READ_BIT(EXTI->IMR1, ExtiLine) == (ExtiLine)) ? 1U : 0U); 0644 } 0645 0646 0647 /** 0648 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63 0649 * @rmtoll IMR2 IMx LL_EXTI_IsEnabledIT_32_63 0650 * @param ExtiLine This parameter can be one of the following values: 0651 * @arg @ref LL_EXTI_LINE_32 0652 * @arg @ref LL_EXTI_LINE_33 0653 * @arg @ref LL_EXTI_LINE_34 0654 * @arg @ref LL_EXTI_LINE_35 0655 * @arg @ref LL_EXTI_LINE_36 0656 * @arg @ref LL_EXTI_LINE_37 0657 * @arg @ref LL_EXTI_LINE_38 0658 * @arg @ref LL_EXTI_LINE_39 0659 * @arg @ref LL_EXTI_LINE_40 0660 * @arg @ref LL_EXTI_LINE_41 0661 * @arg @ref LL_EXTI_LINE_42 0662 * @arg @ref LL_EXTI_LINE_43 0663 * @arg @ref LL_EXTI_LINE_44 (*) 0664 * @arg @ref LL_EXTI_LINE_46 (*) 0665 * @arg @ref LL_EXTI_LINE_47 0666 * @arg @ref LL_EXTI_LINE_48 0667 * @arg @ref LL_EXTI_LINE_49 0668 * @arg @ref LL_EXTI_LINE_50 0669 * @arg @ref LL_EXTI_LINE_51 0670 * @arg @ref LL_EXTI_LINE_52 0671 * @arg @ref LL_EXTI_LINE_53 0672 * @arg @ref LL_EXTI_LINE_54 0673 * @arg @ref LL_EXTI_LINE_55 0674 * @arg @ref LL_EXTI_LINE_56 0675 * @arg @ref LL_EXTI_LINE_57 (*) 0676 * @arg @ref LL_EXTI_LINE_58 0677 * @arg @ref LL_EXTI_LINE_59 (*) 0678 * @arg @ref LL_EXTI_LINE_60 0679 * @arg @ref LL_EXTI_LINE_61 0680 * @arg @ref LL_EXTI_LINE_62 0681 * @arg @ref LL_EXTI_LINE_63 0682 * @arg @ref LL_EXTI_LINE_ALL_32_63 0683 * 0684 * (*) value not defined in all devices. 0685 * @retval State of bit (1 or 0). 0686 */ 0687 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine) 0688 { 0689 return ((READ_BIT(EXTI->IMR2, ExtiLine) == (ExtiLine)) ? 1U : 0U); 0690 } 0691 0692 0693 /** 0694 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 64 to 95 0695 * @rmtoll IMR3 IMx LL_EXTI_IsEnabledIT_64_95 0696 * @param ExtiLine This parameter can be one of the following values: 0697 * @arg @ref LL_EXTI_LINE_64 0698 * @arg @ref LL_EXTI_LINE_65 0699 * @arg @ref LL_EXTI_LINE_66 0700 * @arg @ref LL_EXTI_LINE_67 0701 * @arg @ref LL_EXTI_LINE_68 0702 * @arg @ref LL_EXTI_LINE_69 0703 * @arg @ref LL_EXTI_LINE_70 0704 * @arg @ref LL_EXTI_LINE_71 0705 * @arg @ref LL_EXTI_LINE_72 0706 * @arg @ref LL_EXTI_LINE_73 0707 * @arg @ref LL_EXTI_LINE_74 0708 * @arg @ref LL_EXTI_LINE_75 (*) 0709 * @arg @ref LL_EXTI_LINE_76 (*) 0710 * @arg @ref LL_EXTI_LINE_77 (**) 0711 * @arg @ref LL_EXTI_LINE_78 (**) 0712 * @arg @ref LL_EXTI_LINE_79 (**) 0713 * @arg @ref LL_EXTI_LINE_80 (**) 0714 * @arg @ref LL_EXTI_LINE_82 (**) 0715 * @arg @ref LL_EXTI_LINE_84 (**) 0716 * @arg @ref LL_EXTI_LINE_85 0717 * @arg @ref LL_EXTI_LINE_86 (*) 0718 * @arg @ref LL_EXTI_LINE_87 0719 * @arg @ref LL_EXTI_LINE_88 (*) 0720 * @arg @ref LL_EXTI_LINE_89 (*) 0721 * @arg @ref LL_EXTI_LINE_90 (*) 0722 * @arg @ref LL_EXTI_LINE_91 (*) 0723 * @arg @ref LL_EXTI_LINE_ALL_64_95 0724 * 0725 * (*) value not defined in all devices. 0726 * (**) value only defined in dual core devices. 0727 * @retval State of bit (1 or 0). 0728 */ 0729 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_64_95(uint32_t ExtiLine) 0730 { 0731 return ((READ_BIT(EXTI->IMR3, ExtiLine) == (ExtiLine)) ? 1U : 0U); 0732 } 0733 0734 #if defined(DUAL_CORE) 0735 /** 0736 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31 for cpu2 0737 * @rmtoll C2IMR1 IMx LL_C2_EXTI_EnableIT_0_31 0738 * @param ExtiLine This parameter can be one of the following values: 0739 * @arg @ref LL_EXTI_LINE_0 0740 * @arg @ref LL_EXTI_LINE_1 0741 * @arg @ref LL_EXTI_LINE_2 0742 * @arg @ref LL_EXTI_LINE_3 0743 * @arg @ref LL_EXTI_LINE_4 0744 * @arg @ref LL_EXTI_LINE_5 0745 * @arg @ref LL_EXTI_LINE_6 0746 * @arg @ref LL_EXTI_LINE_7 0747 * @arg @ref LL_EXTI_LINE_8 0748 * @arg @ref LL_EXTI_LINE_9 0749 * @arg @ref LL_EXTI_LINE_10 0750 * @arg @ref LL_EXTI_LINE_11 0751 * @arg @ref LL_EXTI_LINE_12 0752 * @arg @ref LL_EXTI_LINE_13 0753 * @arg @ref LL_EXTI_LINE_14 0754 * @arg @ref LL_EXTI_LINE_15 0755 * @arg @ref LL_EXTI_LINE_16 0756 * @arg @ref LL_EXTI_LINE_17 0757 * @arg @ref LL_EXTI_LINE_18 0758 * @arg @ref LL_EXTI_LINE_19 0759 * @arg @ref LL_EXTI_LINE_20 0760 * @arg @ref LL_EXTI_LINE_21 0761 * @arg @ref LL_EXTI_LINE_22 0762 * @arg @ref LL_EXTI_LINE_23 0763 * @arg @ref LL_EXTI_LINE_24 0764 * @arg @ref LL_EXTI_LINE_25 0765 * @arg @ref LL_EXTI_LINE_26 0766 * @arg @ref LL_EXTI_LINE_27 0767 * @arg @ref LL_EXTI_LINE_28 0768 * @arg @ref LL_EXTI_LINE_29 0769 * @arg @ref LL_EXTI_LINE_30 0770 * @arg @ref LL_EXTI_LINE_31 0771 * @arg @ref LL_EXTI_LINE_ALL_0_31 0772 * @retval None 0773 */ 0774 __STATIC_INLINE void LL_C2_EXTI_EnableIT_0_31(uint32_t ExtiLine) 0775 { 0776 SET_BIT(EXTI->C2IMR1, ExtiLine); 0777 } 0778 0779 0780 /** 0781 * @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63 for cpu2 0782 * @rmtoll C2IMR2 IMx LL_C2_EXTI_EnableIT_32_63 0783 * @param ExtiLine This parameter can be one of the following values: 0784 * @arg @ref LL_EXTI_LINE_32 0785 * @arg @ref LL_EXTI_LINE_33 0786 * @arg @ref LL_EXTI_LINE_34 0787 * @arg @ref LL_EXTI_LINE_35 0788 * @arg @ref LL_EXTI_LINE_36 0789 * @arg @ref LL_EXTI_LINE_37 0790 * @arg @ref LL_EXTI_LINE_38 0791 * @arg @ref LL_EXTI_LINE_39 0792 * @arg @ref LL_EXTI_LINE_40 0793 * @arg @ref LL_EXTI_LINE_41 0794 * @arg @ref LL_EXTI_LINE_42 0795 * @arg @ref LL_EXTI_LINE_43 0796 * @arg @ref LL_EXTI_LINE_44 0797 * @arg @ref LL_EXTI_LINE_46 0798 * @arg @ref LL_EXTI_LINE_47 0799 * @arg @ref LL_EXTI_LINE_48 0800 * @arg @ref LL_EXTI_LINE_49 0801 * @arg @ref LL_EXTI_LINE_50 0802 * @arg @ref LL_EXTI_LINE_51 0803 * @arg @ref LL_EXTI_LINE_52 0804 * @arg @ref LL_EXTI_LINE_53 0805 * @arg @ref LL_EXTI_LINE_54 0806 * @arg @ref LL_EXTI_LINE_55 0807 * @arg @ref LL_EXTI_LINE_56 0808 * @arg @ref LL_EXTI_LINE_57 0809 * @arg @ref LL_EXTI_LINE_58 0810 * @arg @ref LL_EXTI_LINE_59 0811 * @arg @ref LL_EXTI_LINE_60 0812 * @arg @ref LL_EXTI_LINE_61 0813 * @arg @ref LL_EXTI_LINE_62 0814 * @arg @ref LL_EXTI_LINE_63 0815 * @arg @ref LL_EXTI_LINE_ALL_32_63 0816 * @retval None 0817 */ 0818 __STATIC_INLINE void LL_C2_EXTI_EnableIT_32_63(uint32_t ExtiLine) 0819 { 0820 SET_BIT(EXTI->C2IMR2, ExtiLine); 0821 } 0822 0823 0824 /** 0825 * @brief Enable ExtiLine Interrupt request for Lines in range 64 to 95 0826 * @rmtoll C2IMR3 IMx LL_C2_EXTI_EnableIT_64_95 0827 * @param ExtiLine This parameter can be one of the following values: 0828 * @arg @ref LL_EXTI_LINE_64 0829 * @arg @ref LL_EXTI_LINE_65 0830 * @arg @ref LL_EXTI_LINE_66 0831 * @arg @ref LL_EXTI_LINE_67 0832 * @arg @ref LL_EXTI_LINE_68 0833 * @arg @ref LL_EXTI_LINE_69 0834 * @arg @ref LL_EXTI_LINE_70 0835 * @arg @ref LL_EXTI_LINE_71 0836 * @arg @ref LL_EXTI_LINE_72 0837 * @arg @ref LL_EXTI_LINE_73 0838 * @arg @ref LL_EXTI_LINE_74 0839 * @arg @ref LL_EXTI_LINE_75 0840 * @arg @ref LL_EXTI_LINE_76 0841 * @arg @ref LL_EXTI_LINE_77 0842 * @arg @ref LL_EXTI_LINE_78 0843 * @arg @ref LL_EXTI_LINE_79 0844 * @arg @ref LL_EXTI_LINE_80 0845 * @arg @ref LL_EXTI_LINE_82 0846 * @arg @ref LL_EXTI_LINE_84 0847 * @arg @ref LL_EXTI_LINE_85 0848 * @arg @ref LL_EXTI_LINE_86 0849 * @arg @ref LL_EXTI_LINE_87 0850 * @arg @ref LL_EXTI_LINE_ALL_64_95 0851 * @retval None 0852 */ 0853 __STATIC_INLINE void LL_C2_EXTI_EnableIT_64_95(uint32_t ExtiLine) 0854 { 0855 SET_BIT(EXTI->C2IMR3, ExtiLine); 0856 } 0857 0858 0859 /** 0860 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31 for cpu2 0861 * @rmtoll C2IMR1 IMx LL_C2_EXTI_DisableIT_0_31 0862 * @param ExtiLine This parameter can be one of the following values: 0863 * @arg @ref LL_EXTI_LINE_0 0864 * @arg @ref LL_EXTI_LINE_1 0865 * @arg @ref LL_EXTI_LINE_2 0866 * @arg @ref LL_EXTI_LINE_3 0867 * @arg @ref LL_EXTI_LINE_4 0868 * @arg @ref LL_EXTI_LINE_5 0869 * @arg @ref LL_EXTI_LINE_6 0870 * @arg @ref LL_EXTI_LINE_7 0871 * @arg @ref LL_EXTI_LINE_8 0872 * @arg @ref LL_EXTI_LINE_9 0873 * @arg @ref LL_EXTI_LINE_10 0874 * @arg @ref LL_EXTI_LINE_11 0875 * @arg @ref LL_EXTI_LINE_12 0876 * @arg @ref LL_EXTI_LINE_13 0877 * @arg @ref LL_EXTI_LINE_14 0878 * @arg @ref LL_EXTI_LINE_15 0879 * @arg @ref LL_EXTI_LINE_16 0880 * @arg @ref LL_EXTI_LINE_17 0881 * @arg @ref LL_EXTI_LINE_18 0882 * @arg @ref LL_EXTI_LINE_19 0883 * @arg @ref LL_EXTI_LINE_20 0884 * @arg @ref LL_EXTI_LINE_21 0885 * @arg @ref LL_EXTI_LINE_22 0886 * @arg @ref LL_EXTI_LINE_23 0887 * @arg @ref LL_EXTI_LINE_24 0888 * @arg @ref LL_EXTI_LINE_25 0889 * @arg @ref LL_EXTI_LINE_26 0890 * @arg @ref LL_EXTI_LINE_27 0891 * @arg @ref LL_EXTI_LINE_28 0892 * @arg @ref LL_EXTI_LINE_29 0893 * @arg @ref LL_EXTI_LINE_30 0894 * @arg @ref LL_EXTI_LINE_31 0895 * @arg @ref LL_EXTI_LINE_ALL_0_31 0896 * @retval None 0897 */ 0898 __STATIC_INLINE void LL_C2_EXTI_DisableIT_0_31(uint32_t ExtiLine) 0899 { 0900 CLEAR_BIT(EXTI->C2IMR1, ExtiLine); 0901 } 0902 0903 0904 0905 /** 0906 * @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63 for cpu2 0907 * @rmtoll C2IMR2 IMx LL_C2_EXTI_DisableIT_32_63 0908 * @param ExtiLine This parameter can be one of the following values: 0909 * @arg @ref LL_EXTI_LINE_32 0910 * @arg @ref LL_EXTI_LINE_33 0911 * @arg @ref LL_EXTI_LINE_34 0912 * @arg @ref LL_EXTI_LINE_35 0913 * @arg @ref LL_EXTI_LINE_36 0914 * @arg @ref LL_EXTI_LINE_37 0915 * @arg @ref LL_EXTI_LINE_38 0916 * @arg @ref LL_EXTI_LINE_39 0917 * @arg @ref LL_EXTI_LINE_40 0918 * @arg @ref LL_EXTI_LINE_41 0919 * @arg @ref LL_EXTI_LINE_42 0920 * @arg @ref LL_EXTI_LINE_43 0921 * @arg @ref LL_EXTI_LINE_44 0922 * @arg @ref LL_EXTI_LINE_46 0923 * @arg @ref LL_EXTI_LINE_47 0924 * @arg @ref LL_EXTI_LINE_48 0925 * @arg @ref LL_EXTI_LINE_49 0926 * @arg @ref LL_EXTI_LINE_50 0927 * @arg @ref LL_EXTI_LINE_51 0928 * @arg @ref LL_EXTI_LINE_52 0929 * @arg @ref LL_EXTI_LINE_53 0930 * @arg @ref LL_EXTI_LINE_54 0931 * @arg @ref LL_EXTI_LINE_55 0932 * @arg @ref LL_EXTI_LINE_56 0933 * @arg @ref LL_EXTI_LINE_57 0934 * @arg @ref LL_EXTI_LINE_58 0935 * @arg @ref LL_EXTI_LINE_59 0936 * @arg @ref LL_EXTI_LINE_60 0937 * @arg @ref LL_EXTI_LINE_61 0938 * @arg @ref LL_EXTI_LINE_62 0939 * @arg @ref LL_EXTI_LINE_63 0940 * @arg @ref LL_EXTI_LINE_ALL_32_63 0941 * @retval None 0942 */ 0943 __STATIC_INLINE void LL_C2_EXTI_DisableIT_32_63(uint32_t ExtiLine) 0944 { 0945 CLEAR_BIT(EXTI->C2IMR2, ExtiLine); 0946 } 0947 0948 0949 /** 0950 * @brief Disable ExtiLine Interrupt request for Lines in range 64 to 95 for cpu2 0951 * @rmtoll C2IMR3 IMx LL_C2_EXTI_DisableIT_64_95 0952 * @param ExtiLine This parameter can be one of the following values: 0953 * @arg @ref LL_EXTI_LINE_64 0954 * @arg @ref LL_EXTI_LINE_65 0955 * @arg @ref LL_EXTI_LINE_66 0956 * @arg @ref LL_EXTI_LINE_67 0957 * @arg @ref LL_EXTI_LINE_68 0958 * @arg @ref LL_EXTI_LINE_69 0959 * @arg @ref LL_EXTI_LINE_70 0960 * @arg @ref LL_EXTI_LINE_71 0961 * @arg @ref LL_EXTI_LINE_72 0962 * @arg @ref LL_EXTI_LINE_73 0963 * @arg @ref LL_EXTI_LINE_74 0964 * @arg @ref LL_EXTI_LINE_75 0965 * @arg @ref LL_EXTI_LINE_76 0966 * @arg @ref LL_EXTI_LINE_77 0967 * @arg @ref LL_EXTI_LINE_78 0968 * @arg @ref LL_EXTI_LINE_79 0969 * @arg @ref LL_EXTI_LINE_80 0970 * @arg @ref LL_EXTI_LINE_82 0971 * @arg @ref LL_EXTI_LINE_84 0972 * @arg @ref LL_EXTI_LINE_85 0973 * @arg @ref LL_EXTI_LINE_86 0974 * @arg @ref LL_EXTI_LINE_87 0975 * @arg @ref LL_EXTI_LINE_ALL_64_95 0976 * @retval None 0977 */ 0978 __STATIC_INLINE void LL_C2_EXTI_DisableIT_64_95(uint32_t ExtiLine) 0979 { 0980 CLEAR_BIT(EXTI->C2IMR3, ExtiLine); 0981 } 0982 0983 0984 /** 0985 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31 for cpu2 0986 * @rmtoll C2IMR1 IMx LL_C2_EXTI_IsEnabledIT_0_31 0987 * @param ExtiLine This parameter can be one of the following values: 0988 * @arg @ref LL_EXTI_LINE_0 0989 * @arg @ref LL_EXTI_LINE_1 0990 * @arg @ref LL_EXTI_LINE_2 0991 * @arg @ref LL_EXTI_LINE_3 0992 * @arg @ref LL_EXTI_LINE_4 0993 * @arg @ref LL_EXTI_LINE_5 0994 * @arg @ref LL_EXTI_LINE_6 0995 * @arg @ref LL_EXTI_LINE_7 0996 * @arg @ref LL_EXTI_LINE_8 0997 * @arg @ref LL_EXTI_LINE_9 0998 * @arg @ref LL_EXTI_LINE_10 0999 * @arg @ref LL_EXTI_LINE_11 1000 * @arg @ref LL_EXTI_LINE_12 1001 * @arg @ref LL_EXTI_LINE_13 1002 * @arg @ref LL_EXTI_LINE_14 1003 * @arg @ref LL_EXTI_LINE_15 1004 * @arg @ref LL_EXTI_LINE_16 1005 * @arg @ref LL_EXTI_LINE_17 1006 * @arg @ref LL_EXTI_LINE_18 1007 * @arg @ref LL_EXTI_LINE_19 1008 * @arg @ref LL_EXTI_LINE_20 1009 * @arg @ref LL_EXTI_LINE_21 1010 * @arg @ref LL_EXTI_LINE_22 1011 * @arg @ref LL_EXTI_LINE_23 1012 * @arg @ref LL_EXTI_LINE_24 1013 * @arg @ref LL_EXTI_LINE_25 1014 * @arg @ref LL_EXTI_LINE_26 1015 * @arg @ref LL_EXTI_LINE_27 1016 * @arg @ref LL_EXTI_LINE_28 1017 * @arg @ref LL_EXTI_LINE_29 1018 * @arg @ref LL_EXTI_LINE_30 1019 * @arg @ref LL_EXTI_LINE_31 1020 * @arg @ref LL_EXTI_LINE_ALL_0_31 1021 * @retval State of bit (1 or 0). 1022 */ 1023 __STATIC_INLINE uint32_t LL_C2_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine) 1024 { 1025 return ((READ_BIT(EXTI->C2IMR1, ExtiLine) == (ExtiLine)) ? 1U : 0U); 1026 } 1027 1028 1029 /** 1030 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63 for cpu2 1031 * @rmtoll C2IMR2 IMx LL_C2_EXTI_IsEnabledIT_32_63 1032 * @param ExtiLine This parameter can be one of the following values: 1033 * @arg @ref LL_EXTI_LINE_32 1034 * @arg @ref LL_EXTI_LINE_33 1035 * @arg @ref LL_EXTI_LINE_34 1036 * @arg @ref LL_EXTI_LINE_35 1037 * @arg @ref LL_EXTI_LINE_36 1038 * @arg @ref LL_EXTI_LINE_37 1039 * @arg @ref LL_EXTI_LINE_38 1040 * @arg @ref LL_EXTI_LINE_39 1041 * @arg @ref LL_EXTI_LINE_40 1042 * @arg @ref LL_EXTI_LINE_41 1043 * @arg @ref LL_EXTI_LINE_42 1044 * @arg @ref LL_EXTI_LINE_43 1045 * @arg @ref LL_EXTI_LINE_44 1046 * @arg @ref LL_EXTI_LINE_46 1047 * @arg @ref LL_EXTI_LINE_47 1048 * @arg @ref LL_EXTI_LINE_48 1049 * @arg @ref LL_EXTI_LINE_49 1050 * @arg @ref LL_EXTI_LINE_50 1051 * @arg @ref LL_EXTI_LINE_51 1052 * @arg @ref LL_EXTI_LINE_52 1053 * @arg @ref LL_EXTI_LINE_53 1054 * @arg @ref LL_EXTI_LINE_54 1055 * @arg @ref LL_EXTI_LINE_55 1056 * @arg @ref LL_EXTI_LINE_56 1057 * @arg @ref LL_EXTI_LINE_57 1058 * @arg @ref LL_EXTI_LINE_58 1059 * @arg @ref LL_EXTI_LINE_59 1060 * @arg @ref LL_EXTI_LINE_60 1061 * @arg @ref LL_EXTI_LINE_61 1062 * @arg @ref LL_EXTI_LINE_62 1063 * @arg @ref LL_EXTI_LINE_63 1064 * @arg @ref LL_EXTI_LINE_ALL_32_63 1065 * @retval State of bit (1 or 0). 1066 */ 1067 __STATIC_INLINE uint32_t LL_C2_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine) 1068 { 1069 return ((READ_BIT(EXTI->C2IMR2, ExtiLine) == (ExtiLine))? 1U : 0U); 1070 } 1071 1072 1073 /** 1074 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 64 to 95 1075 * @rmtoll C2IMR3 IMx LL_C2_EXTI_IsEnabledIT_64_95 1076 * @param ExtiLine This parameter can be one of the following values: 1077 * @arg @ref LL_EXTI_LINE_64 1078 * @arg @ref LL_EXTI_LINE_65 1079 * @arg @ref LL_EXTI_LINE_66 1080 * @arg @ref LL_EXTI_LINE_67 1081 * @arg @ref LL_EXTI_LINE_68 1082 * @arg @ref LL_EXTI_LINE_69 1083 * @arg @ref LL_EXTI_LINE_70 1084 * @arg @ref LL_EXTI_LINE_71 1085 * @arg @ref LL_EXTI_LINE_72 1086 * @arg @ref LL_EXTI_LINE_73 1087 * @arg @ref LL_EXTI_LINE_74 1088 * @arg @ref LL_EXTI_LINE_75 1089 * @arg @ref LL_EXTI_LINE_76 1090 * @arg @ref LL_EXTI_LINE_77 1091 * @arg @ref LL_EXTI_LINE_78 1092 * @arg @ref LL_EXTI_LINE_79 1093 * @arg @ref LL_EXTI_LINE_80 1094 * @arg @ref LL_EXTI_LINE_82 1095 * @arg @ref LL_EXTI_LINE_84 1096 * @arg @ref LL_EXTI_LINE_85 1097 * @arg @ref LL_EXTI_LINE_86 1098 * @arg @ref LL_EXTI_LINE_87 1099 * @arg @ref LL_EXTI_LINE_ALL_64_95 1100 * @retval State of bit (1 or 0). 1101 */ 1102 __STATIC_INLINE uint32_t LL_C2_EXTI_IsEnabledIT_64_95(uint32_t ExtiLine) 1103 { 1104 return ((READ_BIT(EXTI->C2IMR3, ExtiLine) == (ExtiLine)) ? 1U : 0U); 1105 } 1106 1107 #endif /* DUAL_CORE */ 1108 1109 1110 /** 1111 * @} 1112 */ 1113 1114 /** @defgroup EXTI_LL_EF_Event_Management Event_Management 1115 * @ingroup RTEMSBSPsARMSTM32H7 1116 * @{ 1117 */ 1118 1119 /** 1120 * @brief Enable ExtiLine Event request for Lines in range 0 to 31 1121 * @rmtoll EMR1 EMx LL_EXTI_EnableEvent_0_31 1122 * @param ExtiLine This parameter can be one of the following values: 1123 * @arg @ref LL_EXTI_LINE_0 1124 * @arg @ref LL_EXTI_LINE_1 1125 * @arg @ref LL_EXTI_LINE_2 1126 * @arg @ref LL_EXTI_LINE_3 1127 * @arg @ref LL_EXTI_LINE_4 1128 * @arg @ref LL_EXTI_LINE_5 1129 * @arg @ref LL_EXTI_LINE_6 1130 * @arg @ref LL_EXTI_LINE_7 1131 * @arg @ref LL_EXTI_LINE_8 1132 * @arg @ref LL_EXTI_LINE_9 1133 * @arg @ref LL_EXTI_LINE_10 1134 * @arg @ref LL_EXTI_LINE_11 1135 * @arg @ref LL_EXTI_LINE_12 1136 * @arg @ref LL_EXTI_LINE_13 1137 * @arg @ref LL_EXTI_LINE_14 1138 * @arg @ref LL_EXTI_LINE_15 1139 * @arg @ref LL_EXTI_LINE_16 1140 * @arg @ref LL_EXTI_LINE_17 1141 * @arg @ref LL_EXTI_LINE_18 1142 * @arg @ref LL_EXTI_LINE_19 1143 * @arg @ref LL_EXTI_LINE_20 1144 * @arg @ref LL_EXTI_LINE_21 1145 * @arg @ref LL_EXTI_LINE_22 1146 * @arg @ref LL_EXTI_LINE_23 1147 * @arg @ref LL_EXTI_LINE_24 1148 * @arg @ref LL_EXTI_LINE_25 1149 * @arg @ref LL_EXTI_LINE_26 1150 * @arg @ref LL_EXTI_LINE_27 1151 * @arg @ref LL_EXTI_LINE_28 1152 * @arg @ref LL_EXTI_LINE_29 1153 * @arg @ref LL_EXTI_LINE_30 1154 * @arg @ref LL_EXTI_LINE_31 1155 * @arg @ref LL_EXTI_LINE_ALL_0_31 1156 * @retval None 1157 */ 1158 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine) 1159 { 1160 SET_BIT(EXTI->EMR1, ExtiLine); 1161 } 1162 1163 /** 1164 * @brief Enable ExtiLine Event request for Lines in range 32 to 63 1165 * @rmtoll EMR2 EMx LL_EXTI_EnableEvent_32_63 1166 * @param ExtiLine This parameter can be a combination of the following values: 1167 * @arg @ref LL_EXTI_LINE_32 1168 * @arg @ref LL_EXTI_LINE_33 1169 * @arg @ref LL_EXTI_LINE_34 1170 * @arg @ref LL_EXTI_LINE_35 1171 * @arg @ref LL_EXTI_LINE_36 1172 * @arg @ref LL_EXTI_LINE_37 1173 * @arg @ref LL_EXTI_LINE_38 1174 * @arg @ref LL_EXTI_LINE_39 1175 * @arg @ref LL_EXTI_LINE_40 1176 * @arg @ref LL_EXTI_LINE_41 1177 * @arg @ref LL_EXTI_LINE_42 1178 * @arg @ref LL_EXTI_LINE_43 1179 * @arg @ref LL_EXTI_LINE_44 (*) 1180 * @arg @ref LL_EXTI_LINE_46 (*) 1181 * @arg @ref LL_EXTI_LINE_47 1182 * @arg @ref LL_EXTI_LINE_48 1183 * @arg @ref LL_EXTI_LINE_49 1184 * @arg @ref LL_EXTI_LINE_50 1185 * @arg @ref LL_EXTI_LINE_51 1186 * @arg @ref LL_EXTI_LINE_52 1187 * @arg @ref LL_EXTI_LINE_53 1188 * @arg @ref LL_EXTI_LINE_54 1189 * @arg @ref LL_EXTI_LINE_55 1190 * @arg @ref LL_EXTI_LINE_56 1191 * @arg @ref LL_EXTI_LINE_57 (*) 1192 * @arg @ref LL_EXTI_LINE_58 1193 * @arg @ref LL_EXTI_LINE_59 (*) 1194 * @arg @ref LL_EXTI_LINE_60 1195 * @arg @ref LL_EXTI_LINE_61 1196 * @arg @ref LL_EXTI_LINE_62 1197 * @arg @ref LL_EXTI_LINE_63 1198 * @arg @ref LL_EXTI_LINE_ALL_32_63 1199 * 1200 * (*) value not defined in all devices. 1201 * @retval None 1202 */ 1203 __STATIC_INLINE void LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine) 1204 { 1205 SET_BIT(EXTI->EMR2, ExtiLine); 1206 } 1207 1208 /** 1209 * @brief Enable ExtiLine Event request for Lines in range 64 to 95 1210 * @rmtoll EMR3 EMx LL_EXTI_EnableEvent_64_95 1211 * @param ExtiLine This parameter can be a combination of the following values: 1212 * @arg @ref LL_EXTI_LINE_64 1213 * @arg @ref LL_EXTI_LINE_65 1214 * @arg @ref LL_EXTI_LINE_66 1215 * @arg @ref LL_EXTI_LINE_67 1216 * @arg @ref LL_EXTI_LINE_68 1217 * @arg @ref LL_EXTI_LINE_69 1218 * @arg @ref LL_EXTI_LINE_70 1219 * @arg @ref LL_EXTI_LINE_71 1220 * @arg @ref LL_EXTI_LINE_72 1221 * @arg @ref LL_EXTI_LINE_73 1222 * @arg @ref LL_EXTI_LINE_74 1223 * @arg @ref LL_EXTI_LINE_75 (*) 1224 * @arg @ref LL_EXTI_LINE_76 (*) 1225 * @arg @ref LL_EXTI_LINE_77 (**) 1226 * @arg @ref LL_EXTI_LINE_78 (**) 1227 * @arg @ref LL_EXTI_LINE_79 (**) 1228 * @arg @ref LL_EXTI_LINE_80 (**) 1229 * @arg @ref LL_EXTI_LINE_82 (**) 1230 * @arg @ref LL_EXTI_LINE_84 (**) 1231 * @arg @ref LL_EXTI_LINE_85 1232 * @arg @ref LL_EXTI_LINE_86 (*) 1233 * @arg @ref LL_EXTI_LINE_87 1234 * @arg @ref LL_EXTI_LINE_88 (*) 1235 * @arg @ref LL_EXTI_LINE_89 (*) 1236 * @arg @ref LL_EXTI_LINE_90 (*) 1237 * @arg @ref LL_EXTI_LINE_91 (*) 1238 * @arg @ref LL_EXTI_LINE_ALL_64_95 1239 * 1240 * (*) value not defined in all devices. 1241 * (**) value only defined in dual core devices. 1242 * @retval None 1243 */ 1244 __STATIC_INLINE void LL_EXTI_EnableEvent_64_95(uint32_t ExtiLine) 1245 { 1246 SET_BIT(EXTI->EMR3, ExtiLine); 1247 } 1248 1249 /** 1250 * @brief Disable ExtiLine Event request for Lines in range 0 to 31 1251 * @rmtoll EMR1 EMx LL_EXTI_DisableEvent_0_31 1252 * @param ExtiLine This parameter can be one of the following values: 1253 * @arg @ref LL_EXTI_LINE_0 1254 * @arg @ref LL_EXTI_LINE_1 1255 * @arg @ref LL_EXTI_LINE_2 1256 * @arg @ref LL_EXTI_LINE_3 1257 * @arg @ref LL_EXTI_LINE_4 1258 * @arg @ref LL_EXTI_LINE_5 1259 * @arg @ref LL_EXTI_LINE_6 1260 * @arg @ref LL_EXTI_LINE_7 1261 * @arg @ref LL_EXTI_LINE_8 1262 * @arg @ref LL_EXTI_LINE_9 1263 * @arg @ref LL_EXTI_LINE_10 1264 * @arg @ref LL_EXTI_LINE_11 1265 * @arg @ref LL_EXTI_LINE_12 1266 * @arg @ref LL_EXTI_LINE_13 1267 * @arg @ref LL_EXTI_LINE_14 1268 * @arg @ref LL_EXTI_LINE_15 1269 * @arg @ref LL_EXTI_LINE_16 1270 * @arg @ref LL_EXTI_LINE_17 1271 * @arg @ref LL_EXTI_LINE_18 1272 * @arg @ref LL_EXTI_LINE_19 1273 * @arg @ref LL_EXTI_LINE_20 1274 * @arg @ref LL_EXTI_LINE_21 1275 * @arg @ref LL_EXTI_LINE_22 1276 * @arg @ref LL_EXTI_LINE_23 1277 * @arg @ref LL_EXTI_LINE_24 1278 * @arg @ref LL_EXTI_LINE_25 1279 * @arg @ref LL_EXTI_LINE_26 1280 * @arg @ref LL_EXTI_LINE_27 1281 * @arg @ref LL_EXTI_LINE_28 1282 * @arg @ref LL_EXTI_LINE_29 1283 * @arg @ref LL_EXTI_LINE_30 1284 * @arg @ref LL_EXTI_LINE_31 1285 * @arg @ref LL_EXTI_LINE_ALL_0_31 1286 * @retval None 1287 */ 1288 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine) 1289 { 1290 CLEAR_BIT(EXTI->EMR1, ExtiLine); 1291 } 1292 1293 /** 1294 * @brief Disable ExtiLine Event request for Lines in range 32 to 63 1295 * @rmtoll EMR2 EMx LL_EXTI_DisableEvent_32_63 1296 * @param ExtiLine This parameter can be a combination of the following values: 1297 * @arg @ref LL_EXTI_LINE_32 1298 * @arg @ref LL_EXTI_LINE_33 1299 * @arg @ref LL_EXTI_LINE_34 1300 * @arg @ref LL_EXTI_LINE_35 1301 * @arg @ref LL_EXTI_LINE_36 1302 * @arg @ref LL_EXTI_LINE_37 1303 * @arg @ref LL_EXTI_LINE_38 1304 * @arg @ref LL_EXTI_LINE_39 1305 * @arg @ref LL_EXTI_LINE_40 1306 * @arg @ref LL_EXTI_LINE_41 1307 * @arg @ref LL_EXTI_LINE_42 1308 * @arg @ref LL_EXTI_LINE_43 1309 * @arg @ref LL_EXTI_LINE_44 (*) 1310 * @arg @ref LL_EXTI_LINE_46 (*) 1311 * @arg @ref LL_EXTI_LINE_47 1312 * @arg @ref LL_EXTI_LINE_48 1313 * @arg @ref LL_EXTI_LINE_49 1314 * @arg @ref LL_EXTI_LINE_50 1315 * @arg @ref LL_EXTI_LINE_51 1316 * @arg @ref LL_EXTI_LINE_52 1317 * @arg @ref LL_EXTI_LINE_53 1318 * @arg @ref LL_EXTI_LINE_54 1319 * @arg @ref LL_EXTI_LINE_55 1320 * @arg @ref LL_EXTI_LINE_56 1321 * @arg @ref LL_EXTI_LINE_57 (*) 1322 * @arg @ref LL_EXTI_LINE_58 1323 * @arg @ref LL_EXTI_LINE_59 (*) 1324 * @arg @ref LL_EXTI_LINE_60 1325 * @arg @ref LL_EXTI_LINE_61 1326 * @arg @ref LL_EXTI_LINE_62 1327 * @arg @ref LL_EXTI_LINE_63 1328 * @arg @ref LL_EXTI_LINE_ALL_32_63 1329 * 1330 * (*) value not defined in all devices. 1331 * @retval None 1332 */ 1333 __STATIC_INLINE void LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine) 1334 { 1335 CLEAR_BIT(EXTI->EMR2, ExtiLine); 1336 } 1337 1338 /** 1339 * @brief Disable ExtiLine Event request for Lines in range 64 to 95 1340 * @rmtoll EMR3 EMx LL_EXTI_DisableEvent_64_95 1341 * @param ExtiLine This parameter can be a combination of the following values: 1342 * @arg @ref LL_EXTI_LINE_64 1343 * @arg @ref LL_EXTI_LINE_65 1344 * @arg @ref LL_EXTI_LINE_66 1345 * @arg @ref LL_EXTI_LINE_67 1346 * @arg @ref LL_EXTI_LINE_68 1347 * @arg @ref LL_EXTI_LINE_69 1348 * @arg @ref LL_EXTI_LINE_70 1349 * @arg @ref LL_EXTI_LINE_71 1350 * @arg @ref LL_EXTI_LINE_72 1351 * @arg @ref LL_EXTI_LINE_73 1352 * @arg @ref LL_EXTI_LINE_74 1353 * @arg @ref LL_EXTI_LINE_75 (*) 1354 * @arg @ref LL_EXTI_LINE_76 (*) 1355 * @arg @ref LL_EXTI_LINE_77 (**) 1356 * @arg @ref LL_EXTI_LINE_78 (**) 1357 * @arg @ref LL_EXTI_LINE_79 (**) 1358 * @arg @ref LL_EXTI_LINE_80 (**) 1359 * @arg @ref LL_EXTI_LINE_82 (**) 1360 * @arg @ref LL_EXTI_LINE_84 (**) 1361 * @arg @ref LL_EXTI_LINE_85 1362 * @arg @ref LL_EXTI_LINE_86 (*) 1363 * @arg @ref LL_EXTI_LINE_87 1364 * @arg @ref LL_EXTI_LINE_88 (*) 1365 * @arg @ref LL_EXTI_LINE_89 (*) 1366 * @arg @ref LL_EXTI_LINE_90 (*) 1367 * @arg @ref LL_EXTI_LINE_91 (*) 1368 * @arg @ref LL_EXTI_LINE_ALL_64_95 1369 * 1370 * (*) value not defined in all devices. 1371 * (**) value only defined in dual core devices. 1372 * @retval None 1373 */ 1374 __STATIC_INLINE void LL_EXTI_DisableEvent_64_95(uint32_t ExtiLine) 1375 { 1376 CLEAR_BIT(EXTI->EMR3, ExtiLine); 1377 } 1378 1379 /** 1380 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31 1381 * @rmtoll EMR1 EMx LL_EXTI_IsEnabledEvent_0_31 1382 * @param ExtiLine This parameter can be one of the following values: 1383 * @arg @ref LL_EXTI_LINE_0 1384 * @arg @ref LL_EXTI_LINE_1 1385 * @arg @ref LL_EXTI_LINE_2 1386 * @arg @ref LL_EXTI_LINE_3 1387 * @arg @ref LL_EXTI_LINE_4 1388 * @arg @ref LL_EXTI_LINE_5 1389 * @arg @ref LL_EXTI_LINE_6 1390 * @arg @ref LL_EXTI_LINE_7 1391 * @arg @ref LL_EXTI_LINE_8 1392 * @arg @ref LL_EXTI_LINE_9 1393 * @arg @ref LL_EXTI_LINE_10 1394 * @arg @ref LL_EXTI_LINE_11 1395 * @arg @ref LL_EXTI_LINE_12 1396 * @arg @ref LL_EXTI_LINE_13 1397 * @arg @ref LL_EXTI_LINE_14 1398 * @arg @ref LL_EXTI_LINE_15 1399 * @arg @ref LL_EXTI_LINE_16 1400 * @arg @ref LL_EXTI_LINE_17 1401 * @arg @ref LL_EXTI_LINE_18 1402 * @arg @ref LL_EXTI_LINE_19 1403 * @arg @ref LL_EXTI_LINE_20 1404 * @arg @ref LL_EXTI_LINE_21 1405 * @arg @ref LL_EXTI_LINE_22 1406 * @arg @ref LL_EXTI_LINE_23 1407 * @arg @ref LL_EXTI_LINE_24 1408 * @arg @ref LL_EXTI_LINE_25 1409 * @arg @ref LL_EXTI_LINE_26 1410 * @arg @ref LL_EXTI_LINE_27 1411 * @arg @ref LL_EXTI_LINE_28 1412 * @arg @ref LL_EXTI_LINE_29 1413 * @arg @ref LL_EXTI_LINE_30 1414 * @arg @ref LL_EXTI_LINE_31 1415 * @arg @ref LL_EXTI_LINE_ALL_0_31 1416 * @note Please check each device line mapping for EXTI Line availability 1417 * @retval State of bit (1 or 0). 1418 */ 1419 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine) 1420 { 1421 return ((READ_BIT(EXTI->EMR1, ExtiLine) == (ExtiLine)) ? 1U : 0U); 1422 } 1423 1424 /** 1425 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63 1426 * @rmtoll EMR2 EMx LL_EXTI_IsEnabledEvent_32_63 1427 * @param ExtiLine This parameter can be a combination of the following values: 1428 * @arg @ref LL_EXTI_LINE_32 1429 * @arg @ref LL_EXTI_LINE_33 1430 * @arg @ref LL_EXTI_LINE_34 1431 * @arg @ref LL_EXTI_LINE_35 1432 * @arg @ref LL_EXTI_LINE_36 1433 * @arg @ref LL_EXTI_LINE_37 1434 * @arg @ref LL_EXTI_LINE_38 1435 * @arg @ref LL_EXTI_LINE_39 1436 * @arg @ref LL_EXTI_LINE_40 1437 * @arg @ref LL_EXTI_LINE_41 1438 * @arg @ref LL_EXTI_LINE_42 1439 * @arg @ref LL_EXTI_LINE_43 1440 * @arg @ref LL_EXTI_LINE_44 (*) 1441 * @arg @ref LL_EXTI_LINE_46 (*) 1442 * @arg @ref LL_EXTI_LINE_47 1443 * @arg @ref LL_EXTI_LINE_48 1444 * @arg @ref LL_EXTI_LINE_49 1445 * @arg @ref LL_EXTI_LINE_50 1446 * @arg @ref LL_EXTI_LINE_51 1447 * @arg @ref LL_EXTI_LINE_52 1448 * @arg @ref LL_EXTI_LINE_53 1449 * @arg @ref LL_EXTI_LINE_54 1450 * @arg @ref LL_EXTI_LINE_55 1451 * @arg @ref LL_EXTI_LINE_56 1452 * @arg @ref LL_EXTI_LINE_57 (*) 1453 * @arg @ref LL_EXTI_LINE_58 1454 * @arg @ref LL_EXTI_LINE_59 (*) 1455 * @arg @ref LL_EXTI_LINE_60 1456 * @arg @ref LL_EXTI_LINE_61 1457 * @arg @ref LL_EXTI_LINE_62 1458 * @arg @ref LL_EXTI_LINE_63 1459 * @arg @ref LL_EXTI_LINE_ALL_32_63 1460 * 1461 * (*) value not defined in all devices. 1462 * @retval State of bit (1 or 0). 1463 */ 1464 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine) 1465 { 1466 return ((READ_BIT(EXTI->EMR2, ExtiLine) == (ExtiLine)) ? 1U : 0U); 1467 } 1468 1469 /** 1470 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 64 to 95 1471 * @rmtoll EMR3 EMx LL_EXTI_IsEnabledEvent_64_95 1472 * @param ExtiLine This parameter can be a combination of the following values: 1473 * @arg @ref LL_EXTI_LINE_64 1474 * @arg @ref LL_EXTI_LINE_65 1475 * @arg @ref LL_EXTI_LINE_66 1476 * @arg @ref LL_EXTI_LINE_67 1477 * @arg @ref LL_EXTI_LINE_68 1478 * @arg @ref LL_EXTI_LINE_69 1479 * @arg @ref LL_EXTI_LINE_70 1480 * @arg @ref LL_EXTI_LINE_71 1481 * @arg @ref LL_EXTI_LINE_72 1482 * @arg @ref LL_EXTI_LINE_73 1483 * @arg @ref LL_EXTI_LINE_74 1484 * @arg @ref LL_EXTI_LINE_75 (*) 1485 * @arg @ref LL_EXTI_LINE_76 (*) 1486 * @arg @ref LL_EXTI_LINE_77 (**) 1487 * @arg @ref LL_EXTI_LINE_78 (**) 1488 * @arg @ref LL_EXTI_LINE_79 (**) 1489 * @arg @ref LL_EXTI_LINE_80 (**) 1490 * @arg @ref LL_EXTI_LINE_82 (**) 1491 * @arg @ref LL_EXTI_LINE_84 (**) 1492 * @arg @ref LL_EXTI_LINE_85 1493 * @arg @ref LL_EXTI_LINE_86 (*) 1494 * @arg @ref LL_EXTI_LINE_87 1495 * @arg @ref LL_EXTI_LINE_88 (*) 1496 * @arg @ref LL_EXTI_LINE_89 (*) 1497 * @arg @ref LL_EXTI_LINE_90 (*) 1498 * @arg @ref LL_EXTI_LINE_91 (*) 1499 * @arg @ref LL_EXTI_LINE_ALL_64_95 1500 * 1501 * (*) value not defined in all devices. 1502 * (**) value only defined in dual core devices. 1503 * @retval State of bit (1 or 0). 1504 */ 1505 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_64_95(uint32_t ExtiLine) 1506 { 1507 return ((READ_BIT(EXTI->EMR3, ExtiLine) == (ExtiLine)) ? 1U : 0U); 1508 } 1509 1510 #if defined(DUAL_CORE) 1511 1512 /** 1513 * @brief Enable ExtiLine Event request for Lines in range 0 to 31 for cpu2 1514 * @rmtoll C2EMR1 EMx LL_C2_EXTI_EnableEvent_0_31 1515 * @param ExtiLine This parameter can be one of the following values: 1516 * @arg @ref LL_EXTI_LINE_0 1517 * @arg @ref LL_EXTI_LINE_1 1518 * @arg @ref LL_EXTI_LINE_2 1519 * @arg @ref LL_EXTI_LINE_3 1520 * @arg @ref LL_EXTI_LINE_4 1521 * @arg @ref LL_EXTI_LINE_5 1522 * @arg @ref LL_EXTI_LINE_6 1523 * @arg @ref LL_EXTI_LINE_7 1524 * @arg @ref LL_EXTI_LINE_8 1525 * @arg @ref LL_EXTI_LINE_9 1526 * @arg @ref LL_EXTI_LINE_10 1527 * @arg @ref LL_EXTI_LINE_11 1528 * @arg @ref LL_EXTI_LINE_12 1529 * @arg @ref LL_EXTI_LINE_13 1530 * @arg @ref LL_EXTI_LINE_14 1531 * @arg @ref LL_EXTI_LINE_15 1532 * @arg @ref LL_EXTI_LINE_16 1533 * @arg @ref LL_EXTI_LINE_17 1534 * @arg @ref LL_EXTI_LINE_18 1535 * @arg @ref LL_EXTI_LINE_19 1536 * @arg @ref LL_EXTI_LINE_20 1537 * @arg @ref LL_EXTI_LINE_21 1538 * @arg @ref LL_EXTI_LINE_22 1539 * @arg @ref LL_EXTI_LINE_23 1540 * @arg @ref LL_EXTI_LINE_24 1541 * @arg @ref LL_EXTI_LINE_25 1542 * @arg @ref LL_EXTI_LINE_26 1543 * @arg @ref LL_EXTI_LINE_27 1544 * @arg @ref LL_EXTI_LINE_28 1545 * @arg @ref LL_EXTI_LINE_29 1546 * @arg @ref LL_EXTI_LINE_30 1547 * @arg @ref LL_EXTI_LINE_31 1548 * @arg @ref LL_EXTI_LINE_ALL_0_31 1549 * @retval None 1550 */ 1551 __STATIC_INLINE void LL_C2_EXTI_EnableEvent_0_31(uint32_t ExtiLine) 1552 { 1553 SET_BIT(EXTI->C2EMR1, ExtiLine); 1554 } 1555 1556 1557 /** 1558 * @brief Enable ExtiLine Event request for Lines in range 32 to 63 for cpu2 1559 * @rmtoll C2EMR2 EMx LL_C2_EXTI_EnableEvent_32_63 1560 * @param ExtiLine This parameter can be a combination of the following values: 1561 * @arg @ref LL_EXTI_LINE_32 1562 * @arg @ref LL_EXTI_LINE_33 1563 * @arg @ref LL_EXTI_LINE_34 1564 * @arg @ref LL_EXTI_LINE_35 1565 * @arg @ref LL_EXTI_LINE_36 1566 * @arg @ref LL_EXTI_LINE_37 1567 * @arg @ref LL_EXTI_LINE_38 1568 * @arg @ref LL_EXTI_LINE_39 1569 * @arg @ref LL_EXTI_LINE_40 1570 * @arg @ref LL_EXTI_LINE_41 1571 * @arg @ref LL_EXTI_LINE_42 1572 * @arg @ref LL_EXTI_LINE_43 1573 * @arg @ref LL_EXTI_LINE_44 1574 * @arg @ref LL_EXTI_LINE_46 1575 * @arg @ref LL_EXTI_LINE_47 1576 * @arg @ref LL_EXTI_LINE_48 1577 * @arg @ref LL_EXTI_LINE_49 1578 * @arg @ref LL_EXTI_LINE_50 1579 * @arg @ref LL_EXTI_LINE_51 1580 * @arg @ref LL_EXTI_LINE_52 1581 * @arg @ref LL_EXTI_LINE_53 1582 * @arg @ref LL_EXTI_LINE_54 1583 * @arg @ref LL_EXTI_LINE_55 1584 * @arg @ref LL_EXTI_LINE_56 1585 * @arg @ref LL_EXTI_LINE_57 1586 * @arg @ref LL_EXTI_LINE_58 1587 * @arg @ref LL_EXTI_LINE_59 1588 * @arg @ref LL_EXTI_LINE_60 1589 * @arg @ref LL_EXTI_LINE_61 1590 * @arg @ref LL_EXTI_LINE_62 1591 * @arg @ref LL_EXTI_LINE_63 1592 * @arg @ref LL_EXTI_LINE_ALL_32_63 1593 * @retval None 1594 */ 1595 __STATIC_INLINE void LL_C2_EXTI_EnableEvent_32_63(uint32_t ExtiLine) 1596 { 1597 SET_BIT(EXTI->C2EMR2, ExtiLine); 1598 } 1599 1600 /** 1601 * @brief Enable ExtiLine Event request for Lines in range 64 to 95 for cpu2 1602 * @rmtoll C2EMR3 EMx LL_C2_EXTI_EnableEvent_64_95 1603 * @param ExtiLine This parameter can be a combination of the following values: 1604 * @arg @ref LL_EXTI_LINE_64 1605 * @arg @ref LL_EXTI_LINE_65 1606 * @arg @ref LL_EXTI_LINE_66 1607 * @arg @ref LL_EXTI_LINE_67 1608 * @arg @ref LL_EXTI_LINE_68 1609 * @arg @ref LL_EXTI_LINE_69 1610 * @arg @ref LL_EXTI_LINE_70 1611 * @arg @ref LL_EXTI_LINE_71 1612 * @arg @ref LL_EXTI_LINE_72 1613 * @arg @ref LL_EXTI_LINE_73 1614 * @arg @ref LL_EXTI_LINE_74 1615 * @arg @ref LL_EXTI_LINE_75 1616 * @arg @ref LL_EXTI_LINE_76 1617 * @arg @ref LL_EXTI_LINE_77 1618 * @arg @ref LL_EXTI_LINE_78 1619 * @arg @ref LL_EXTI_LINE_79 1620 * @arg @ref LL_EXTI_LINE_80 1621 * @arg @ref LL_EXTI_LINE_82 1622 * @arg @ref LL_EXTI_LINE_84 1623 * @arg @ref LL_EXTI_LINE_85 1624 * @arg @ref LL_EXTI_LINE_86 1625 * @arg @ref LL_EXTI_LINE_87 1626 * @arg @ref LL_EXTI_LINE_ALL_64_95 1627 * @retval None 1628 */ 1629 __STATIC_INLINE void LL_C2_EXTI_EnableEvent_64_95(uint32_t ExtiLine) 1630 { 1631 SET_BIT(EXTI->C2EMR3, ExtiLine); 1632 } 1633 1634 1635 /** 1636 * @brief Disable ExtiLine Event request for Lines in range 0 to 31 for cpu2 1637 * @rmtoll C2EMR1 EMx LL_C2_EXTI_DisableEvent_0_31 1638 * @param ExtiLine This parameter can be one of the following values: 1639 * @arg @ref LL_EXTI_LINE_0 1640 * @arg @ref LL_EXTI_LINE_1 1641 * @arg @ref LL_EXTI_LINE_2 1642 * @arg @ref LL_EXTI_LINE_3 1643 * @arg @ref LL_EXTI_LINE_4 1644 * @arg @ref LL_EXTI_LINE_5 1645 * @arg @ref LL_EXTI_LINE_6 1646 * @arg @ref LL_EXTI_LINE_7 1647 * @arg @ref LL_EXTI_LINE_8 1648 * @arg @ref LL_EXTI_LINE_9 1649 * @arg @ref LL_EXTI_LINE_10 1650 * @arg @ref LL_EXTI_LINE_11 1651 * @arg @ref LL_EXTI_LINE_12 1652 * @arg @ref LL_EXTI_LINE_13 1653 * @arg @ref LL_EXTI_LINE_14 1654 * @arg @ref LL_EXTI_LINE_15 1655 * @arg @ref LL_EXTI_LINE_16 1656 * @arg @ref LL_EXTI_LINE_17 1657 * @arg @ref LL_EXTI_LINE_18 1658 * @arg @ref LL_EXTI_LINE_19 1659 * @arg @ref LL_EXTI_LINE_20 1660 * @arg @ref LL_EXTI_LINE_21 1661 * @arg @ref LL_EXTI_LINE_22 1662 * @arg @ref LL_EXTI_LINE_23 1663 * @arg @ref LL_EXTI_LINE_24 1664 * @arg @ref LL_EXTI_LINE_25 1665 * @arg @ref LL_EXTI_LINE_26 1666 * @arg @ref LL_EXTI_LINE_27 1667 * @arg @ref LL_EXTI_LINE_28 1668 * @arg @ref LL_EXTI_LINE_29 1669 * @arg @ref LL_EXTI_LINE_30 1670 * @arg @ref LL_EXTI_LINE_31 1671 * @arg @ref LL_EXTI_LINE_ALL_0_31 1672 * @retval None 1673 */ 1674 __STATIC_INLINE void LL_C2_EXTI_DisableEvent_0_31(uint32_t ExtiLine) 1675 { 1676 CLEAR_BIT(EXTI->C2EMR1, ExtiLine); 1677 } 1678 1679 1680 /** 1681 * @brief Disable ExtiLine Event request for Lines in range 32 to 63 for cpu2 1682 * @rmtoll C2EMR2 EMx LL_C2_EXTI_DisableEvent_32_63 1683 * @param ExtiLine This parameter can be a combination of the following values: 1684 * @arg @ref LL_EXTI_LINE_32 1685 * @arg @ref LL_EXTI_LINE_33 1686 * @arg @ref LL_EXTI_LINE_34 1687 * @arg @ref LL_EXTI_LINE_35 1688 * @arg @ref LL_EXTI_LINE_36 1689 * @arg @ref LL_EXTI_LINE_37 1690 * @arg @ref LL_EXTI_LINE_38 1691 * @arg @ref LL_EXTI_LINE_39 1692 * @arg @ref LL_EXTI_LINE_40 1693 * @arg @ref LL_EXTI_LINE_41 1694 * @arg @ref LL_EXTI_LINE_42 1695 * @arg @ref LL_EXTI_LINE_43 1696 * @arg @ref LL_EXTI_LINE_44 1697 * @arg @ref LL_EXTI_LINE_46 1698 * @arg @ref LL_EXTI_LINE_47 1699 * @arg @ref LL_EXTI_LINE_48 1700 * @arg @ref LL_EXTI_LINE_49 1701 * @arg @ref LL_EXTI_LINE_50 1702 * @arg @ref LL_EXTI_LINE_51 1703 * @arg @ref LL_EXTI_LINE_52 1704 * @arg @ref LL_EXTI_LINE_53 1705 * @arg @ref LL_EXTI_LINE_54 1706 * @arg @ref LL_EXTI_LINE_55 1707 * @arg @ref LL_EXTI_LINE_56 1708 * @arg @ref LL_EXTI_LINE_57 1709 * @arg @ref LL_EXTI_LINE_58 1710 * @arg @ref LL_EXTI_LINE_59 1711 * @arg @ref LL_EXTI_LINE_60 1712 * @arg @ref LL_EXTI_LINE_61 1713 * @arg @ref LL_EXTI_LINE_62 1714 * @arg @ref LL_EXTI_LINE_63 1715 * @arg @ref LL_EXTI_LINE_ALL_32_63 1716 * @retval None 1717 */ 1718 __STATIC_INLINE void LL_C2_EXTI_DisableEvent_32_63(uint32_t ExtiLine) 1719 { 1720 CLEAR_BIT(EXTI->C2EMR2, ExtiLine); 1721 } 1722 1723 1724 /** 1725 * @brief Disable ExtiLine Event request for Lines in range 64 to 95 for cpu2 1726 * @rmtoll C2EMR3 EMx LL_C2_EXTI_DisableEvent_64_95 1727 * @param ExtiLine This parameter can be a combination of the following values: 1728 * @arg @ref LL_EXTI_LINE_64 1729 * @arg @ref LL_EXTI_LINE_65 1730 * @arg @ref LL_EXTI_LINE_66 1731 * @arg @ref LL_EXTI_LINE_67 1732 * @arg @ref LL_EXTI_LINE_68 1733 * @arg @ref LL_EXTI_LINE_69 1734 * @arg @ref LL_EXTI_LINE_70 1735 * @arg @ref LL_EXTI_LINE_71 1736 * @arg @ref LL_EXTI_LINE_72 1737 * @arg @ref LL_EXTI_LINE_73 1738 * @arg @ref LL_EXTI_LINE_74 1739 * @arg @ref LL_EXTI_LINE_75 1740 * @arg @ref LL_EXTI_LINE_76 1741 * @arg @ref LL_EXTI_LINE_77 1742 * @arg @ref LL_EXTI_LINE_78 1743 * @arg @ref LL_EXTI_LINE_79 1744 * @arg @ref LL_EXTI_LINE_80 1745 * @arg @ref LL_EXTI_LINE_82 1746 * @arg @ref LL_EXTI_LINE_84 1747 * @arg @ref LL_EXTI_LINE_85 1748 * @arg @ref LL_EXTI_LINE_86 1749 * @arg @ref LL_EXTI_LINE_87 1750 * @arg @ref LL_EXTI_LINE_ALL_64_95 1751 * @retval None 1752 */ 1753 __STATIC_INLINE void LL_C2_EXTI_DisableEvent_64_95(uint32_t ExtiLine) 1754 { 1755 CLEAR_BIT(EXTI->C2EMR3, ExtiLine); 1756 } 1757 1758 1759 /** 1760 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31 for cpu2 1761 * @rmtoll C2EMR1 EMx LL_C2_EXTI_IsEnabledEvent_0_31 1762 * @param ExtiLine This parameter can be one of the following values: 1763 * @arg @ref LL_EXTI_LINE_0 1764 * @arg @ref LL_EXTI_LINE_1 1765 * @arg @ref LL_EXTI_LINE_2 1766 * @arg @ref LL_EXTI_LINE_3 1767 * @arg @ref LL_EXTI_LINE_4 1768 * @arg @ref LL_EXTI_LINE_5 1769 * @arg @ref LL_EXTI_LINE_6 1770 * @arg @ref LL_EXTI_LINE_7 1771 * @arg @ref LL_EXTI_LINE_8 1772 * @arg @ref LL_EXTI_LINE_9 1773 * @arg @ref LL_EXTI_LINE_10 1774 * @arg @ref LL_EXTI_LINE_11 1775 * @arg @ref LL_EXTI_LINE_12 1776 * @arg @ref LL_EXTI_LINE_13 1777 * @arg @ref LL_EXTI_LINE_14 1778 * @arg @ref LL_EXTI_LINE_15 1779 * @arg @ref LL_EXTI_LINE_16 1780 * @arg @ref LL_EXTI_LINE_17 1781 * @arg @ref LL_EXTI_LINE_18 1782 * @arg @ref LL_EXTI_LINE_19 1783 * @arg @ref LL_EXTI_LINE_20 1784 * @arg @ref LL_EXTI_LINE_21 1785 * @arg @ref LL_EXTI_LINE_22 1786 * @arg @ref LL_EXTI_LINE_23 1787 * @arg @ref LL_EXTI_LINE_24 1788 * @arg @ref LL_EXTI_LINE_25 1789 * @arg @ref LL_EXTI_LINE_26 1790 * @arg @ref LL_EXTI_LINE_27 1791 * @arg @ref LL_EXTI_LINE_28 1792 * @arg @ref LL_EXTI_LINE_29 1793 * @arg @ref LL_EXTI_LINE_30 1794 * @arg @ref LL_EXTI_LINE_31 1795 * @arg @ref LL_EXTI_LINE_ALL_0_31 1796 * @note Please check each device line mapping for EXTI Line availability 1797 * @retval State of bit (1 or 0). 1798 */ 1799 __STATIC_INLINE uint32_t LL_C2_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine) 1800 { 1801 return ((READ_BIT(EXTI->C2EMR1, ExtiLine) == (ExtiLine)) ? 1U : 0U); 1802 } 1803 1804 1805 /** 1806 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63 for cpu2 1807 * @rmtoll C2EMR2 EMx LL_C2_EXTI_IsEnabledEvent_32_63 1808 * @param ExtiLine This parameter can be a combination of the following values: 1809 * @arg @ref LL_EXTI_LINE_32 1810 * @arg @ref LL_EXTI_LINE_33 1811 * @arg @ref LL_EXTI_LINE_34 1812 * @arg @ref LL_EXTI_LINE_35 1813 * @arg @ref LL_EXTI_LINE_36 1814 * @arg @ref LL_EXTI_LINE_37 1815 * @arg @ref LL_EXTI_LINE_38 1816 * @arg @ref LL_EXTI_LINE_39 1817 * @arg @ref LL_EXTI_LINE_40 1818 * @arg @ref LL_EXTI_LINE_41 1819 * @arg @ref LL_EXTI_LINE_42 1820 * @arg @ref LL_EXTI_LINE_43 1821 * @arg @ref LL_EXTI_LINE_44 1822 * @arg @ref LL_EXTI_LINE_46 1823 * @arg @ref LL_EXTI_LINE_47 1824 * @arg @ref LL_EXTI_LINE_48 1825 * @arg @ref LL_EXTI_LINE_49 1826 * @arg @ref LL_EXTI_LINE_50 1827 * @arg @ref LL_EXTI_LINE_51 1828 * @arg @ref LL_EXTI_LINE_52 1829 * @arg @ref LL_EXTI_LINE_53 1830 * @arg @ref LL_EXTI_LINE_54 1831 * @arg @ref LL_EXTI_LINE_55 1832 * @arg @ref LL_EXTI_LINE_56 1833 * @arg @ref LL_EXTI_LINE_57 1834 * @arg @ref LL_EXTI_LINE_58 1835 * @arg @ref LL_EXTI_LINE_59 1836 * @arg @ref LL_EXTI_LINE_60 1837 * @arg @ref LL_EXTI_LINE_61 1838 * @arg @ref LL_EXTI_LINE_62 1839 * @arg @ref LL_EXTI_LINE_63 1840 * @arg @ref LL_EXTI_LINE_ALL_32_63 1841 * @retval State of bit (1 or 0). 1842 */ 1843 __STATIC_INLINE uint32_t LL_C2_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine) 1844 { 1845 return ((READ_BIT(EXTI->C2EMR2, ExtiLine) == (ExtiLine)) ? 1U : 0U); 1846 } 1847 1848 1849 /** 1850 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 64 to 95 for cpu2 1851 * @rmtoll C2EMR3 EMx LL_C2_EXTI_IsEnabledEvent_64_95 1852 * @param ExtiLine This parameter can be a combination of the following values: 1853 * @arg @ref LL_EXTI_LINE_64 1854 * @arg @ref LL_EXTI_LINE_65 1855 * @arg @ref LL_EXTI_LINE_66 1856 * @arg @ref LL_EXTI_LINE_67 1857 * @arg @ref LL_EXTI_LINE_68 1858 * @arg @ref LL_EXTI_LINE_69 1859 * @arg @ref LL_EXTI_LINE_70 1860 * @arg @ref LL_EXTI_LINE_71 1861 * @arg @ref LL_EXTI_LINE_72 1862 * @arg @ref LL_EXTI_LINE_73 1863 * @arg @ref LL_EXTI_LINE_74 1864 * @arg @ref LL_EXTI_LINE_75 1865 * @arg @ref LL_EXTI_LINE_76 1866 * @arg @ref LL_EXTI_LINE_77 1867 * @arg @ref LL_EXTI_LINE_78 1868 * @arg @ref LL_EXTI_LINE_79 1869 * @arg @ref LL_EXTI_LINE_80 1870 * @arg @ref LL_EXTI_LINE_82 1871 * @arg @ref LL_EXTI_LINE_84 1872 * @arg @ref LL_EXTI_LINE_85 1873 * @arg @ref LL_EXTI_LINE_86 1874 * @arg @ref LL_EXTI_LINE_87 1875 * @arg @ref LL_EXTI_LINE_ALL_64_95 1876 * @retval State of bit (1 or 0). 1877 */ 1878 __STATIC_INLINE uint32_t LL_C2_EXTI_IsEnabledEvent_64_95(uint32_t ExtiLine) 1879 { 1880 return ((READ_BIT(EXTI->C2EMR3, ExtiLine) == (ExtiLine)) ? 1U : 0U); 1881 } 1882 1883 1884 #endif /* DUAL_CORE */ 1885 1886 /** 1887 * @} 1888 */ 1889 1890 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management 1891 * @ingroup RTEMSBSPsARMSTM32H7 1892 * @{ 1893 */ 1894 1895 /** 1896 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31 1897 * @note The configurable wakeup lines are edge-triggered. No glitch must be 1898 * generated on these lines. If a rising edge on a configurable interrupt 1899 * line occurs during a write operation in the EXTI_RTSR register, the 1900 * pending bit is not set. 1901 * Rising and falling edge triggers can be set for 1902 * the same interrupt line. In this case, both generate a trigger 1903 * condition. 1904 * @rmtoll RTSR1 RTx LL_EXTI_EnableRisingTrig_0_31 1905 * @param ExtiLine This parameter can be a combination of the following values: 1906 * @arg @ref LL_EXTI_LINE_0 1907 * @arg @ref LL_EXTI_LINE_1 1908 * @arg @ref LL_EXTI_LINE_2 1909 * @arg @ref LL_EXTI_LINE_3 1910 * @arg @ref LL_EXTI_LINE_4 1911 * @arg @ref LL_EXTI_LINE_5 1912 * @arg @ref LL_EXTI_LINE_6 1913 * @arg @ref LL_EXTI_LINE_7 1914 * @arg @ref LL_EXTI_LINE_8 1915 * @arg @ref LL_EXTI_LINE_9 1916 * @arg @ref LL_EXTI_LINE_10 1917 * @arg @ref LL_EXTI_LINE_11 1918 * @arg @ref LL_EXTI_LINE_12 1919 * @arg @ref LL_EXTI_LINE_13 1920 * @arg @ref LL_EXTI_LINE_14 1921 * @arg @ref LL_EXTI_LINE_15 1922 * @arg @ref LL_EXTI_LINE_16 1923 * @arg @ref LL_EXTI_LINE_17 1924 * @arg @ref LL_EXTI_LINE_18 1925 * @arg @ref LL_EXTI_LINE_19 1926 * @arg @ref LL_EXTI_LINE_20 1927 * @arg @ref LL_EXTI_LINE_21 1928 * @retval None 1929 */ 1930 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine) 1931 { 1932 SET_BIT(EXTI->RTSR1, ExtiLine); 1933 1934 } 1935 1936 /** 1937 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 32 to 63 1938 * @note The configurable wakeup lines are edge-triggered. No glitch must be 1939 * generated on these lines. If a rising edge on a configurable interrupt 1940 * line occurs during a write operation in the EXTI_RTSR register, the 1941 * pending bit is not set.Rising and falling edge triggers can be set for 1942 * the same interrupt line. In this case, both generate a trigger 1943 * condition. 1944 * @rmtoll RTSR2 RTx LL_EXTI_EnableRisingTrig_32_63 1945 * @param ExtiLine This parameter can be a combination of the following values: 1946 * @arg @ref LL_EXTI_LINE_49 1947 * @arg @ref LL_EXTI_LINE_51 1948 * @retval None 1949 */ 1950 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine) 1951 { 1952 SET_BIT(EXTI->RTSR2, ExtiLine); 1953 } 1954 1955 /** 1956 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 64 to 95 1957 * @note The configurable wakeup lines are edge-triggered. No glitch must be 1958 * generated on these lines. If a rising edge on a configurable interrupt 1959 * line occurs during a write operation in the EXTI_RTSR register, the 1960 * pending bit is not set.Rising and falling edge triggers can be set for 1961 * the same interrupt line. In this case, both generate a trigger 1962 * condition. 1963 * @rmtoll RTSR3 RTx LL_EXTI_EnableRisingTrig_64_95 1964 * @param ExtiLine This parameter can be a combination of the following values: 1965 * @arg @ref LL_EXTI_LINE_82 (*) 1966 * @arg @ref LL_EXTI_LINE_84 (*) 1967 * @arg @ref LL_EXTI_LINE_85 1968 * @arg @ref LL_EXTI_LINE_86 (**) 1969 * 1970 * (*) value only defined in dual core devices. 1971 * (**) value not defined in all devices. 1972 * @retval None 1973 */ 1974 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_64_95(uint32_t ExtiLine) 1975 { 1976 SET_BIT(EXTI->RTSR3, ExtiLine); 1977 } 1978 1979 /** 1980 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31 1981 * @note The configurable wakeup lines are edge-triggered. No glitch must be 1982 * generated on these lines. If a rising edge on a configurable interrupt 1983 * line occurs during a write operation in the EXTI_RTSR register, the 1984 * pending bit is not set. 1985 * Rising and falling edge triggers can be set for 1986 * the same interrupt line. In this case, both generate a trigger 1987 * condition. 1988 * @rmtoll RTSR1 RTx LL_EXTI_DisableRisingTrig_0_31 1989 * @param ExtiLine This parameter can be a combination of the following values: 1990 * @arg @ref LL_EXTI_LINE_0 1991 * @arg @ref LL_EXTI_LINE_1 1992 * @arg @ref LL_EXTI_LINE_2 1993 * @arg @ref LL_EXTI_LINE_3 1994 * @arg @ref LL_EXTI_LINE_4 1995 * @arg @ref LL_EXTI_LINE_5 1996 * @arg @ref LL_EXTI_LINE_6 1997 * @arg @ref LL_EXTI_LINE_7 1998 * @arg @ref LL_EXTI_LINE_8 1999 * @arg @ref LL_EXTI_LINE_9 2000 * @arg @ref LL_EXTI_LINE_10 2001 * @arg @ref LL_EXTI_LINE_11 2002 * @arg @ref LL_EXTI_LINE_12 2003 * @arg @ref LL_EXTI_LINE_13 2004 * @arg @ref LL_EXTI_LINE_14 2005 * @arg @ref LL_EXTI_LINE_15 2006 * @arg @ref LL_EXTI_LINE_16 2007 * @arg @ref LL_EXTI_LINE_17 2008 * @arg @ref LL_EXTI_LINE_18 2009 * @arg @ref LL_EXTI_LINE_19 2010 * @arg @ref LL_EXTI_LINE_20 2011 * @arg @ref LL_EXTI_LINE_21 2012 * @retval None 2013 */ 2014 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine) 2015 { 2016 CLEAR_BIT(EXTI->RTSR1, ExtiLine); 2017 2018 } 2019 2020 /** 2021 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 32 to 63 2022 * @note The configurable wakeup lines are edge-triggered. No glitch must be 2023 * generated on these lines. If a rising edge on a configurable interrupt 2024 * line occurs during a write operation in the EXTI_RTSR register, the 2025 * pending bit is not set. 2026 * Rising and falling edge triggers can be set for 2027 * the same interrupt line. In this case, both generate a trigger 2028 * condition. 2029 * @rmtoll RTSR2 RTx LL_EXTI_DisableRisingTrig_32_63 2030 * @param ExtiLine This parameter can be a combination of the following values: 2031 * @arg @ref LL_EXTI_LINE_49 2032 * @arg @ref LL_EXTI_LINE_51 2033 * @retval None 2034 */ 2035 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine) 2036 { 2037 CLEAR_BIT(EXTI->RTSR2, ExtiLine); 2038 } 2039 2040 /** 2041 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 64 to 95 2042 * @note The configurable wakeup lines are edge-triggered. No glitch must be 2043 * generated on these lines. If a rising edge on a configurable interrupt 2044 * line occurs during a write operation in the EXTI_RTSR register, the 2045 * pending bit is not set. 2046 * Rising and falling edge triggers can be set for 2047 * the same interrupt line. In this case, both generate a trigger 2048 * condition. 2049 * @rmtoll RTSR3 RTx LL_EXTI_DisableRisingTrig_64_95 2050 * @param ExtiLine This parameter can be a combination of the following values: 2051 * @arg @ref LL_EXTI_LINE_82 (*) 2052 * @arg @ref LL_EXTI_LINE_84 (*) 2053 * @arg @ref LL_EXTI_LINE_85 2054 * @arg @ref LL_EXTI_LINE_86 (**) 2055 * 2056 * (*) value only defined in dual core devices. 2057 * (**) value not defined in all devices. 2058 * @retval None 2059 */ 2060 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_64_95(uint32_t ExtiLine) 2061 { 2062 CLEAR_BIT(EXTI->RTSR3, ExtiLine); 2063 } 2064 2065 /** 2066 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31 2067 * @rmtoll RTSR1 RTx LL_EXTI_IsEnabledRisingTrig_0_31 2068 * @param ExtiLine This parameter can be a combination of the following values: 2069 * @arg @ref LL_EXTI_LINE_0 2070 * @arg @ref LL_EXTI_LINE_1 2071 * @arg @ref LL_EXTI_LINE_2 2072 * @arg @ref LL_EXTI_LINE_3 2073 * @arg @ref LL_EXTI_LINE_4 2074 * @arg @ref LL_EXTI_LINE_5 2075 * @arg @ref LL_EXTI_LINE_6 2076 * @arg @ref LL_EXTI_LINE_7 2077 * @arg @ref LL_EXTI_LINE_8 2078 * @arg @ref LL_EXTI_LINE_9 2079 * @arg @ref LL_EXTI_LINE_10 2080 * @arg @ref LL_EXTI_LINE_11 2081 * @arg @ref LL_EXTI_LINE_12 2082 * @arg @ref LL_EXTI_LINE_13 2083 * @arg @ref LL_EXTI_LINE_14 2084 * @arg @ref LL_EXTI_LINE_15 2085 * @arg @ref LL_EXTI_LINE_16 2086 * @arg @ref LL_EXTI_LINE_17 2087 * @arg @ref LL_EXTI_LINE_18 2088 * @arg @ref LL_EXTI_LINE_19 2089 * @arg @ref LL_EXTI_LINE_20 2090 * @arg @ref LL_EXTI_LINE_21 2091 * @retval State of bit (1 or 0). 2092 */ 2093 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine) 2094 { 2095 return ((READ_BIT(EXTI->RTSR1, ExtiLine) == (ExtiLine)) ? 1U : 0U); 2096 } 2097 2098 2099 /** 2100 * @brief Check if rising edge trigger is enabled for Lines in range 32 to 63 2101 * @rmtoll RTSR2 RTx LL_EXTI_IsEnabledRisingTrig_32_63 2102 * @param ExtiLine This parameter can be a combination of the following values: 2103 * @arg @ref LL_EXTI_LINE_49 2104 * @arg @ref LL_EXTI_LINE_51 2105 * @retval State of bit (1 or 0). 2106 */ 2107 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine) 2108 { 2109 return ((READ_BIT(EXTI->RTSR2, ExtiLine) == (ExtiLine)) ? 1U : 0U); 2110 } 2111 2112 /** 2113 * @brief Check if rising edge trigger is enabled for Lines in range 64 to 95 2114 * @rmtoll RTSR3 RTx LL_EXTI_IsEnabledRisingTrig_64_95 2115 * @param ExtiLine This parameter can be a combination of the following values: 2116 * @arg @ref LL_EXTI_LINE_82 (*) 2117 * @arg @ref LL_EXTI_LINE_84 (*) 2118 * @arg @ref LL_EXTI_LINE_85 2119 * @arg @ref LL_EXTI_LINE_86 (**) 2120 * 2121 * (*) value only defined in dual core devices. 2122 * (**) value not defined in all devices. 2123 * @retval State of bit (1 or 0). 2124 */ 2125 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_64_95(uint32_t ExtiLine) 2126 { 2127 return ((READ_BIT(EXTI->RTSR3, ExtiLine) == (ExtiLine)) ? 1U : 0U); 2128 } 2129 2130 /** 2131 * @} 2132 */ 2133 2134 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management 2135 * @ingroup RTEMSBSPsARMSTM32H7 2136 * @{ 2137 */ 2138 2139 /** 2140 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31 2141 * @note The configurable wakeup lines are edge-triggered. No glitch must be 2142 * generated on these lines. If a falling edge on a configurable interrupt 2143 * line occurs during a write operation in the EXTI_FTSR register, the 2144 * pending bit is not set. 2145 * Rising and falling edge triggers can be set for 2146 * the same interrupt line. In this case, both generate a trigger 2147 * condition. 2148 * @rmtoll FTSR1 FTx LL_EXTI_EnableFallingTrig_0_31 2149 * @param ExtiLine This parameter can be a combination of the following values: 2150 * @arg @ref LL_EXTI_LINE_0 2151 * @arg @ref LL_EXTI_LINE_1 2152 * @arg @ref LL_EXTI_LINE_2 2153 * @arg @ref LL_EXTI_LINE_3 2154 * @arg @ref LL_EXTI_LINE_4 2155 * @arg @ref LL_EXTI_LINE_5 2156 * @arg @ref LL_EXTI_LINE_6 2157 * @arg @ref LL_EXTI_LINE_7 2158 * @arg @ref LL_EXTI_LINE_8 2159 * @arg @ref LL_EXTI_LINE_9 2160 * @arg @ref LL_EXTI_LINE_10 2161 * @arg @ref LL_EXTI_LINE_11 2162 * @arg @ref LL_EXTI_LINE_12 2163 * @arg @ref LL_EXTI_LINE_13 2164 * @arg @ref LL_EXTI_LINE_14 2165 * @arg @ref LL_EXTI_LINE_15 2166 * @arg @ref LL_EXTI_LINE_16 2167 * @arg @ref LL_EXTI_LINE_18 2168 * @arg @ref LL_EXTI_LINE_19 2169 * @arg @ref LL_EXTI_LINE_20 2170 * @arg @ref LL_EXTI_LINE_21 2171 * @note Please check each device line mapping for EXTI Line availability 2172 * @retval None 2173 */ 2174 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine) 2175 { 2176 SET_BIT(EXTI->FTSR1, ExtiLine); 2177 } 2178 2179 /** 2180 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 32 to 63 2181 * @note The configurable wakeup lines are edge-triggered. No glitch must be 2182 * generated on these lines. If a Falling edge on a configurable interrupt 2183 * line occurs during a write operation in the EXTI_FTSR register, the 2184 * pending bit is not set. 2185 * Rising and falling edge triggers can be set for 2186 * the same interrupt line. In this case, both generate a trigger 2187 * condition. 2188 * @rmtoll FTSR2 FTx LL_EXTI_EnableFallingTrig_32_63 2189 * @param ExtiLine This parameter can be a combination of the following values: 2190 * @arg @ref LL_EXTI_LINE_49 2191 * @arg @ref LL_EXTI_LINE_51 2192 * @retval None 2193 */ 2194 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine) 2195 { 2196 SET_BIT(EXTI->FTSR2, ExtiLine); 2197 } 2198 2199 /** 2200 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 64 to 95 2201 * @note The configurable wakeup lines are edge-triggered. No glitch must be 2202 * generated on these lines. If a Falling edge on a configurable interrupt 2203 * line occurs during a write operation in the EXTI_FTSR register, the 2204 * pending bit is not set. 2205 * Rising and falling edge triggers can be set for 2206 * the same interrupt line. In this case, both generate a trigger 2207 * condition. 2208 * @rmtoll FTSR3 FTx LL_EXTI_EnableFallingTrig_64_95 2209 * @param ExtiLine This parameter can be a combination of the following values: 2210 * @arg @ref LL_EXTI_LINE_82 (*) 2211 * @arg @ref LL_EXTI_LINE_84 (*) 2212 * @arg @ref LL_EXTI_LINE_85 2213 * @arg @ref LL_EXTI_LINE_86 (**) 2214 * 2215 * (*) value only defined in dual core devices. 2216 * (**) value not defined in all devices. 2217 * @retval None 2218 */ 2219 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_64_95(uint32_t ExtiLine) 2220 { 2221 SET_BIT(EXTI->FTSR3, ExtiLine); 2222 } 2223 2224 2225 /** 2226 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31 2227 * @note The configurable wakeup lines are edge-triggered. No glitch must be 2228 * generated on these lines. If a Falling edge on a configurable interrupt 2229 * line occurs during a write operation in the EXTI_FTSR register, the 2230 * pending bit is not set. 2231 * Rising and falling edge triggers can be set for the same interrupt line. 2232 * In this case, both generate a trigger condition. 2233 * @rmtoll FTSR1 FTx LL_EXTI_DisableFallingTrig_0_31 2234 * @param ExtiLine This parameter can be a combination of the following values: 2235 * @arg @ref LL_EXTI_LINE_0 2236 * @arg @ref LL_EXTI_LINE_1 2237 * @arg @ref LL_EXTI_LINE_2 2238 * @arg @ref LL_EXTI_LINE_3 2239 * @arg @ref LL_EXTI_LINE_4 2240 * @arg @ref LL_EXTI_LINE_5 2241 * @arg @ref LL_EXTI_LINE_6 2242 * @arg @ref LL_EXTI_LINE_7 2243 * @arg @ref LL_EXTI_LINE_8 2244 * @arg @ref LL_EXTI_LINE_9 2245 * @arg @ref LL_EXTI_LINE_10 2246 * @arg @ref LL_EXTI_LINE_11 2247 * @arg @ref LL_EXTI_LINE_12 2248 * @arg @ref LL_EXTI_LINE_13 2249 * @arg @ref LL_EXTI_LINE_14 2250 * @arg @ref LL_EXTI_LINE_15 2251 * @arg @ref LL_EXTI_LINE_16 2252 * @arg @ref LL_EXTI_LINE_18 2253 * @arg @ref LL_EXTI_LINE_19 2254 * @arg @ref LL_EXTI_LINE_20 2255 * @arg @ref LL_EXTI_LINE_21 2256 * @note Please check each device line mapping for EXTI Line availability 2257 * @retval None 2258 */ 2259 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine) 2260 { 2261 CLEAR_BIT(EXTI->FTSR1, ExtiLine); 2262 } 2263 2264 /** 2265 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 32 to 63 2266 * @note The configurable wakeup lines are edge-triggered. No glitch must be 2267 * generated on these lines. If a Falling edge on a configurable interrupt 2268 * line occurs during a write operation in the EXTI_FTSR register, the 2269 * pending bit is not set. 2270 * Rising and falling edge triggers can be set for the same interrupt line. 2271 * In this case, both generate a trigger condition. 2272 * @rmtoll FTSR2 FTx LL_EXTI_DisableFallingTrig_32_63 2273 * @param ExtiLine This parameter can be a combination of the following values: 2274 * @arg @ref LL_EXTI_LINE_49 2275 * @arg @ref LL_EXTI_LINE_51 2276 * @retval None 2277 */ 2278 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine) 2279 { 2280 CLEAR_BIT(EXTI->FTSR2, ExtiLine); 2281 } 2282 2283 /** 2284 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 64 to 95 2285 * @note The configurable wakeup lines are edge-triggered. No glitch must be 2286 * generated on these lines. If a Falling edge on a configurable interrupt 2287 * line occurs during a write operation in the EXTI_FTSR register, the 2288 * pending bit is not set. 2289 * Rising and falling edge triggers can be set for the same interrupt line. 2290 * In this case, both generate a trigger condition. 2291 * @rmtoll FTSR3 FTx LL_EXTI_DisableFallingTrig_64_95 2292 * @param ExtiLine This parameter can be a combination of the following values: 2293 * @arg @ref LL_EXTI_LINE_82 (*) 2294 * @arg @ref LL_EXTI_LINE_84 (*) 2295 * @arg @ref LL_EXTI_LINE_85 2296 * @arg @ref LL_EXTI_LINE_86 (**) 2297 * 2298 * (*) value only defined in dual core devices. 2299 * (**) value not defined in all devices. 2300 * @retval None 2301 */ 2302 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_64_95(uint32_t ExtiLine) 2303 { 2304 CLEAR_BIT(EXTI->FTSR3, ExtiLine); 2305 } 2306 2307 2308 /** 2309 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31 2310 * @rmtoll FTSR1 FTx LL_EXTI_IsEnabledFallingTrig_0_31 2311 * @param ExtiLine This parameter can be a combination of the following values: 2312 * @arg @ref LL_EXTI_LINE_0 2313 * @arg @ref LL_EXTI_LINE_1 2314 * @arg @ref LL_EXTI_LINE_2 2315 * @arg @ref LL_EXTI_LINE_3 2316 * @arg @ref LL_EXTI_LINE_4 2317 * @arg @ref LL_EXTI_LINE_5 2318 * @arg @ref LL_EXTI_LINE_6 2319 * @arg @ref LL_EXTI_LINE_7 2320 * @arg @ref LL_EXTI_LINE_8 2321 * @arg @ref LL_EXTI_LINE_9 2322 * @arg @ref LL_EXTI_LINE_10 2323 * @arg @ref LL_EXTI_LINE_11 2324 * @arg @ref LL_EXTI_LINE_12 2325 * @arg @ref LL_EXTI_LINE_13 2326 * @arg @ref LL_EXTI_LINE_14 2327 * @arg @ref LL_EXTI_LINE_15 2328 * @arg @ref LL_EXTI_LINE_16 2329 * @arg @ref LL_EXTI_LINE_18 2330 * @arg @ref LL_EXTI_LINE_19 2331 * @arg @ref LL_EXTI_LINE_20 2332 * @arg @ref LL_EXTI_LINE_21 2333 * @note Please check each device line mapping for EXTI Line availability 2334 * @retval State of bit (1 or 0). 2335 */ 2336 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine) 2337 { 2338 return ((READ_BIT(EXTI->FTSR1, ExtiLine) == (ExtiLine)) ? 1U : 0U); 2339 } 2340 2341 /** 2342 * @brief Check if falling edge trigger is enabled for Lines in range 32 to 63 2343 * @rmtoll FTSR2 FTx LL_EXTI_IsEnabledFallingTrig_32_63 2344 * @param ExtiLine This parameter can be a combination of the following values: 2345 * @arg @ref LL_EXTI_LINE_49 2346 * @arg @ref LL_EXTI_LINE_51 2347 * @retval State of bit (1 or 0). 2348 */ 2349 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine) 2350 { 2351 return ((READ_BIT(EXTI->FTSR2, ExtiLine) == (ExtiLine)) ? 1U : 0U); 2352 } 2353 2354 /** 2355 * @brief Check if falling edge trigger is enabled for Lines in range 64 to 95 2356 * @rmtoll FTSR3 FTx LL_EXTI_IsEnabledFallingTrig_64_95 2357 * @param ExtiLine This parameter can be a combination of the following values: 2358 * @arg @ref LL_EXTI_LINE_82 (*) 2359 * @arg @ref LL_EXTI_LINE_84 (*) 2360 * @arg @ref LL_EXTI_LINE_85 2361 * @arg @ref LL_EXTI_LINE_86 (**) 2362 * 2363 * (*) value only defined in dual core devices. 2364 * (**) value not defined in all devices. 2365 * @retval State of bit (1 or 0). 2366 */ 2367 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_64_95(uint32_t ExtiLine) 2368 { 2369 return ((READ_BIT(EXTI->FTSR3, ExtiLine) == (ExtiLine)) ? 1U : 0U); 2370 } 2371 2372 2373 /** 2374 * @} 2375 */ 2376 2377 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management 2378 * @ingroup RTEMSBSPsARMSTM32H7 2379 * @{ 2380 */ 2381 2382 /** 2383 * @brief Generate a software Interrupt Event for Lines in range 0 to 31 2384 * @note If the interrupt is enabled on this line in the EXTI_C1IMR1, writing a 1 to 2385 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR1 2386 * resulting in an interrupt request generation. 2387 * This bit is cleared by clearing the corresponding bit in the EXTI_PR1 2388 * register (by writing a 1 into the bit) 2389 * @rmtoll SWIER1 SWIx LL_EXTI_GenerateSWI_0_31 2390 * @param ExtiLine This parameter can be a combination of the following values: 2391 * @arg @ref LL_EXTI_LINE_0 2392 * @arg @ref LL_EXTI_LINE_1 2393 * @arg @ref LL_EXTI_LINE_2 2394 * @arg @ref LL_EXTI_LINE_3 2395 * @arg @ref LL_EXTI_LINE_4 2396 * @arg @ref LL_EXTI_LINE_5 2397 * @arg @ref LL_EXTI_LINE_6 2398 * @arg @ref LL_EXTI_LINE_7 2399 * @arg @ref LL_EXTI_LINE_8 2400 * @arg @ref LL_EXTI_LINE_9 2401 * @arg @ref LL_EXTI_LINE_10 2402 * @arg @ref LL_EXTI_LINE_11 2403 * @arg @ref LL_EXTI_LINE_12 2404 * @arg @ref LL_EXTI_LINE_13 2405 * @arg @ref LL_EXTI_LINE_14 2406 * @arg @ref LL_EXTI_LINE_15 2407 * @arg @ref LL_EXTI_LINE_16 2408 * @arg @ref LL_EXTI_LINE_18 2409 * @arg @ref LL_EXTI_LINE_19 2410 * @arg @ref LL_EXTI_LINE_20 2411 * @arg @ref LL_EXTI_LINE_21 2412 * @note Please check each device line mapping for EXTI Line availability 2413 * @retval None 2414 */ 2415 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine) 2416 { 2417 SET_BIT(EXTI->SWIER1, ExtiLine); 2418 } 2419 2420 /** 2421 * @brief Generate a software Interrupt Event for Lines in range 32 to 63 2422 * @note If the interrupt is enabled on this line in the EXTI_IMR2, writing a 1 to 2423 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR2 2424 * resulting in an interrupt request generation. 2425 * This bit is cleared by clearing the corresponding bit in the EXTI_PR2 2426 * register (by writing a 1 into the bit) 2427 * @rmtoll SWIER2 SWIx LL_EXTI_GenerateSWI_32_63 2428 * @param ExtiLine This parameter can be a combination of the following values: 2429 * @arg @ref LL_EXTI_LINE_49 2430 * @arg @ref LL_EXTI_LINE_51 2431 * @retval None 2432 */ 2433 __STATIC_INLINE void LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine) 2434 { 2435 SET_BIT(EXTI->SWIER2, ExtiLine); 2436 } 2437 2438 /** 2439 * @brief Generate a software Interrupt Event for Lines in range 64 to 95 2440 * @note If the interrupt is enabled on this line in the EXTI_IMR2, writing a 1 to 2441 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR2 2442 * resulting in an interrupt request generation. 2443 * This bit is cleared by clearing the corresponding bit in the EXTI_PR3 2444 * register (by writing a 1 into the bit) 2445 * @rmtoll SWIER3 SWIx LL_EXTI_GenerateSWI_64_95 2446 * @param ExtiLine This parameter can be a combination of the following values: 2447 * @arg @ref LL_EXTI_LINE_82 (*) 2448 * @arg @ref LL_EXTI_LINE_84 (*) 2449 * @arg @ref LL_EXTI_LINE_85 2450 * @arg @ref LL_EXTI_LINE_86 (**) 2451 * 2452 * (*) value only defined in dual core devices. 2453 * (**) value not defined in all devices. 2454 * @retval None 2455 */ 2456 __STATIC_INLINE void LL_EXTI_GenerateSWI_64_95(uint32_t ExtiLine) 2457 { 2458 SET_BIT(EXTI->SWIER3, ExtiLine); 2459 } 2460 2461 2462 /** 2463 * @} 2464 */ 2465 2466 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management 2467 * @ingroup RTEMSBSPsARMSTM32H7 2468 * @{ 2469 */ 2470 2471 /** 2472 * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31 2473 * @note This bit is set when the selected edge event arrives on the interrupt 2474 * line. This bit is cleared by writing a 1 to the bit. 2475 * @rmtoll PR1 PIFx LL_EXTI_IsActiveFlag_0_31 2476 * @param ExtiLine This parameter can be a combination of the following values: 2477 * @arg @ref LL_EXTI_LINE_0 2478 * @arg @ref LL_EXTI_LINE_1 2479 * @arg @ref LL_EXTI_LINE_2 2480 * @arg @ref LL_EXTI_LINE_3 2481 * @arg @ref LL_EXTI_LINE_4 2482 * @arg @ref LL_EXTI_LINE_5 2483 * @arg @ref LL_EXTI_LINE_6 2484 * @arg @ref LL_EXTI_LINE_7 2485 * @arg @ref LL_EXTI_LINE_8 2486 * @arg @ref LL_EXTI_LINE_9 2487 * @arg @ref LL_EXTI_LINE_10 2488 * @arg @ref LL_EXTI_LINE_11 2489 * @arg @ref LL_EXTI_LINE_12 2490 * @arg @ref LL_EXTI_LINE_13 2491 * @arg @ref LL_EXTI_LINE_14 2492 * @arg @ref LL_EXTI_LINE_15 2493 * @arg @ref LL_EXTI_LINE_16 2494 * @arg @ref LL_EXTI_LINE_17 2495 * @arg @ref LL_EXTI_LINE_18 2496 * @arg @ref LL_EXTI_LINE_19 2497 * @arg @ref LL_EXTI_LINE_20 2498 * @arg @ref LL_EXTI_LINE_21 2499 * @arg @ref LL_EXTI_LINE_ALL_0_31 2500 * @retval State of bit (1 or 0). 2501 */ 2502 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine) 2503 { 2504 return ((READ_BIT(EXTI->PR1, ExtiLine) == (ExtiLine)) ? 1U : 0U); 2505 } 2506 2507 /** 2508 * @brief Check if the ExtLine Flag is set or not for Lines in range 32 to 63 2509 * @note This bit is set when the selected edge event arrives on the interrupt 2510 * line. This bit is cleared by writing a 1 to the bit. 2511 * @rmtoll PR2 PIFx LL_EXTI_IsActiveFlag_32_63 2512 * @param ExtiLine This parameter can be a combination of the following values: 2513 * @arg @ref LL_EXTI_LINE_49 2514 * @arg @ref LL_EXTI_LINE_51 2515 * @arg @ref LL_EXTI_LINE_ALL_32_63 2516 * @retval State of bit (1 or 0). 2517 */ 2518 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine) 2519 { 2520 return ((READ_BIT(EXTI->PR2, ExtiLine) == (ExtiLine)) ? 1U : 0U); 2521 } 2522 2523 /** 2524 * @brief Check if the ExtLine Flag is set or not for Lines in range 64 to 95 2525 * @note This bit is set when the selected edge event arrives on the interrupt 2526 * line. This bit is cleared by writing a 1 to the bit. 2527 * @rmtoll PR3 PIFx LL_EXTI_IsActiveFlag_64_95 2528 * @param ExtiLine This parameter can be a combination of the following values: 2529 * @arg @ref LL_EXTI_LINE_82 (*) 2530 * @arg @ref LL_EXTI_LINE_84 (*) 2531 * @arg @ref LL_EXTI_LINE_85 2532 * @arg @ref LL_EXTI_LINE_86 (**) 2533 * 2534 * (*) value only defined in dual core devices. 2535 * (**) value not defined in all devices. 2536 * @retval State of bit (1 or 0). 2537 */ 2538 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_64_95(uint32_t ExtiLine) 2539 { 2540 return ((READ_BIT(EXTI->PR3, ExtiLine) == (ExtiLine)) ? 1U : 0U); 2541 } 2542 2543 2544 /** 2545 * @brief Read ExtLine Combination Flag for Lines in range 0 to 31 2546 * @note This bit is set when the selected edge event arrives on the interrupt 2547 * line. This bit is cleared by writing a 1 to the bit. 2548 * @rmtoll PR1 PIFx LL_EXTI_ReadFlag_0_31 2549 * @param ExtiLine This parameter can be a combination of the following values: 2550 * @arg @ref LL_EXTI_LINE_0 2551 * @arg @ref LL_EXTI_LINE_1 2552 * @arg @ref LL_EXTI_LINE_2 2553 * @arg @ref LL_EXTI_LINE_3 2554 * @arg @ref LL_EXTI_LINE_4 2555 * @arg @ref LL_EXTI_LINE_5 2556 * @arg @ref LL_EXTI_LINE_6 2557 * @arg @ref LL_EXTI_LINE_7 2558 * @arg @ref LL_EXTI_LINE_8 2559 * @arg @ref LL_EXTI_LINE_9 2560 * @arg @ref LL_EXTI_LINE_10 2561 * @arg @ref LL_EXTI_LINE_11 2562 * @arg @ref LL_EXTI_LINE_12 2563 * @arg @ref LL_EXTI_LINE_13 2564 * @arg @ref LL_EXTI_LINE_14 2565 * @arg @ref LL_EXTI_LINE_15 2566 * @arg @ref LL_EXTI_LINE_16 2567 * @arg @ref LL_EXTI_LINE_17 2568 * @arg @ref LL_EXTI_LINE_18 2569 * @arg @ref LL_EXTI_LINE_19 2570 * @arg @ref LL_EXTI_LINE_20 2571 * @arg @ref LL_EXTI_LINE_21 2572 * @retval @note This bit is set when the selected edge event arrives on the interrupt 2573 */ 2574 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine) 2575 { 2576 return (uint32_t)(READ_BIT(EXTI->PR1, ExtiLine)); 2577 } 2578 2579 2580 /** 2581 * @brief Read ExtLine Combination Flag for Lines in range 32 to 63 2582 * @note This bit is set when the selected edge event arrives on the interrupt 2583 * line. This bit is cleared by writing a 1 to the bit. 2584 * @rmtoll PR2 PIFx LL_EXTI_ReadFlag_32_63 2585 * @param ExtiLine This parameter can be a combination of the following values: 2586 * @arg @ref LL_EXTI_LINE_49 2587 * @arg @ref LL_EXTI_LINE_51 2588 * @retval @note This bit is set when the selected edge event arrives on the interrupt 2589 */ 2590 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine) 2591 { 2592 return (uint32_t)(READ_BIT(EXTI->PR2, ExtiLine)); 2593 } 2594 2595 2596 /** 2597 * @brief Read ExtLine Combination Flag for Lines in range 64 to 95 2598 * @note This bit is set when the selected edge event arrives on the interrupt 2599 * line. This bit is cleared by writing a 1 to the bit. 2600 * @rmtoll PR3 PIFx LL_EXTI_ReadFlag_64_95 2601 * @param ExtiLine This parameter can be a combination of the following values: 2602 * @arg @ref LL_EXTI_LINE_82 (*) 2603 * @arg @ref LL_EXTI_LINE_84 (*) 2604 * @arg @ref LL_EXTI_LINE_85 2605 * @arg @ref LL_EXTI_LINE_86 (**) 2606 * 2607 * (*) value only defined in dual core devices. 2608 * (**) value not defined in all devices. 2609 * @retval @note This bit is set when the selected edge event arrives on the interrupt 2610 */ 2611 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_64_95(uint32_t ExtiLine) 2612 { 2613 return (uint32_t)(READ_BIT(EXTI->PR3, ExtiLine)); 2614 } 2615 2616 /** 2617 * @brief Clear ExtLine Flags for Lines in range 0 to 31 2618 * @note This bit is set when the selected edge event arrives on the interrupt 2619 * line. This bit is cleared by writing a 1 to the bit. 2620 * @rmtoll PR1 PIFx LL_EXTI_ClearFlag_0_31 2621 * @param ExtiLine This parameter can be a combination of the following values: 2622 * @arg @ref LL_EXTI_LINE_0 2623 * @arg @ref LL_EXTI_LINE_1 2624 * @arg @ref LL_EXTI_LINE_2 2625 * @arg @ref LL_EXTI_LINE_3 2626 * @arg @ref LL_EXTI_LINE_4 2627 * @arg @ref LL_EXTI_LINE_5 2628 * @arg @ref LL_EXTI_LINE_6 2629 * @arg @ref LL_EXTI_LINE_7 2630 * @arg @ref LL_EXTI_LINE_8 2631 * @arg @ref LL_EXTI_LINE_9 2632 * @arg @ref LL_EXTI_LINE_10 2633 * @arg @ref LL_EXTI_LINE_11 2634 * @arg @ref LL_EXTI_LINE_12 2635 * @arg @ref LL_EXTI_LINE_13 2636 * @arg @ref LL_EXTI_LINE_14 2637 * @arg @ref LL_EXTI_LINE_15 2638 * @arg @ref LL_EXTI_LINE_16 2639 * @arg @ref LL_EXTI_LINE_17 2640 * @arg @ref LL_EXTI_LINE_18 2641 * @arg @ref LL_EXTI_LINE_19 2642 * @arg @ref LL_EXTI_LINE_20 2643 * @arg @ref LL_EXTI_LINE_21 2644 * @retval None 2645 */ 2646 __STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine) 2647 { 2648 WRITE_REG(EXTI->PR1, ExtiLine); 2649 } 2650 2651 /** 2652 * @brief Clear ExtLine Flags for Lines in range 32 to 63 2653 * @note This bit is set when the selected edge event arrives on the interrupt 2654 * line. This bit is cleared by writing a 1 to the bit. 2655 * @rmtoll PR2 PIFx LL_EXTI_ClearFlag_32_63 2656 * @param ExtiLine This parameter can be a combination of the following values: 2657 * @arg @ref LL_EXTI_LINE_49 2658 * @arg @ref LL_EXTI_LINE_51 2659 * @retval None 2660 */ 2661 __STATIC_INLINE void LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine) 2662 { 2663 WRITE_REG(EXTI->PR2, ExtiLine); 2664 } 2665 2666 /** 2667 * @brief Clear ExtLine Flags for Lines in range 64 to 95 2668 * @note This bit is set when the selected edge event arrives on the interrupt 2669 * line. This bit is cleared by writing a 1 to the bit. 2670 * @rmtoll PR3 PIFx LL_EXTI_ClearFlag_64_95 2671 * @param ExtiLine This parameter can be a combination of the following values: 2672 * @arg @ref LL_EXTI_LINE_82 (*) 2673 * @arg @ref LL_EXTI_LINE_84 (*) 2674 * @arg @ref LL_EXTI_LINE_85 2675 * @arg @ref LL_EXTI_LINE_86 (**) 2676 * 2677 * (*) value only defined in dual core devices. 2678 * (**) value not defined in all devices. 2679 * @retval None 2680 */ 2681 __STATIC_INLINE void LL_EXTI_ClearFlag_64_95(uint32_t ExtiLine) 2682 { 2683 WRITE_REG(EXTI->PR3, ExtiLine); 2684 } 2685 2686 #if defined(DUAL_CORE) 2687 2688 /** 2689 * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31 for cpu2 2690 * @note This bit is set when the selected edge event arrives on the interrupt 2691 * line. This bit is cleared by writing a 1 to the bit. 2692 * @rmtoll C2PR1 PIFx LL_C2_EXTI_IsActiveFlag_0_31 2693 * @param ExtiLine This parameter can be a combination of the following values: 2694 * @arg @ref LL_EXTI_LINE_0 2695 * @arg @ref LL_EXTI_LINE_1 2696 * @arg @ref LL_EXTI_LINE_2 2697 * @arg @ref LL_EXTI_LINE_3 2698 * @arg @ref LL_EXTI_LINE_4 2699 * @arg @ref LL_EXTI_LINE_5 2700 * @arg @ref LL_EXTI_LINE_6 2701 * @arg @ref LL_EXTI_LINE_7 2702 * @arg @ref LL_EXTI_LINE_8 2703 * @arg @ref LL_EXTI_LINE_9 2704 * @arg @ref LL_EXTI_LINE_10 2705 * @arg @ref LL_EXTI_LINE_11 2706 * @arg @ref LL_EXTI_LINE_12 2707 * @arg @ref LL_EXTI_LINE_13 2708 * @arg @ref LL_EXTI_LINE_14 2709 * @arg @ref LL_EXTI_LINE_15 2710 * @arg @ref LL_EXTI_LINE_16 2711 * @arg @ref LL_EXTI_LINE_17 2712 * @arg @ref LL_EXTI_LINE_18 2713 * @arg @ref LL_EXTI_LINE_19 2714 * @arg @ref LL_EXTI_LINE_20 2715 * @arg @ref LL_EXTI_LINE_21 2716 * @arg @ref LL_EXTI_LINE_ALL_0_31 2717 * @retval State of bit (1 or 0). 2718 */ 2719 __STATIC_INLINE uint32_t LL_C2_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine) 2720 { 2721 return ((READ_BIT(EXTI->C2PR1, ExtiLine) == (ExtiLine)) ? 1U : 0U); 2722 } 2723 2724 /** 2725 * @brief Check if the ExtLine Flag is set or not for Lines in range 32 to 63 for cpu2 2726 * @note This bit is set when the selected edge event arrives on the interrupt 2727 * line. This bit is cleared by writing a 1 to the bit. 2728 * @rmtoll C2PR2 PIFx LL_C2_EXTI_IsActiveFlag_32_63 2729 * @param ExtiLine This parameter can be a combination of the following values: 2730 * @arg @ref LL_EXTI_LINE_49 2731 * @arg @ref LL_EXTI_LINE_51 2732 * @arg @ref LL_EXTI_LINE_ALL_32_63 2733 * @retval State of bit (1 or 0). 2734 */ 2735 __STATIC_INLINE uint32_t LL_C2_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine) 2736 { 2737 return ((READ_BIT(EXTI->C2PR2, ExtiLine) == (ExtiLine)) ? 1U : 0U); 2738 } 2739 2740 /** 2741 * @brief Check if the ExtLine Flag is set or not for Lines in range 64 to 95 for cpu2 2742 * @note This bit is set when the selected edge event arrives on the interrupt 2743 * line. This bit is cleared by writing a 1 to the bit. 2744 * @rmtoll C2PR3 PIFx LL_C2_EXTI_IsActiveFlag_64_95 2745 * @param ExtiLine This parameter can be a combination of the following values: 2746 * @arg @ref LL_EXTI_LINE_82 2747 * @arg @ref LL_EXTI_LINE_84 2748 * @arg @ref LL_EXTI_LINE_85 2749 * @arg @ref LL_EXTI_LINE_86 2750 * @arg @ref LL_EXTI_LINE_ALL_64_95 2751 * @retval State of bit (1 or 0). 2752 */ 2753 __STATIC_INLINE uint32_t LL_C2_EXTI_IsActiveFlag_64_95(uint32_t ExtiLine) 2754 { 2755 return ((READ_BIT(EXTI->C2PR3, ExtiLine) == (ExtiLine)) ? 1U : 0U); 2756 } 2757 2758 /** 2759 * @brief Read ExtLine Combination Flag for Lines in range 0 to 31 for cpu2 2760 * @note This bit is set when the selected edge event arrives on the interrupt 2761 * line. This bit is cleared by writing a 1 to the bit. 2762 * @rmtoll C2PR1 PIFx LL_C2_EXTI_ReadFlag_0_31 2763 * @param ExtiLine This parameter can be a combination of the following values: 2764 * @arg @ref LL_EXTI_LINE_0 2765 * @arg @ref LL_EXTI_LINE_1 2766 * @arg @ref LL_EXTI_LINE_2 2767 * @arg @ref LL_EXTI_LINE_3 2768 * @arg @ref LL_EXTI_LINE_4 2769 * @arg @ref LL_EXTI_LINE_5 2770 * @arg @ref LL_EXTI_LINE_6 2771 * @arg @ref LL_EXTI_LINE_7 2772 * @arg @ref LL_EXTI_LINE_8 2773 * @arg @ref LL_EXTI_LINE_9 2774 * @arg @ref LL_EXTI_LINE_10 2775 * @arg @ref LL_EXTI_LINE_11 2776 * @arg @ref LL_EXTI_LINE_12 2777 * @arg @ref LL_EXTI_LINE_13 2778 * @arg @ref LL_EXTI_LINE_14 2779 * @arg @ref LL_EXTI_LINE_15 2780 * @arg @ref LL_EXTI_LINE_16 2781 * @arg @ref LL_EXTI_LINE_17 2782 * @arg @ref LL_EXTI_LINE_18 2783 * @arg @ref LL_EXTI_LINE_19 2784 * @arg @ref LL_EXTI_LINE_20 2785 * @arg @ref LL_EXTI_LINE_21 2786 * @retval @note This bit is set when the selected edge event arrives on the interrupt 2787 */ 2788 __STATIC_INLINE uint32_t LL_C2_EXTI_ReadFlag_0_31(uint32_t ExtiLine) 2789 { 2790 return (uint32_t)(READ_BIT(EXTI->C2PR1, ExtiLine)); 2791 } 2792 2793 /** 2794 * @brief Read ExtLine Combination Flag for Lines in range 32 to 63 for cpu2 2795 * @note This bit is set when the selected edge event arrives on the interrupt 2796 * line. This bit is cleared by writing a 1 to the bit. 2797 * @rmtoll C2PR2 PIFx LL_C2_EXTI_ReadFlag_32_63 2798 * @param ExtiLine This parameter can be a combination of the following values: 2799 * @arg @ref LL_EXTI_LINE_49 2800 * @arg @ref LL_EXTI_LINE_51 2801 * @retval @note This bit is set when the selected edge event arrives on the interrupt 2802 */ 2803 __STATIC_INLINE uint32_t LL_C2_EXTI_ReadFlag_32_63(uint32_t ExtiLine) 2804 { 2805 return (uint32_t)(READ_BIT(EXTI->C2PR2, ExtiLine)); 2806 } 2807 2808 2809 /** 2810 * @brief Read ExtLine Combination Flag for Lines in range 64 to 95 for cpu2 2811 * @note This bit is set when the selected edge event arrives on the interrupt 2812 * line. This bit is cleared by writing a 1 to the bit. 2813 * @rmtoll C2PR3 PIFx LL_C2_EXTI_ReadFlag_64_95 2814 * @param ExtiLine This parameter can be a combination of the following values: 2815 * @arg @ref LL_EXTI_LINE_82 2816 * @arg @ref LL_EXTI_LINE_84 2817 * @arg @ref LL_EXTI_LINE_85 2818 * @arg @ref LL_EXTI_LINE_86 2819 * @retval @note This bit is set when the selected edge event arrives on the interrupt 2820 */ 2821 __STATIC_INLINE uint32_t LL_C2_EXTI_ReadFlag_64_95(uint32_t ExtiLine) 2822 { 2823 return (uint32_t)(READ_BIT(EXTI->C2PR3, ExtiLine)); 2824 } 2825 /** 2826 * @brief Clear ExtLine Flags for Lines in range 0 to 31 for cpu2 2827 * @note This bit is set when the selected edge event arrives on the interrupt 2828 * line. This bit is cleared by writing a 1 to the bit. 2829 * @rmtoll C2PR1 PIFx LL_C2_EXTI_ClearFlag_0_31 2830 * @param ExtiLine This parameter can be a combination of the following values: 2831 * @arg @ref LL_EXTI_LINE_0 2832 * @arg @ref LL_EXTI_LINE_1 2833 * @arg @ref LL_EXTI_LINE_2 2834 * @arg @ref LL_EXTI_LINE_3 2835 * @arg @ref LL_EXTI_LINE_4 2836 * @arg @ref LL_EXTI_LINE_5 2837 * @arg @ref LL_EXTI_LINE_6 2838 * @arg @ref LL_EXTI_LINE_7 2839 * @arg @ref LL_EXTI_LINE_8 2840 * @arg @ref LL_EXTI_LINE_9 2841 * @arg @ref LL_EXTI_LINE_10 2842 * @arg @ref LL_EXTI_LINE_11 2843 * @arg @ref LL_EXTI_LINE_12 2844 * @arg @ref LL_EXTI_LINE_13 2845 * @arg @ref LL_EXTI_LINE_14 2846 * @arg @ref LL_EXTI_LINE_15 2847 * @arg @ref LL_EXTI_LINE_16 2848 * @arg @ref LL_EXTI_LINE_17 2849 * @arg @ref LL_EXTI_LINE_18 2850 * @arg @ref LL_EXTI_LINE_19 2851 * @arg @ref LL_EXTI_LINE_20 2852 * @arg @ref LL_EXTI_LINE_21 2853 * @retval None 2854 */ 2855 __STATIC_INLINE void LL_C2_EXTI_ClearFlag_0_31(uint32_t ExtiLine) 2856 { 2857 WRITE_REG(EXTI->C2PR1, ExtiLine); 2858 } 2859 2860 /** 2861 * @brief Clear ExtLine Flags for Lines in range 32 to 63 for cpu2 2862 * @note This bit is set when the selected edge event arrives on the interrupt 2863 * line. This bit is cleared by writing a 1 to the bit. 2864 * @rmtoll C2PR2 PIFx LL_C2_EXTI_ClearFlag_32_63 2865 * @param ExtiLine This parameter can be a combination of the following values: 2866 * @arg @ref LL_EXTI_LINE_49 2867 * @arg @ref LL_EXTI_LINE_51 2868 * @retval None 2869 */ 2870 __STATIC_INLINE void LL_C2_EXTI_ClearFlag_32_63(uint32_t ExtiLine) 2871 { 2872 WRITE_REG(EXTI->C2PR2, ExtiLine); 2873 } 2874 2875 /** 2876 * @brief Clear ExtLine Flags for Lines in range 64 to 95 for cpu2 2877 * @note This bit is set when the selected edge event arrives on the interrupt 2878 * line. This bit is cleared by writing a 1 to the bit. 2879 * @rmtoll C2PR3 PIFx LL_C2_EXTI_ClearFlag_64_95 2880 * @param ExtiLine This parameter can be a combination of the following values: 2881 * @arg @ref LL_EXTI_LINE_82 2882 * @arg @ref LL_EXTI_LINE_84 2883 * @arg @ref LL_EXTI_LINE_85 2884 * @arg @ref LL_EXTI_LINE_86 2885 * @retval None 2886 */ 2887 __STATIC_INLINE void LL_C2_EXTI_ClearFlag_64_95(uint32_t ExtiLine) 2888 { 2889 WRITE_REG(EXTI->C2PR3, ExtiLine); 2890 } 2891 2892 #endif /* DUAL_CORE */ 2893 2894 /** 2895 * @brief Enable ExtiLine D3 Pending Mask for Lines in range 0 to 31 2896 * @rmtoll D3PMR1 MRx LL_D3_EXTI_EnablePendMask_0_31 2897 * @param ExtiLine This parameter can be one of the following values: 2898 * @arg @ref LL_EXTI_LINE_0 2899 * @arg @ref LL_EXTI_LINE_1 2900 * @arg @ref LL_EXTI_LINE_2 2901 * @arg @ref LL_EXTI_LINE_3 2902 * @arg @ref LL_EXTI_LINE_4 2903 * @arg @ref LL_EXTI_LINE_5 2904 * @arg @ref LL_EXTI_LINE_6 2905 * @arg @ref LL_EXTI_LINE_7 2906 * @arg @ref LL_EXTI_LINE_8 2907 * @arg @ref LL_EXTI_LINE_9 2908 * @arg @ref LL_EXTI_LINE_10 2909 * @arg @ref LL_EXTI_LINE_11 2910 * @arg @ref LL_EXTI_LINE_12 2911 * @arg @ref LL_EXTI_LINE_13 2912 * @arg @ref LL_EXTI_LINE_14 2913 * @arg @ref LL_EXTI_LINE_15 2914 * @arg @ref LL_EXTI_LINE_19 2915 * @arg @ref LL_EXTI_LINE_20 2916 * @arg @ref LL_EXTI_LINE_21 2917 * @arg @ref LL_EXTI_LINE_25 2918 * @retval None 2919 */ 2920 __STATIC_INLINE void LL_D3_EXTI_EnablePendMask_0_31(uint32_t ExtiLine) 2921 { 2922 SET_BIT(EXTI->D3PMR1, ExtiLine); 2923 } 2924 2925 /** 2926 * @brief Enable ExtiLine D3 Pending Mask for Lines in range 32 to 63 2927 * @rmtoll D3PMR2 MRx LL_D3_EXTI_EnablePendMask_32_63 2928 * @param ExtiLine This parameter can be one of the following values: 2929 * @arg @ref LL_EXTI_LINE_34 2930 * @arg @ref LL_EXTI_LINE_35 2931 * @arg @ref LL_EXTI_LINE_41 2932 * @arg @ref LL_EXTI_LINE_48 2933 * @arg @ref LL_EXTI_LINE_49 2934 * @arg @ref LL_EXTI_LINE_50 2935 * @arg @ref LL_EXTI_LINE_51 2936 * @arg @ref LL_EXTI_LINE_52 2937 * @arg @ref LL_EXTI_LINE_53 2938 * @retval None 2939 */ 2940 __STATIC_INLINE void LL_D3_EXTI_EnablePendMask_32_63(uint32_t ExtiLine) 2941 { 2942 SET_BIT(EXTI->D3PMR2, ExtiLine); 2943 } 2944 2945 /** 2946 * @brief Disable ExtiLine D3 Pending Mask for Lines in range 0 to 31 2947 * @rmtoll D3PMR1 MRx LL_D3_EXTI_DisablePendMask_0_31 2948 * @param ExtiLine This parameter can be one of the following values: 2949 * @arg @ref LL_EXTI_LINE_0 2950 * @arg @ref LL_EXTI_LINE_1 2951 * @arg @ref LL_EXTI_LINE_2 2952 * @arg @ref LL_EXTI_LINE_3 2953 * @arg @ref LL_EXTI_LINE_4 2954 * @arg @ref LL_EXTI_LINE_5 2955 * @arg @ref LL_EXTI_LINE_6 2956 * @arg @ref LL_EXTI_LINE_7 2957 * @arg @ref LL_EXTI_LINE_8 2958 * @arg @ref LL_EXTI_LINE_9 2959 * @arg @ref LL_EXTI_LINE_10 2960 * @arg @ref LL_EXTI_LINE_11 2961 * @arg @ref LL_EXTI_LINE_12 2962 * @arg @ref LL_EXTI_LINE_13 2963 * @arg @ref LL_EXTI_LINE_14 2964 * @arg @ref LL_EXTI_LINE_15 2965 * @arg @ref LL_EXTI_LINE_19 2966 * @arg @ref LL_EXTI_LINE_20 2967 * @arg @ref LL_EXTI_LINE_21 2968 * @arg @ref LL_EXTI_LINE_25 2969 * @retval None 2970 */ 2971 __STATIC_INLINE void LL_D3_EXTI_DisablePendMask_0_31(uint32_t ExtiLine) 2972 { 2973 CLEAR_BIT(EXTI->D3PMR1, ExtiLine); 2974 } 2975 2976 /** 2977 * @brief Disable ExtiLine D3 Pending Mask for Lines in range 32 to 63 2978 * @rmtoll D3PMR2 MRx LL_D3_EXTI_DisablePendMask_32_63 2979 * @param ExtiLine This parameter can be one of the following values: 2980 * @arg @ref LL_EXTI_LINE_34 2981 * @arg @ref LL_EXTI_LINE_35 2982 * @arg @ref LL_EXTI_LINE_41 2983 * @arg @ref LL_EXTI_LINE_48 2984 * @arg @ref LL_EXTI_LINE_49 2985 * @arg @ref LL_EXTI_LINE_50 2986 * @arg @ref LL_EXTI_LINE_51 2987 * @arg @ref LL_EXTI_LINE_52 2988 * @arg @ref LL_EXTI_LINE_53 2989 * @retval None 2990 */ 2991 __STATIC_INLINE void LL_D3_EXTI_DisablePendMask_32_63(uint32_t ExtiLine) 2992 { 2993 CLEAR_BIT(EXTI->D3PMR2, ExtiLine); 2994 } 2995 2996 /** 2997 * @brief Indicate if ExtiLine D3 Pending Mask is enabled for Lines in range 0 to 31 2998 * @rmtoll D3PMR1 MRx LL_D3_EXTI_IsEnabledPendMask_0_31 2999 * @param ExtiLine This parameter can be one of the following values: 3000 * @arg @ref LL_EXTI_LINE_0 3001 * @arg @ref LL_EXTI_LINE_1 3002 * @arg @ref LL_EXTI_LINE_2 3003 * @arg @ref LL_EXTI_LINE_3 3004 * @arg @ref LL_EXTI_LINE_4 3005 * @arg @ref LL_EXTI_LINE_5 3006 * @arg @ref LL_EXTI_LINE_6 3007 * @arg @ref LL_EXTI_LINE_7 3008 * @arg @ref LL_EXTI_LINE_8 3009 * @arg @ref LL_EXTI_LINE_9 3010 * @arg @ref LL_EXTI_LINE_10 3011 * @arg @ref LL_EXTI_LINE_11 3012 * @arg @ref LL_EXTI_LINE_12 3013 * @arg @ref LL_EXTI_LINE_13 3014 * @arg @ref LL_EXTI_LINE_14 3015 * @arg @ref LL_EXTI_LINE_15 3016 * @arg @ref LL_EXTI_LINE_19 3017 * @arg @ref LL_EXTI_LINE_20 3018 * @arg @ref LL_EXTI_LINE_21 3019 * @arg @ref LL_EXTI_LINE_25 3020 * @retval State of bit (1 or 0). 3021 */ 3022 __STATIC_INLINE uint32_t LL_D3_EXTI_IsEnabledPendMask_0_31(uint32_t ExtiLine) 3023 { 3024 return ((READ_BIT(EXTI->D3PMR1, ExtiLine) == (ExtiLine)) ? 1U : 0U); 3025 } 3026 3027 /** 3028 * @brief Indicate if ExtiLine D3 Pending Mask is enabled for Lines in range 32 to 63 3029 * @rmtoll D3PMR2 MRx LL_D3_EXTI_IsEnabledPendMask_32_63 3030 * @param ExtiLine This parameter can be one of the following values: 3031 * @arg @ref LL_EXTI_LINE_34 3032 * @arg @ref LL_EXTI_LINE_35 3033 * @arg @ref LL_EXTI_LINE_41 3034 * @arg @ref LL_EXTI_LINE_48 3035 * @arg @ref LL_EXTI_LINE_49 3036 * @arg @ref LL_EXTI_LINE_50 3037 * @arg @ref LL_EXTI_LINE_51 3038 * @arg @ref LL_EXTI_LINE_52 3039 * @arg @ref LL_EXTI_LINE_53 3040 * @retval State of bit (1 or 0). 3041 */ 3042 __STATIC_INLINE uint32_t LL_D3_EXTI_IsEnabledPendMask_32_63(uint32_t ExtiLine) 3043 { 3044 return ((READ_BIT(EXTI->D3PMR2, ExtiLine) == (ExtiLine)) ? 1U : 0U); 3045 } 3046 3047 /** 3048 * @brief Set ExtLine D3 Domain Pend Clear Source selection for Lines in range 0 to 15 3049 * @rmtoll D3PCR1L PCSx LL_D3_EXTI_SetPendClearSel_0_15 3050 * @param ExtiLine This parameter can be one of the following values: 3051 * @arg @ref LL_EXTI_LINE_0 3052 * @arg @ref LL_EXTI_LINE_1 3053 * @arg @ref LL_EXTI_LINE_2 3054 * @arg @ref LL_EXTI_LINE_3 3055 * @arg @ref LL_EXTI_LINE_4 3056 * @arg @ref LL_EXTI_LINE_5 3057 * @arg @ref LL_EXTI_LINE_6 3058 * @arg @ref LL_EXTI_LINE_7 3059 * @arg @ref LL_EXTI_LINE_8 3060 * @arg @ref LL_EXTI_LINE_9 3061 * @arg @ref LL_EXTI_LINE_10 3062 * @arg @ref LL_EXTI_LINE_11 3063 * @arg @ref LL_EXTI_LINE_12 3064 * @arg @ref LL_EXTI_LINE_13 3065 * @arg @ref LL_EXTI_LINE_14 3066 * @arg @ref LL_EXTI_LINE_15 3067 * @param ClrSrc This parameter can be one of the following values: 3068 * @arg @ref LL_EXTI_D3_PEND_CLR_DMACH6 3069 * @arg @ref LL_EXTI_D3_PEND_CLR_DMACH7 3070 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM4 (*) 3071 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM5 (*) 3072 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM2 (*) 3073 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM3 (*) 3074 * 3075 * (*) value not defined in all devices. 3076 * @retval None 3077 */ 3078 __STATIC_INLINE void LL_D3_EXTI_SetPendClearSel_0_15(uint32_t ExtiLine, uint32_t ClrSrc) 3079 { 3080 MODIFY_REG(EXTI->D3PCR1L, ((ExtiLine * ExtiLine) * 3UL), ((ExtiLine * ExtiLine) * ClrSrc)); 3081 } 3082 3083 /** 3084 * @brief Set ExtLine D3 Domain Pend Clear Source selection for Lines in range 16 to 31 3085 * @rmtoll D3PCR1H PCSx LL_D3_EXTI_SetPendClearSel_16_31 3086 * @param ExtiLine This parameter can be one of the following values: 3087 * @arg @ref LL_EXTI_LINE_19 3088 * @arg @ref LL_EXTI_LINE_20 3089 * @arg @ref LL_EXTI_LINE_21 3090 * @arg @ref LL_EXTI_LINE_25 3091 * @param ClrSrc This parameter can be one of the following values: 3092 * @arg @ref LL_EXTI_D3_PEND_CLR_DMACH6 3093 * @arg @ref LL_EXTI_D3_PEND_CLR_DMACH7 3094 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM4 (*) 3095 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM5 (*) 3096 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM2 (*) 3097 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM3 (*) 3098 * 3099 * (*) value not defined in all devices. 3100 * @retval None 3101 */ 3102 __STATIC_INLINE void LL_D3_EXTI_SetPendClearSel_16_31(uint32_t ExtiLine, uint32_t ClrSrc) 3103 { 3104 MODIFY_REG(EXTI->D3PCR1H, (((ExtiLine >> EXTI_IMR1_IM16_Pos) * (ExtiLine >> EXTI_IMR1_IM16_Pos)) * 3UL), (((ExtiLine >> EXTI_IMR1_IM16_Pos) * (ExtiLine >> EXTI_IMR1_IM16_Pos)) * ClrSrc)); 3105 } 3106 3107 3108 /** 3109 * @brief Set ExtLine D3 Domain Pend Clear Source selection for Lines in range 32 to 47 3110 * @rmtoll D3PCR2L PCSx LL_D3_EXTI_SetPendClearSel_32_47 3111 * @param ExtiLine This parameter can be one of the following values: 3112 * @arg @ref LL_EXTI_LINE_34 3113 * @arg @ref LL_EXTI_LINE_35 3114 * @arg @ref LL_EXTI_LINE_41 3115 * @param ClrSrc This parameter can be one of the following values: 3116 * @arg @ref LL_EXTI_D3_PEND_CLR_DMACH6 3117 * @arg @ref LL_EXTI_D3_PEND_CLR_DMACH7 3118 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM4 (*) 3119 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM5 (*) 3120 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM2 (*) 3121 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM3 (*) 3122 * 3123 * (*) value not defined in all devices. 3124 * @retval None 3125 */ 3126 __STATIC_INLINE void LL_D3_EXTI_SetPendClearSel_32_47(uint32_t ExtiLine, uint32_t ClrSrc) 3127 { 3128 MODIFY_REG(EXTI->D3PCR2L, ((ExtiLine * ExtiLine) * 3UL), ((ExtiLine * ExtiLine) * ClrSrc)); 3129 } 3130 3131 /** 3132 * @brief Set ExtLine D3 Domain Pend Clear Source selection for Lines in range 48 to 63 3133 * @rmtoll D3PCR2H PCSx LL_D3_EXTI_SetPendClearSel_48_63 3134 * @param ExtiLine This parameter can be one of the following values: 3135 * @arg @ref LL_EXTI_LINE_48 3136 * @arg @ref LL_EXTI_LINE_49 3137 * @arg @ref LL_EXTI_LINE_50 3138 * @arg @ref LL_EXTI_LINE_51 3139 * @arg @ref LL_EXTI_LINE_52 3140 * @arg @ref LL_EXTI_LINE_53 3141 * @param ClrSrc This parameter can be one of the following values: 3142 * @arg @ref LL_EXTI_D3_PEND_CLR_DMACH6 3143 * @arg @ref LL_EXTI_D3_PEND_CLR_DMACH7 3144 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM4 (*) 3145 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM5 (*) 3146 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM2 (*) 3147 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM3 (*) 3148 * 3149 * (*) value not defined in all devices. 3150 * @retval None 3151 */ 3152 __STATIC_INLINE void LL_D3_EXTI_SetPendClearSel_48_63(uint32_t ExtiLine, uint32_t ClrSrc) 3153 { 3154 MODIFY_REG(EXTI->D3PCR2H, (((ExtiLine >> EXTI_IMR2_IM48_Pos) * (ExtiLine >> EXTI_IMR2_IM48_Pos)) * 3UL), (((ExtiLine >> EXTI_IMR2_IM48_Pos) * (ExtiLine >> EXTI_IMR2_IM48_Pos)) * ClrSrc)); 3155 } 3156 3157 /** 3158 * @brief Get ExtLine D3 Domain Pend Clear Source selection for Lines in range 0 to 15 3159 * @rmtoll D3PCR1L PCSx LL_D3_EXTI_GetPendClearSel_0_15 3160 * @param ExtiLine This parameter can be one of the following values: 3161 * @arg @ref LL_EXTI_LINE_0 3162 * @arg @ref LL_EXTI_LINE_1 3163 * @arg @ref LL_EXTI_LINE_2 3164 * @arg @ref LL_EXTI_LINE_3 3165 * @arg @ref LL_EXTI_LINE_4 3166 * @arg @ref LL_EXTI_LINE_5 3167 * @arg @ref LL_EXTI_LINE_6 3168 * @arg @ref LL_EXTI_LINE_7 3169 * @arg @ref LL_EXTI_LINE_8 3170 * @arg @ref LL_EXTI_LINE_9 3171 * @arg @ref LL_EXTI_LINE_10 3172 * @arg @ref LL_EXTI_LINE_11 3173 * @arg @ref LL_EXTI_LINE_12 3174 * @arg @ref LL_EXTI_LINE_13 3175 * @arg @ref LL_EXTI_LINE_14 3176 * @arg @ref LL_EXTI_LINE_15 3177 * @retval Returned value can be one of the following values: 3178 * @arg @ref LL_EXTI_D3_PEND_CLR_DMACH6 3179 * @arg @ref LL_EXTI_D3_PEND_CLR_DMACH7 3180 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM4 (*) 3181 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM5 (*) 3182 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM2 (*) 3183 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM3 (*) 3184 * 3185 * (*) value not defined in all devices. 3186 */ 3187 __STATIC_INLINE uint32_t LL_D3_EXTI_GetPendClearSel_0_15(uint32_t ExtiLine) 3188 { 3189 return (uint32_t)(READ_BIT(EXTI->D3PCR1L, ((ExtiLine * ExtiLine) * 3UL)) / (ExtiLine * ExtiLine)); 3190 } 3191 3192 /** 3193 * @brief Get ExtLine D3 Domain Pend Clear Source selection for Lines in range 16 to 31 3194 * @rmtoll D3PCR1H PCSx LL_D3_EXTI_GetPendClearSel_16_31 3195 * @param ExtiLine This parameter can be one of the following values: 3196 * @arg @ref LL_EXTI_LINE_19 3197 * @arg @ref LL_EXTI_LINE_20 3198 * @arg @ref LL_EXTI_LINE_21 3199 * @arg @ref LL_EXTI_LINE_25 3200 * @retval Returned value can be one of the following values: 3201 * @arg @ref LL_EXTI_D3_PEND_CLR_DMACH6 3202 * @arg @ref LL_EXTI_D3_PEND_CLR_DMACH7 3203 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM4 (*) 3204 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM5 (*) 3205 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM2 (*) 3206 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM3 (*) 3207 * 3208 * (*) value not defined in all devices. 3209 */ 3210 __STATIC_INLINE uint32_t LL_D3_EXTI_GetPendClearSel_16_31(uint32_t ExtiLine) 3211 { 3212 return (uint32_t)(READ_BIT(EXTI->D3PCR1H, (((ExtiLine >> EXTI_IMR1_IM16_Pos) * (ExtiLine >> EXTI_IMR1_IM16_Pos)) * 3UL)) / ((ExtiLine >> EXTI_IMR1_IM16_Pos) * (ExtiLine >> EXTI_IMR1_IM16_Pos))); 3213 } 3214 3215 /** 3216 * @brief Get ExtLine D3 Domain Pend Clear Source selection for Lines in range 32 to 47 3217 * @rmtoll D3PCR2L PCSx LL_D3_EXTI_GetPendClearSel_32_47 3218 * @param ExtiLine This parameter can be one of the following values: 3219 * @arg @ref LL_EXTI_LINE_34 3220 * @arg @ref LL_EXTI_LINE_35 3221 * @arg @ref LL_EXTI_LINE_41 3222 * @retval Returned value can be one of the following values: 3223 * @arg @ref LL_EXTI_D3_PEND_CLR_DMACH6 3224 * @arg @ref LL_EXTI_D3_PEND_CLR_DMACH7 3225 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM4 (*) 3226 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM5 (*) 3227 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM2 (*) 3228 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM3 (*) 3229 * 3230 * (*) value not defined in all devices. 3231 */ 3232 __STATIC_INLINE uint32_t LL_D3_EXTI_GetPendClearSel_32_47(uint32_t ExtiLine) 3233 { 3234 return (uint32_t)(READ_BIT(EXTI->D3PCR2L, ((ExtiLine * ExtiLine) * 3UL)) / (ExtiLine * ExtiLine)); 3235 } 3236 3237 /** 3238 * @brief Get ExtLine D3 Domain Pend Clear Source selection for Lines in range 48 to 63 3239 * @rmtoll D3PCR2H PCSx LL_D3_EXTI_GetPendClearSel_48_63 3240 * @param ExtiLine This parameter can be one of the following values: 3241 * @arg @ref LL_EXTI_LINE_48 3242 * @arg @ref LL_EXTI_LINE_49 3243 * @arg @ref LL_EXTI_LINE_50 3244 * @arg @ref LL_EXTI_LINE_51 3245 * @arg @ref LL_EXTI_LINE_52 3246 * @arg @ref LL_EXTI_LINE_53 3247 * @retval Returned value can be one of the following values: 3248 * @arg @ref LL_EXTI_D3_PEND_CLR_DMACH6 3249 * @arg @ref LL_EXTI_D3_PEND_CLR_DMACH7 3250 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM4 (*) 3251 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM5 (*) 3252 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM2 (*) 3253 * @arg @ref LL_EXTI_D3_PEND_CLR_LPTIM3 (*) 3254 * 3255 * (*) value not defined in all devices. 3256 */ 3257 __STATIC_INLINE uint32_t LL_D3_EXTI_GetPendClearSel_48_63(uint32_t ExtiLine) 3258 { 3259 return (uint32_t)(READ_BIT(EXTI->D3PCR2H, (((ExtiLine >> EXTI_IMR2_IM48_Pos) * (ExtiLine >> EXTI_IMR2_IM48_Pos)) * 3UL)) / ((ExtiLine >> EXTI_IMR2_IM48_Pos) * (ExtiLine >> EXTI_IMR2_IM48_Pos))); 3260 } 3261 3262 3263 3264 /** 3265 * @} 3266 */ 3267 3268 #if defined(USE_FULL_LL_DRIVER) || defined(__rtems__) 3269 /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions 3270 * @ingroup RTEMSBSPsARMSTM32H7 3271 * @{, 3272 */ 3273 3274 ErrorStatus LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct); 3275 ErrorStatus LL_EXTI_DeInit(void); 3276 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct); 3277 3278 3279 /** 3280 * @} 3281 */ 3282 #endif /* USE_FULL_LL_DRIVER */ 3283 3284 /** 3285 * @} 3286 */ 3287 3288 /** 3289 * @} 3290 */ 3291 3292 #endif /* EXTI */ 3293 3294 /** 3295 * @} 3296 */ 3297 3298 #ifdef __cplusplus 3299 } 3300 #endif 3301 3302 #endif /* __STM32H7xx_LL_EXTI_H */ 3303
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