File indexing completed on 2025-05-11 08:23:36
0001
0002
0003
0004
0005
0006
0007
0008
0009
0010
0011
0012
0013
0014
0015
0016
0017
0018
0019
0020 #ifndef STM32H7xx_HAL_USART_H
0021 #define STM32H7xx_HAL_USART_H
0022
0023 #ifdef __cplusplus
0024 extern "C" {
0025 #endif
0026
0027
0028 #include "stm32h7xx_hal_def.h"
0029
0030
0031
0032
0033
0034
0035
0036
0037
0038
0039
0040
0041
0042
0043
0044
0045
0046
0047 typedef struct
0048 {
0049 uint32_t BaudRate;
0050
0051
0052
0053
0054
0055
0056
0057
0058
0059
0060
0061 uint32_t WordLength;
0062
0063
0064 uint32_t StopBits;
0065
0066
0067 uint32_t Parity;
0068
0069
0070
0071
0072
0073
0074 uint32_t Mode;
0075
0076
0077 uint32_t CLKPolarity;
0078
0079
0080 uint32_t CLKPhase;
0081
0082
0083 uint32_t CLKLastBit;
0084
0085
0086
0087 uint32_t ClockPrescaler;
0088
0089 } USART_InitTypeDef;
0090
0091
0092
0093
0094 typedef enum
0095 {
0096 HAL_USART_STATE_RESET = 0x00U,
0097 HAL_USART_STATE_READY = 0x01U,
0098 HAL_USART_STATE_BUSY = 0x02U,
0099 HAL_USART_STATE_BUSY_TX = 0x12U,
0100 HAL_USART_STATE_BUSY_RX = 0x22U,
0101 HAL_USART_STATE_BUSY_TX_RX = 0x32U,
0102 HAL_USART_STATE_TIMEOUT = 0x03U,
0103 HAL_USART_STATE_ERROR = 0x04U
0104 } HAL_USART_StateTypeDef;
0105
0106
0107
0108
0109 typedef enum
0110 {
0111 USART_CLOCKSOURCE_D2PCLK1 = 0x00U,
0112 USART_CLOCKSOURCE_D2PCLK2 = 0x01U,
0113 USART_CLOCKSOURCE_PLL2 = 0x02U,
0114 USART_CLOCKSOURCE_PLL3 = 0x04U,
0115 USART_CLOCKSOURCE_HSI = 0x08U,
0116 USART_CLOCKSOURCE_CSI = 0x10U,
0117 USART_CLOCKSOURCE_LSE = 0x20U,
0118 USART_CLOCKSOURCE_UNDEFINED = 0x40U
0119 } USART_ClockSourceTypeDef;
0120
0121
0122
0123
0124 typedef struct __USART_HandleTypeDef
0125 {
0126 USART_TypeDef *Instance;
0127
0128 USART_InitTypeDef Init;
0129
0130 const uint8_t *pTxBuffPtr;
0131
0132 uint16_t TxXferSize;
0133
0134 __IO uint16_t TxXferCount;
0135
0136 uint8_t *pRxBuffPtr;
0137
0138 uint16_t RxXferSize;
0139
0140 __IO uint16_t RxXferCount;
0141
0142 uint16_t Mask;
0143
0144 uint16_t NbRxDataToProcess;
0145
0146 uint16_t NbTxDataToProcess;
0147
0148 uint32_t SlaveMode;
0149
0150
0151 uint32_t FifoMode;
0152
0153
0154 void (*RxISR)(struct __USART_HandleTypeDef *husart);
0155
0156 void (*TxISR)(struct __USART_HandleTypeDef *husart);
0157
0158 DMA_HandleTypeDef *hdmatx;
0159
0160 DMA_HandleTypeDef *hdmarx;
0161
0162 HAL_LockTypeDef Lock;
0163
0164 __IO HAL_USART_StateTypeDef State;
0165
0166 __IO uint32_t ErrorCode;
0167
0168 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
0169 void (* TxHalfCpltCallback)(struct __USART_HandleTypeDef *husart);
0170 void (* TxCpltCallback)(struct __USART_HandleTypeDef *husart);
0171 void (* RxHalfCpltCallback)(struct __USART_HandleTypeDef *husart);
0172 void (* RxCpltCallback)(struct __USART_HandleTypeDef *husart);
0173 void (* TxRxCpltCallback)(struct __USART_HandleTypeDef *husart);
0174 void (* ErrorCallback)(struct __USART_HandleTypeDef *husart);
0175 void (* AbortCpltCallback)(struct __USART_HandleTypeDef *husart);
0176 void (* RxFifoFullCallback)(struct __USART_HandleTypeDef *husart);
0177 void (* TxFifoEmptyCallback)(struct __USART_HandleTypeDef *husart);
0178
0179 void (* MspInitCallback)(struct __USART_HandleTypeDef *husart);
0180 void (* MspDeInitCallback)(struct __USART_HandleTypeDef *husart);
0181 #endif
0182
0183 } USART_HandleTypeDef;
0184
0185 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
0186
0187
0188
0189 typedef enum
0190 {
0191 HAL_USART_TX_HALFCOMPLETE_CB_ID = 0x00U,
0192 HAL_USART_TX_COMPLETE_CB_ID = 0x01U,
0193 HAL_USART_RX_HALFCOMPLETE_CB_ID = 0x02U,
0194 HAL_USART_RX_COMPLETE_CB_ID = 0x03U,
0195 HAL_USART_TX_RX_COMPLETE_CB_ID = 0x04U,
0196 HAL_USART_ERROR_CB_ID = 0x05U,
0197 HAL_USART_ABORT_COMPLETE_CB_ID = 0x06U,
0198 HAL_USART_RX_FIFO_FULL_CB_ID = 0x07U,
0199 HAL_USART_TX_FIFO_EMPTY_CB_ID = 0x08U,
0200
0201 HAL_USART_MSPINIT_CB_ID = 0x09U,
0202 HAL_USART_MSPDEINIT_CB_ID = 0x0AU
0203
0204 } HAL_USART_CallbackIDTypeDef;
0205
0206
0207
0208
0209 typedef void (*pUSART_CallbackTypeDef)(USART_HandleTypeDef *husart);
0210
0211 #endif
0212
0213
0214
0215
0216
0217
0218
0219
0220
0221
0222
0223
0224
0225
0226
0227 #define HAL_USART_ERROR_NONE (0x00000000U)
0228 #define HAL_USART_ERROR_PE (0x00000001U)
0229 #define HAL_USART_ERROR_NE (0x00000002U)
0230 #define HAL_USART_ERROR_FE (0x00000004U)
0231 #define HAL_USART_ERROR_ORE (0x00000008U)
0232 #define HAL_USART_ERROR_DMA (0x00000010U)
0233 #define HAL_USART_ERROR_UDR (0x00000020U)
0234 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
0235 #define HAL_USART_ERROR_INVALID_CALLBACK (0x00000040U)
0236 #endif
0237 #define HAL_USART_ERROR_RTO (0x00000080U)
0238
0239
0240
0241
0242
0243
0244
0245
0246 #define USART_STOPBITS_0_5 USART_CR2_STOP_0
0247 #define USART_STOPBITS_1 0x00000000U
0248 #define USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1)
0249 #define USART_STOPBITS_2 USART_CR2_STOP_1
0250
0251
0252
0253
0254
0255
0256
0257
0258 #define USART_PARITY_NONE 0x00000000U
0259 #define USART_PARITY_EVEN USART_CR1_PCE
0260 #define USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS)
0261
0262
0263
0264
0265
0266
0267
0268
0269 #define USART_MODE_RX USART_CR1_RE
0270 #define USART_MODE_TX USART_CR1_TE
0271 #define USART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE)
0272
0273
0274
0275
0276
0277
0278
0279
0280 #define USART_CLOCK_DISABLE 0x00000000U
0281 #define USART_CLOCK_ENABLE USART_CR2_CLKEN
0282
0283
0284
0285
0286
0287
0288
0289
0290 #define USART_POLARITY_LOW 0x00000000U
0291 #define USART_POLARITY_HIGH USART_CR2_CPOL
0292
0293
0294
0295
0296
0297
0298
0299
0300 #define USART_PHASE_1EDGE 0x00000000U
0301 #define USART_PHASE_2EDGE USART_CR2_CPHA
0302
0303
0304
0305
0306
0307
0308
0309
0310 #define USART_LASTBIT_DISABLE 0x00000000U
0311 #define USART_LASTBIT_ENABLE USART_CR2_LBCL
0312
0313
0314
0315
0316
0317
0318
0319
0320 #define USART_PRESCALER_DIV1 0x00000000U
0321 #define USART_PRESCALER_DIV2 0x00000001U
0322 #define USART_PRESCALER_DIV4 0x00000002U
0323 #define USART_PRESCALER_DIV6 0x00000003U
0324 #define USART_PRESCALER_DIV8 0x00000004U
0325 #define USART_PRESCALER_DIV10 0x00000005U
0326 #define USART_PRESCALER_DIV12 0x00000006U
0327 #define USART_PRESCALER_DIV16 0x00000007U
0328 #define USART_PRESCALER_DIV32 0x00000008U
0329 #define USART_PRESCALER_DIV64 0x00000009U
0330 #define USART_PRESCALER_DIV128 0x0000000AU
0331 #define USART_PRESCALER_DIV256 0x0000000BU
0332
0333
0334
0335
0336
0337
0338
0339
0340
0341 #define USART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ
0342 #define USART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ
0343
0344
0345
0346
0347
0348
0349
0350
0351
0352
0353 #define USART_FLAG_TXFT USART_ISR_TXFT
0354 #define USART_FLAG_RXFT USART_ISR_RXFT
0355 #define USART_FLAG_RXFF USART_ISR_RXFF
0356 #define USART_FLAG_TXFE USART_ISR_TXFE
0357 #define USART_FLAG_REACK USART_ISR_REACK
0358 #define USART_FLAG_TEACK USART_ISR_TEACK
0359 #define USART_FLAG_BUSY USART_ISR_BUSY
0360 #define USART_FLAG_UDR USART_ISR_UDR
0361 #define USART_FLAG_TXE USART_ISR_TXE_TXFNF
0362 #define USART_FLAG_TXFNF USART_ISR_TXE_TXFNF
0363 #define USART_FLAG_RTOF USART_ISR_RTOF
0364 #define USART_FLAG_TC USART_ISR_TC
0365 #define USART_FLAG_RXNE USART_ISR_RXNE_RXFNE
0366 #define USART_FLAG_RXFNE USART_ISR_RXNE_RXFNE
0367 #define USART_FLAG_IDLE USART_ISR_IDLE
0368 #define USART_FLAG_ORE USART_ISR_ORE
0369 #define USART_FLAG_NE USART_ISR_NE
0370 #define USART_FLAG_FE USART_ISR_FE
0371 #define USART_FLAG_PE USART_ISR_PE
0372
0373
0374
0375
0376
0377
0378
0379
0380
0381
0382
0383
0384
0385
0386
0387
0388 #define USART_IT_PE 0x0028U
0389 #define USART_IT_TXE 0x0727U
0390 #define USART_IT_TXFNF 0x0727U
0391 #define USART_IT_TC 0x0626U
0392 #define USART_IT_RXNE 0x0525U
0393 #define USART_IT_RXFNE 0x0525U
0394 #define USART_IT_IDLE 0x0424U
0395 #define USART_IT_ERR 0x0060U
0396 #define USART_IT_ORE 0x0300U
0397 #define USART_IT_NE 0x0200U
0398 #define USART_IT_FE 0x0100U
0399 #define USART_IT_RXFF 0x183FU
0400 #define USART_IT_TXFE 0x173EU
0401 #define USART_IT_RXFT 0x1A7CU
0402 #define USART_IT_TXFT 0x1B77U
0403
0404
0405
0406
0407
0408
0409
0410
0411
0412 #define USART_CLEAR_PEF USART_ICR_PECF
0413 #define USART_CLEAR_FEF USART_ICR_FECF
0414 #define USART_CLEAR_NEF USART_ICR_NECF
0415 #define USART_CLEAR_OREF USART_ICR_ORECF
0416 #define USART_CLEAR_IDLEF USART_ICR_IDLECF
0417 #define USART_CLEAR_TCF USART_ICR_TCCF
0418 #define USART_CLEAR_UDRF USART_ICR_UDRCF
0419 #define USART_CLEAR_TXFECF USART_ICR_TXFECF
0420 #define USART_CLEAR_RTOF USART_ICR_RTOCF
0421
0422
0423
0424
0425
0426
0427
0428
0429 #define USART_IT_MASK 0x001FU
0430 #define USART_CR_MASK 0x00E0U
0431 #define USART_CR_POS 5U
0432 #define USART_ISR_MASK 0x1F00U
0433 #define USART_ISR_POS 8U
0434
0435
0436
0437
0438
0439
0440
0441
0442
0443
0444
0445
0446
0447
0448
0449
0450
0451
0452 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
0453 #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) do{ \
0454 (__HANDLE__)->State = HAL_USART_STATE_RESET; \
0455 (__HANDLE__)->MspInitCallback = NULL; \
0456 (__HANDLE__)->MspDeInitCallback = NULL; \
0457 } while(0U)
0458 #else
0459 #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET)
0460 #endif
0461
0462
0463
0464
0465
0466
0467
0468
0469
0470
0471
0472
0473
0474
0475
0476
0477
0478
0479
0480
0481
0482
0483
0484
0485
0486
0487 #define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
0488
0489
0490
0491
0492
0493
0494
0495
0496
0497
0498
0499
0500
0501
0502
0503
0504 #define __HAL_USART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
0505
0506
0507
0508
0509
0510 #define __HAL_USART_CLEAR_PEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_PEF)
0511
0512
0513
0514
0515
0516 #define __HAL_USART_CLEAR_FEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_FEF)
0517
0518
0519
0520
0521
0522 #define __HAL_USART_CLEAR_NEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_NEF)
0523
0524
0525
0526
0527
0528 #define __HAL_USART_CLEAR_OREFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_OREF)
0529
0530
0531
0532
0533
0534 #define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_IDLEF)
0535
0536
0537
0538
0539
0540 #define __HAL_USART_CLEAR_TXFECF(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_TXFECF)
0541
0542
0543
0544
0545
0546 #define __HAL_USART_CLEAR_UDRFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_UDRF)
0547
0548
0549
0550
0551
0552
0553
0554
0555
0556
0557
0558
0559
0560
0561
0562
0563
0564
0565
0566 #define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__)\
0567 (((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 1U)?\
0568 ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
0569 ((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 2U)?\
0570 ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
0571 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))))
0572
0573
0574
0575
0576
0577
0578
0579
0580
0581
0582
0583
0584
0585
0586
0587
0588
0589
0590
0591 #define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__)\
0592 (((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 1U)?\
0593 ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
0594 ((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 2U)?\
0595 ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
0596 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))))
0597
0598
0599
0600
0601
0602
0603
0604
0605
0606
0607
0608
0609
0610
0611
0612
0613
0614
0615
0616
0617
0618 #define __HAL_USART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\
0619 & (0x01U << (((__INTERRUPT__) & USART_ISR_MASK)>>\
0620 USART_ISR_POS))) != 0U) ? SET : RESET)
0621
0622
0623
0624
0625
0626
0627
0628
0629
0630
0631
0632
0633
0634
0635
0636
0637
0638
0639
0640
0641
0642 #define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 0x05U) == 0x01U) ?\
0643 (__HANDLE__)->Instance->CR1 : \
0644 (((((uint8_t)(__INTERRUPT__)) >> 0x05U) == 0x02U) ?\
0645 (__HANDLE__)->Instance->CR2 : \
0646 (__HANDLE__)->Instance->CR3)) & (0x01U <<\
0647 (((uint16_t)(__INTERRUPT__)) &\
0648 USART_IT_MASK))) != 0U) ? SET : RESET)
0649
0650
0651
0652
0653
0654
0655
0656
0657
0658
0659
0660
0661
0662
0663
0664
0665 #define __HAL_USART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
0666
0667
0668
0669
0670
0671
0672
0673
0674
0675
0676 #define __HAL_USART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__))
0677
0678
0679
0680
0681
0682 #define __HAL_USART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
0683
0684
0685
0686
0687
0688 #define __HAL_USART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT)
0689
0690
0691
0692
0693
0694 #define __HAL_USART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
0695
0696
0697
0698
0699
0700 #define __HAL_USART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
0701
0702
0703
0704
0705
0706
0707
0708
0709
0710
0711
0712
0713
0714
0715
0716 #define USART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \
0717 (((__CLOCKPRESCALER__) == USART_PRESCALER_DIV1) ? 1U : \
0718 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV2) ? 2U : \
0719 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV4) ? 4U : \
0720 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV6) ? 6U : \
0721 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV8) ? 8U : \
0722 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV10) ? 10U : \
0723 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV12) ? 12U : \
0724 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV16) ? 16U : \
0725 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV32) ? 32U : \
0726 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV64) ? 64U : \
0727 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV128) ? 128U : \
0728 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV256) ? 256U : 1U)
0729
0730
0731
0732
0733
0734
0735
0736 #define USART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__)\
0737 (((((__PCLK__)/USART_GET_DIV_FACTOR(__CLOCKPRESCALER__))*2U)\
0738 + ((__BAUD__)/2U)) / (__BAUD__))
0739
0740
0741
0742
0743
0744
0745 #if defined(UART9) && defined(USART10)
0746 #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
0747 do { \
0748 if((__HANDLE__)->Instance == USART1) \
0749 { \
0750 switch(__HAL_RCC_GET_USART1_SOURCE()) \
0751 { \
0752 case RCC_USART1CLKSOURCE_D2PCLK2: \
0753 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \
0754 break; \
0755 case RCC_USART1CLKSOURCE_PLL2: \
0756 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
0757 break; \
0758 case RCC_USART1CLKSOURCE_PLL3: \
0759 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
0760 break; \
0761 case RCC_USART1CLKSOURCE_HSI: \
0762 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
0763 break; \
0764 case RCC_USART1CLKSOURCE_CSI: \
0765 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
0766 break; \
0767 case RCC_USART1CLKSOURCE_LSE: \
0768 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
0769 break; \
0770 default: \
0771 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
0772 break; \
0773 } \
0774 } \
0775 else if((__HANDLE__)->Instance == USART2) \
0776 { \
0777 switch(__HAL_RCC_GET_USART2_SOURCE()) \
0778 { \
0779 case RCC_USART2CLKSOURCE_D2PCLK1: \
0780 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK1; \
0781 break; \
0782 case RCC_USART2CLKSOURCE_PLL2: \
0783 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
0784 break; \
0785 case RCC_USART2CLKSOURCE_PLL3: \
0786 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
0787 break; \
0788 case RCC_USART2CLKSOURCE_HSI: \
0789 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
0790 break; \
0791 case RCC_USART2CLKSOURCE_CSI: \
0792 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
0793 break; \
0794 case RCC_USART2CLKSOURCE_LSE: \
0795 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
0796 break; \
0797 default: \
0798 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
0799 break; \
0800 } \
0801 } \
0802 else if((__HANDLE__)->Instance == USART3) \
0803 { \
0804 switch(__HAL_RCC_GET_USART3_SOURCE()) \
0805 { \
0806 case RCC_USART3CLKSOURCE_D2PCLK1: \
0807 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK1; \
0808 break; \
0809 case RCC_USART3CLKSOURCE_PLL2: \
0810 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
0811 break; \
0812 case RCC_USART3CLKSOURCE_PLL3: \
0813 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
0814 break; \
0815 case RCC_USART3CLKSOURCE_HSI: \
0816 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
0817 break; \
0818 case RCC_USART3CLKSOURCE_CSI: \
0819 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
0820 break; \
0821 case RCC_USART3CLKSOURCE_LSE: \
0822 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
0823 break; \
0824 default: \
0825 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
0826 break; \
0827 } \
0828 } \
0829 else if((__HANDLE__)->Instance == USART6) \
0830 { \
0831 switch(__HAL_RCC_GET_USART6_SOURCE()) \
0832 { \
0833 case RCC_USART6CLKSOURCE_D2PCLK2: \
0834 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \
0835 break; \
0836 case RCC_USART6CLKSOURCE_PLL2: \
0837 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
0838 break; \
0839 case RCC_USART6CLKSOURCE_PLL3: \
0840 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
0841 break; \
0842 case RCC_USART6CLKSOURCE_HSI: \
0843 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
0844 break; \
0845 case RCC_USART6CLKSOURCE_CSI: \
0846 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
0847 break; \
0848 case RCC_USART6CLKSOURCE_LSE: \
0849 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
0850 break; \
0851 default: \
0852 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
0853 break; \
0854 } \
0855 } \
0856 else if((__HANDLE__)->Instance == USART10) \
0857 { \
0858 switch(__HAL_RCC_GET_USART10_SOURCE()) \
0859 { \
0860 case RCC_USART10CLKSOURCE_D2PCLK2: \
0861 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \
0862 break; \
0863 case RCC_USART10CLKSOURCE_PLL2: \
0864 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
0865 break; \
0866 case RCC_USART10CLKSOURCE_PLL3: \
0867 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
0868 break; \
0869 case RCC_USART10CLKSOURCE_HSI: \
0870 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
0871 break; \
0872 case RCC_USART10CLKSOURCE_CSI: \
0873 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
0874 break; \
0875 case RCC_USART10CLKSOURCE_LSE: \
0876 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
0877 break; \
0878 default: \
0879 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
0880 break; \
0881 } \
0882 } \
0883 else \
0884 { \
0885 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
0886 } \
0887 } while(0U)
0888 #else
0889 #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
0890 do { \
0891 if((__HANDLE__)->Instance == USART1) \
0892 { \
0893 switch(__HAL_RCC_GET_USART1_SOURCE()) \
0894 { \
0895 case RCC_USART1CLKSOURCE_D2PCLK2: \
0896 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \
0897 break; \
0898 case RCC_USART1CLKSOURCE_PLL2: \
0899 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
0900 break; \
0901 case RCC_USART1CLKSOURCE_PLL3: \
0902 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
0903 break; \
0904 case RCC_USART1CLKSOURCE_HSI: \
0905 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
0906 break; \
0907 case RCC_USART1CLKSOURCE_CSI: \
0908 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
0909 break; \
0910 case RCC_USART1CLKSOURCE_LSE: \
0911 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
0912 break; \
0913 default: \
0914 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
0915 break; \
0916 } \
0917 } \
0918 else if((__HANDLE__)->Instance == USART2) \
0919 { \
0920 switch(__HAL_RCC_GET_USART2_SOURCE()) \
0921 { \
0922 case RCC_USART2CLKSOURCE_D2PCLK1: \
0923 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK1; \
0924 break; \
0925 case RCC_USART2CLKSOURCE_PLL2: \
0926 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
0927 break; \
0928 case RCC_USART2CLKSOURCE_PLL3: \
0929 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
0930 break; \
0931 case RCC_USART2CLKSOURCE_HSI: \
0932 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
0933 break; \
0934 case RCC_USART2CLKSOURCE_CSI: \
0935 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
0936 break; \
0937 case RCC_USART2CLKSOURCE_LSE: \
0938 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
0939 break; \
0940 default: \
0941 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
0942 break; \
0943 } \
0944 } \
0945 else if((__HANDLE__)->Instance == USART3) \
0946 { \
0947 switch(__HAL_RCC_GET_USART3_SOURCE()) \
0948 { \
0949 case RCC_USART3CLKSOURCE_D2PCLK1: \
0950 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK1; \
0951 break; \
0952 case RCC_USART3CLKSOURCE_PLL2: \
0953 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
0954 break; \
0955 case RCC_USART3CLKSOURCE_PLL3: \
0956 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
0957 break; \
0958 case RCC_USART3CLKSOURCE_HSI: \
0959 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
0960 break; \
0961 case RCC_USART3CLKSOURCE_CSI: \
0962 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
0963 break; \
0964 case RCC_USART3CLKSOURCE_LSE: \
0965 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
0966 break; \
0967 default: \
0968 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
0969 break; \
0970 } \
0971 } \
0972 else if((__HANDLE__)->Instance == USART6) \
0973 { \
0974 switch(__HAL_RCC_GET_USART6_SOURCE()) \
0975 { \
0976 case RCC_USART6CLKSOURCE_D2PCLK2: \
0977 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \
0978 break; \
0979 case RCC_USART6CLKSOURCE_PLL2: \
0980 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
0981 break; \
0982 case RCC_USART6CLKSOURCE_PLL3: \
0983 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
0984 break; \
0985 case RCC_USART6CLKSOURCE_HSI: \
0986 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
0987 break; \
0988 case RCC_USART6CLKSOURCE_CSI: \
0989 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
0990 break; \
0991 case RCC_USART6CLKSOURCE_LSE: \
0992 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
0993 break; \
0994 default: \
0995 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
0996 break; \
0997 } \
0998 } \
0999 else \
1000 { \
1001 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
1002 } \
1003 } while(0U)
1004 #endif
1005
1006
1007
1008
1009
1010
1011 #define IS_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 12500000U)
1012
1013
1014
1015
1016
1017
1018 #define IS_USART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == USART_STOPBITS_0_5) || \
1019 ((__STOPBITS__) == USART_STOPBITS_1) || \
1020 ((__STOPBITS__) == USART_STOPBITS_1_5) || \
1021 ((__STOPBITS__) == USART_STOPBITS_2))
1022
1023
1024
1025
1026
1027
1028 #define IS_USART_PARITY(__PARITY__) (((__PARITY__) == USART_PARITY_NONE) || \
1029 ((__PARITY__) == USART_PARITY_EVEN) || \
1030 ((__PARITY__) == USART_PARITY_ODD))
1031
1032
1033
1034
1035
1036
1037 #define IS_USART_MODE(__MODE__) ((((__MODE__) & 0xFFFFFFF3U) == 0x00U) && ((__MODE__) != 0x00U))
1038
1039
1040
1041
1042
1043
1044 #define IS_USART_CLOCK(__CLOCK__) (((__CLOCK__) == USART_CLOCK_DISABLE) || \
1045 ((__CLOCK__) == USART_CLOCK_ENABLE))
1046
1047
1048
1049
1050
1051
1052 #define IS_USART_POLARITY(__CPOL__) (((__CPOL__) == USART_POLARITY_LOW) || ((__CPOL__) == USART_POLARITY_HIGH))
1053
1054
1055
1056
1057
1058
1059 #define IS_USART_PHASE(__CPHA__) (((__CPHA__) == USART_PHASE_1EDGE) || ((__CPHA__) == USART_PHASE_2EDGE))
1060
1061
1062
1063
1064
1065
1066 #define IS_USART_LASTBIT(__LASTBIT__) (((__LASTBIT__) == USART_LASTBIT_DISABLE) || \
1067 ((__LASTBIT__) == USART_LASTBIT_ENABLE))
1068
1069
1070
1071
1072
1073
1074 #define IS_USART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == USART_RXDATA_FLUSH_REQUEST) || \
1075 ((__PARAM__) == USART_TXDATA_FLUSH_REQUEST))
1076
1077
1078
1079
1080
1081
1082 #define IS_USART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == USART_PRESCALER_DIV1) || \
1083 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV2) || \
1084 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV4) || \
1085 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV6) || \
1086 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV8) || \
1087 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV10) || \
1088 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV12) || \
1089 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV16) || \
1090 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV32) || \
1091 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV64) || \
1092 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV128) || \
1093 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV256))
1094
1095
1096
1097
1098
1099
1100 #include "stm32h7xx_hal_usart_ex.h"
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112 HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart);
1113 HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart);
1114 void HAL_USART_MspInit(USART_HandleTypeDef *husart);
1115 void HAL_USART_MspDeInit(USART_HandleTypeDef *husart);
1116
1117
1118 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
1119 HAL_StatusTypeDef HAL_USART_RegisterCallback(USART_HandleTypeDef *husart, HAL_USART_CallbackIDTypeDef CallbackID,
1120 pUSART_CallbackTypeDef pCallback);
1121 HAL_StatusTypeDef HAL_USART_UnRegisterCallback(USART_HandleTypeDef *husart, HAL_USART_CallbackIDTypeDef CallbackID);
1122 #endif
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133 HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size,
1134 uint32_t Timeout);
1135 HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
1136 HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData,
1137 uint16_t Size, uint32_t Timeout);
1138 HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size);
1139 HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
1140 HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData,
1141 uint16_t Size);
1142 HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size);
1143 HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
1144 HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData,
1145 uint16_t Size);
1146 HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart);
1147 HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart);
1148 HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart);
1149
1150 HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *husart);
1151 HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *husart);
1152
1153 void HAL_USART_IRQHandler(USART_HandleTypeDef *husart);
1154 void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart);
1155 void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart);
1156 void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart);
1157 void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart);
1158 void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart);
1159 void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart);
1160 void HAL_USART_AbortCpltCallback(USART_HandleTypeDef *husart);
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171 HAL_USART_StateTypeDef HAL_USART_GetState(const USART_HandleTypeDef *husart);
1172 uint32_t HAL_USART_GetError(const USART_HandleTypeDef *husart);
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190 #ifdef __cplusplus
1191 }
1192 #endif
1193
1194 #endif
1195