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File indexing completed on 2025-05-11 08:23:36
0001 /** 0002 ****************************************************************************** 0003 * @file stm32h7xx_hal_uart.h 0004 * @author MCD Application Team 0005 * @brief Header file of UART HAL module. 0006 ****************************************************************************** 0007 * @attention 0008 * 0009 * Copyright (c) 2017 STMicroelectronics. 0010 * All rights reserved. 0011 * 0012 * This software is licensed under terms that can be found in the LICENSE file 0013 * in the root directory of this software component. 0014 * If no LICENSE file comes with this software, it is provided AS-IS. 0015 * 0016 ****************************************************************************** 0017 */ 0018 0019 /* Define to prevent recursive inclusion -------------------------------------*/ 0020 #ifndef STM32H7xx_HAL_UART_H 0021 #define STM32H7xx_HAL_UART_H 0022 0023 #ifdef __cplusplus 0024 extern "C" { 0025 #endif 0026 0027 /* Includes ------------------------------------------------------------------*/ 0028 #include "stm32h7xx_hal_def.h" 0029 0030 /** @addtogroup STM32H7xx_HAL_Driver 0031 * @{ 0032 */ 0033 0034 /** @addtogroup UART 0035 * @{ 0036 */ 0037 0038 /* Exported types ------------------------------------------------------------*/ 0039 /** @defgroup UART_Exported_Types UART Exported Types 0040 * @ingroup RTEMSBSPsARMSTM32H7 0041 * @{ 0042 */ 0043 0044 /** 0045 * @brief UART Init Structure definition 0046 */ 0047 typedef struct 0048 { 0049 uint32_t BaudRate; /*!< This member configures the UART communication baud rate. 0050 The baud rate register is computed using the following formula: 0051 LPUART: 0052 ======= 0053 Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate))) 0054 where lpuart_ker_ck_pres is the UART input clock divided by a prescaler 0055 UART: 0056 ===== 0057 - If oversampling is 16 or in LIN mode, 0058 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate))) 0059 - If oversampling is 8, 0060 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / 0061 ((huart->Init.BaudRate)))[15:4] 0062 Baud Rate Register[3] = 0 0063 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / 0064 ((huart->Init.BaudRate)))[3:0]) >> 1 0065 where uart_ker_ck_pres is the UART input clock divided by a prescaler */ 0066 0067 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 0068 This parameter can be a value of @ref UARTEx_Word_Length. */ 0069 0070 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 0071 This parameter can be a value of @ref UART_Stop_Bits. */ 0072 0073 uint32_t Parity; /*!< Specifies the parity mode. 0074 This parameter can be a value of @ref UART_Parity 0075 @note When parity is enabled, the computed parity is inserted 0076 at the MSB position of the transmitted data (9th bit when 0077 the word length is set to 9 data bits; 8th bit when the 0078 word length is set to 8 data bits). */ 0079 0080 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 0081 This parameter can be a value of @ref UART_Mode. */ 0082 0083 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled 0084 or disabled. 0085 This parameter can be a value of @ref UART_Hardware_Flow_Control. */ 0086 0087 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, 0088 to achieve higher speed (up to f_PCLK/8). 0089 This parameter can be a value of @ref UART_Over_Sampling. */ 0090 0091 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. 0092 Selecting the single sample method increases the receiver tolerance to clock 0093 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ 0094 0095 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source. 0096 This parameter can be a value of @ref UART_ClockPrescaler. */ 0097 0098 } UART_InitTypeDef; 0099 0100 /** 0101 * @brief UART Advanced Features initialization structure definition 0102 */ 0103 typedef struct 0104 { 0105 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several 0106 Advanced Features may be initialized at the same time . 0107 This parameter can be a value of 0108 @ref UART_Advanced_Features_Initialization_Type. */ 0109 0110 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. 0111 This parameter can be a value of @ref UART_Tx_Inv. */ 0112 0113 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. 0114 This parameter can be a value of @ref UART_Rx_Inv. */ 0115 0116 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic 0117 vs negative/inverted logic). 0118 This parameter can be a value of @ref UART_Data_Inv. */ 0119 0120 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. 0121 This parameter can be a value of @ref UART_Rx_Tx_Swap. */ 0122 0123 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. 0124 This parameter can be a value of @ref UART_Overrun_Disable. */ 0125 0126 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. 0127 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ 0128 0129 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. 0130 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */ 0131 0132 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate 0133 detection is carried out. 0134 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ 0135 0136 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. 0137 This parameter can be a value of @ref UART_MSB_First. */ 0138 } UART_AdvFeatureInitTypeDef; 0139 0140 /** 0141 * @brief HAL UART State definition 0142 * @note HAL UART State value is a combination of 2 different substates: 0143 * gState and RxState (see @ref UART_State_Definition). 0144 * - gState contains UART state information related to global Handle management 0145 * and also information related to Tx operations. 0146 * gState value coding follow below described bitmap : 0147 * b7-b6 Error information 0148 * 00 : No Error 0149 * 01 : (Not Used) 0150 * 10 : Timeout 0151 * 11 : Error 0152 * b5 Peripheral initialization status 0153 * 0 : Reset (Peripheral not initialized) 0154 * 1 : Init done (Peripheral initialized. HAL UART Init function already called) 0155 * b4-b3 (not used) 0156 * xx : Should be set to 00 0157 * b2 Intrinsic process state 0158 * 0 : Ready 0159 * 1 : Busy (Peripheral busy with some configuration or internal operations) 0160 * b1 (not used) 0161 * x : Should be set to 0 0162 * b0 Tx state 0163 * 0 : Ready (no Tx operation ongoing) 0164 * 1 : Busy (Tx operation ongoing) 0165 * - RxState contains information related to Rx operations. 0166 * RxState value coding follow below described bitmap : 0167 * b7-b6 (not used) 0168 * xx : Should be set to 00 0169 * b5 Peripheral initialization status 0170 * 0 : Reset (Peripheral not initialized) 0171 * 1 : Init done (Peripheral initialized) 0172 * b4-b2 (not used) 0173 * xxx : Should be set to 000 0174 * b1 Rx state 0175 * 0 : Ready (no Rx operation ongoing) 0176 * 1 : Busy (Rx operation ongoing) 0177 * b0 (not used) 0178 * x : Should be set to 0. 0179 */ 0180 typedef uint32_t HAL_UART_StateTypeDef; 0181 0182 /** 0183 * @brief UART clock sources definition 0184 */ 0185 typedef enum 0186 { 0187 UART_CLOCKSOURCE_D2PCLK1 = 0x00U, /*!< Domain2 PCLK1 clock source */ 0188 UART_CLOCKSOURCE_D2PCLK2 = 0x01U, /*!< Domain2 PCLK2 clock source */ 0189 UART_CLOCKSOURCE_D3PCLK1 = 0x02U, /*!< Domain3 PCLK1 clock source */ 0190 UART_CLOCKSOURCE_PLL2 = 0x04U, /*!< PLL2Q clock source */ 0191 UART_CLOCKSOURCE_PLL3 = 0x08U, /*!< PLL3Q clock source */ 0192 UART_CLOCKSOURCE_HSI = 0x10U, /*!< HSI clock source */ 0193 UART_CLOCKSOURCE_CSI = 0x20U, /*!< CSI clock source */ 0194 UART_CLOCKSOURCE_LSE = 0x40U, /*!< LSE clock source */ 0195 UART_CLOCKSOURCE_UNDEFINED = 0x80U /*!< Undefined clock source */ 0196 } UART_ClockSourceTypeDef; 0197 0198 /** 0199 * @brief HAL UART Reception type definition 0200 * @note HAL UART Reception type value aims to identify which type of Reception is ongoing. 0201 * This parameter can be a value of @ref UART_Reception_Type_Values : 0202 * HAL_UART_RECEPTION_STANDARD = 0x00U, 0203 * HAL_UART_RECEPTION_TOIDLE = 0x01U, 0204 * HAL_UART_RECEPTION_TORTO = 0x02U, 0205 * HAL_UART_RECEPTION_TOCHARMATCH = 0x03U, 0206 */ 0207 typedef uint32_t HAL_UART_RxTypeTypeDef; 0208 0209 /** 0210 * @brief HAL UART Rx Event type definition 0211 * @note HAL UART Rx Event type value aims to identify which type of Event has occurred 0212 * leading to call of the RxEvent callback. 0213 * This parameter can be a value of @ref UART_RxEvent_Type_Values : 0214 * HAL_UART_RXEVENT_TC = 0x00U, 0215 * HAL_UART_RXEVENT_HT = 0x01U, 0216 * HAL_UART_RXEVENT_IDLE = 0x02U, 0217 */ 0218 typedef uint32_t HAL_UART_RxEventTypeTypeDef; 0219 0220 /** 0221 * @brief UART handle Structure definition 0222 */ 0223 typedef struct __UART_HandleTypeDef 0224 { 0225 USART_TypeDef *Instance; /*!< UART registers base address */ 0226 0227 UART_InitTypeDef Init; /*!< UART communication parameters */ 0228 0229 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ 0230 0231 const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ 0232 0233 uint16_t TxXferSize; /*!< UART Tx Transfer size */ 0234 0235 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ 0236 0237 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ 0238 0239 uint16_t RxXferSize; /*!< UART Rx Transfer size */ 0240 0241 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ 0242 0243 uint16_t Mask; /*!< UART Rx RDR register mask */ 0244 0245 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used. 0246 This parameter can be a value of @ref UARTEx_FIFO_mode. */ 0247 0248 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */ 0249 0250 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */ 0251 0252 __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */ 0253 0254 __IO HAL_UART_RxEventTypeTypeDef RxEventType; /*!< Type of Rx Event */ 0255 0256 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ 0257 0258 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ 0259 0260 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ 0261 0262 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ 0263 0264 HAL_LockTypeDef Lock; /*!< Locking object */ 0265 0266 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management 0267 and also related to Tx operations. This parameter 0268 can be a value of @ref HAL_UART_StateTypeDef */ 0269 0270 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. This 0271 parameter can be a value of @ref HAL_UART_StateTypeDef */ 0272 0273 __IO uint32_t ErrorCode; /*!< UART Error code */ 0274 0275 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 0276 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ 0277 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ 0278 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ 0279 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ 0280 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ 0281 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ 0282 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ 0283 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ 0284 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ 0285 void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */ 0286 void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */ 0287 void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */ 0288 0289 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ 0290 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ 0291 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 0292 0293 } UART_HandleTypeDef; 0294 0295 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 0296 /** 0297 * @brief HAL UART Callback ID enumeration definition 0298 */ 0299 typedef enum 0300 { 0301 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ 0302 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ 0303 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ 0304 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ 0305 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ 0306 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ 0307 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ 0308 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ 0309 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ 0310 HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */ 0311 HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */ 0312 0313 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ 0314 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ 0315 0316 } HAL_UART_CallbackIDTypeDef; 0317 0318 /** 0319 * @brief HAL UART Callback pointer definition 0320 */ 0321 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ 0322 typedef void (*pUART_RxEventCallbackTypeDef) 0323 (struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */ 0324 0325 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 0326 0327 /** 0328 * @} 0329 */ 0330 0331 /* Exported constants --------------------------------------------------------*/ 0332 /** @defgroup UART_Exported_Constants UART Exported Constants 0333 * @ingroup RTEMSBSPsARMSTM32H7 0334 * @{ 0335 */ 0336 0337 /** @defgroup UART_State_Definition UART State Code Definition 0338 * @ingroup RTEMSBSPsARMSTM32H7 0339 * @{ 0340 */ 0341 #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized 0342 Value is allowed for gState and RxState */ 0343 #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use 0344 Value is allowed for gState and RxState */ 0345 #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing 0346 Value is allowed for gState only */ 0347 #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing 0348 Value is allowed for gState only */ 0349 #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing 0350 Value is allowed for RxState only */ 0351 #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing 0352 Not to be used for neither gState nor RxState.Value is result 0353 of combination (Or) between gState and RxState values */ 0354 #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state 0355 Value is allowed for gState only */ 0356 #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error 0357 Value is allowed for gState only */ 0358 /** 0359 * @} 0360 */ 0361 0362 /** @defgroup UART_Error_Definition UART Error Definition 0363 * @ingroup RTEMSBSPsARMSTM32H7 0364 * @{ 0365 */ 0366 #define HAL_UART_ERROR_NONE (0x00000000U) /*!< No error */ 0367 #define HAL_UART_ERROR_PE (0x00000001U) /*!< Parity error */ 0368 #define HAL_UART_ERROR_NE (0x00000002U) /*!< Noise error */ 0369 #define HAL_UART_ERROR_FE (0x00000004U) /*!< Frame error */ 0370 #define HAL_UART_ERROR_ORE (0x00000008U) /*!< Overrun error */ 0371 #define HAL_UART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 0372 #define HAL_UART_ERROR_RTO (0x00000020U) /*!< Receiver Timeout error */ 0373 0374 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 0375 #define HAL_UART_ERROR_INVALID_CALLBACK (0x00000040U) /*!< Invalid Callback error */ 0376 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 0377 /** 0378 * @} 0379 */ 0380 0381 /** @defgroup UART_Stop_Bits UART Number of Stop Bits 0382 * @ingroup RTEMSBSPsARMSTM32H7 0383 * @{ 0384 */ 0385 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ 0386 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ 0387 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ 0388 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ 0389 /** 0390 * @} 0391 */ 0392 0393 /** @defgroup UART_Parity UART Parity 0394 * @ingroup RTEMSBSPsARMSTM32H7 0395 * @{ 0396 */ 0397 #define UART_PARITY_NONE 0x00000000U /*!< No parity */ 0398 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ 0399 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ 0400 /** 0401 * @} 0402 */ 0403 0404 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control 0405 * @ingroup RTEMSBSPsARMSTM32H7 0406 * @{ 0407 */ 0408 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ 0409 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ 0410 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ 0411 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ 0412 /** 0413 * @} 0414 */ 0415 0416 /** @defgroup UART_Mode UART Transfer Mode 0417 * @ingroup RTEMSBSPsARMSTM32H7 0418 * @{ 0419 */ 0420 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */ 0421 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */ 0422 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ 0423 /** 0424 * @} 0425 */ 0426 0427 /** @defgroup UART_State UART State 0428 * @ingroup RTEMSBSPsARMSTM32H7 0429 * @{ 0430 */ 0431 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ 0432 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ 0433 /** 0434 * @} 0435 */ 0436 0437 /** @defgroup UART_Over_Sampling UART Over Sampling 0438 * @ingroup RTEMSBSPsARMSTM32H7 0439 * @{ 0440 */ 0441 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ 0442 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ 0443 /** 0444 * @} 0445 */ 0446 0447 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method 0448 * @ingroup RTEMSBSPsARMSTM32H7 0449 * @{ 0450 */ 0451 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ 0452 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ 0453 /** 0454 * @} 0455 */ 0456 0457 /** @defgroup UART_ClockPrescaler UART Clock Prescaler 0458 * @ingroup RTEMSBSPsARMSTM32H7 0459 * @{ 0460 */ 0461 #define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */ 0462 #define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */ 0463 #define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */ 0464 #define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */ 0465 #define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */ 0466 #define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */ 0467 #define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */ 0468 #define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */ 0469 #define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */ 0470 #define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */ 0471 #define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */ 0472 #define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */ 0473 /** 0474 * @} 0475 */ 0476 0477 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode 0478 * @ingroup RTEMSBSPsARMSTM32H7 0479 * @{ 0480 */ 0481 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection 0482 on start bit */ 0483 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection 0484 on falling edge */ 0485 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection 0486 on 0x7F frame detection */ 0487 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection 0488 on 0x55 frame detection */ 0489 /** 0490 * @} 0491 */ 0492 0493 /** @defgroup UART_Receiver_Timeout UART Receiver Timeout 0494 * @ingroup RTEMSBSPsARMSTM32H7 0495 * @{ 0496 */ 0497 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART Receiver Timeout disable */ 0498 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART Receiver Timeout enable */ 0499 /** 0500 * @} 0501 */ 0502 0503 /** @defgroup UART_LIN UART Local Interconnection Network mode 0504 * @ingroup RTEMSBSPsARMSTM32H7 0505 * @{ 0506 */ 0507 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ 0508 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ 0509 /** 0510 * @} 0511 */ 0512 0513 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection 0514 * @ingroup RTEMSBSPsARMSTM32H7 0515 * @{ 0516 */ 0517 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ 0518 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ 0519 /** 0520 * @} 0521 */ 0522 0523 /** @defgroup UART_DMA_Tx UART DMA Tx 0524 * @ingroup RTEMSBSPsARMSTM32H7 0525 * @{ 0526 */ 0527 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ 0528 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ 0529 /** 0530 * @} 0531 */ 0532 0533 /** @defgroup UART_DMA_Rx UART DMA Rx 0534 * @ingroup RTEMSBSPsARMSTM32H7 0535 * @{ 0536 */ 0537 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ 0538 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ 0539 /** 0540 * @} 0541 */ 0542 0543 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection 0544 * @ingroup RTEMSBSPsARMSTM32H7 0545 * @{ 0546 */ 0547 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ 0548 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ 0549 /** 0550 * @} 0551 */ 0552 0553 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods 0554 * @ingroup RTEMSBSPsARMSTM32H7 0555 * @{ 0556 */ 0557 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ 0558 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ 0559 /** 0560 * @} 0561 */ 0562 0563 /** @defgroup UART_Request_Parameters UART Request Parameters 0564 * @ingroup RTEMSBSPsARMSTM32H7 0565 * @{ 0566 */ 0567 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ 0568 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ 0569 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ 0570 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ 0571 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ 0572 /** 0573 * @} 0574 */ 0575 0576 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type 0577 * @ingroup RTEMSBSPsARMSTM32H7 0578 * @{ 0579 */ 0580 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ 0581 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ 0582 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ 0583 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ 0584 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ 0585 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ 0586 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ 0587 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ 0588 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ 0589 /** 0590 * @} 0591 */ 0592 0593 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion 0594 * @ingroup RTEMSBSPsARMSTM32H7 0595 * @{ 0596 */ 0597 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ 0598 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ 0599 /** 0600 * @} 0601 */ 0602 0603 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion 0604 * @ingroup RTEMSBSPsARMSTM32H7 0605 * @{ 0606 */ 0607 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ 0608 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ 0609 /** 0610 * @} 0611 */ 0612 0613 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion 0614 * @ingroup RTEMSBSPsARMSTM32H7 0615 * @{ 0616 */ 0617 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ 0618 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ 0619 /** 0620 * @} 0621 */ 0622 0623 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap 0624 * @ingroup RTEMSBSPsARMSTM32H7 0625 * @{ 0626 */ 0627 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ 0628 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ 0629 /** 0630 * @} 0631 */ 0632 0633 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable 0634 * @ingroup RTEMSBSPsARMSTM32H7 0635 * @{ 0636 */ 0637 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ 0638 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ 0639 /** 0640 * @} 0641 */ 0642 0643 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable 0644 * @ingroup RTEMSBSPsARMSTM32H7 0645 * @{ 0646 */ 0647 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ 0648 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ 0649 /** 0650 * @} 0651 */ 0652 0653 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error 0654 * @ingroup RTEMSBSPsARMSTM32H7 0655 * @{ 0656 */ 0657 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ 0658 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ 0659 /** 0660 * @} 0661 */ 0662 0663 /** @defgroup UART_MSB_First UART Advanced Feature MSB First 0664 * @ingroup RTEMSBSPsARMSTM32H7 0665 * @{ 0666 */ 0667 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received 0668 first disable */ 0669 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received 0670 first enable */ 0671 /** 0672 * @} 0673 */ 0674 0675 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable 0676 * @ingroup RTEMSBSPsARMSTM32H7 0677 * @{ 0678 */ 0679 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ 0680 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ 0681 /** 0682 * @} 0683 */ 0684 0685 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable 0686 * @ingroup RTEMSBSPsARMSTM32H7 0687 * @{ 0688 */ 0689 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ 0690 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ 0691 /** 0692 * @} 0693 */ 0694 0695 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register 0696 * @ingroup RTEMSBSPsARMSTM32H7 0697 * @{ 0698 */ 0699 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ 0700 /** 0701 * @} 0702 */ 0703 0704 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection 0705 * @ingroup RTEMSBSPsARMSTM32H7 0706 * @{ 0707 */ 0708 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 0709 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ 0710 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register 0711 not empty or RXFIFO is not empty */ 0712 /** 0713 * @} 0714 */ 0715 0716 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity 0717 * @ingroup RTEMSBSPsARMSTM32H7 0718 * @{ 0719 */ 0720 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ 0721 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ 0722 /** 0723 * @} 0724 */ 0725 0726 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register 0727 * @ingroup RTEMSBSPsARMSTM32H7 0728 * @{ 0729 */ 0730 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB 0731 position in CR1 register */ 0732 /** 0733 * @} 0734 */ 0735 0736 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register 0737 * @ingroup RTEMSBSPsARMSTM32H7 0738 * @{ 0739 */ 0740 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB 0741 position in CR1 register */ 0742 /** 0743 * @} 0744 */ 0745 0746 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask 0747 * @ingroup RTEMSBSPsARMSTM32H7 0748 * @{ 0749 */ 0750 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ 0751 /** 0752 * @} 0753 */ 0754 0755 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value 0756 * @ingroup RTEMSBSPsARMSTM32H7 0757 * @{ 0758 */ 0759 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ 0760 /** 0761 * @} 0762 */ 0763 0764 /** @defgroup UART_Flags UART Status Flags 0765 * @ingroup RTEMSBSPsARMSTM32H7 0766 * Elements values convention: 0xXXXX 0767 * - 0xXXXX : Flag mask in the ISR register 0768 * @{ 0769 */ 0770 #define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */ 0771 #define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */ 0772 #define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */ 0773 #define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */ 0774 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ 0775 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ 0776 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ 0777 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ 0778 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ 0779 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ 0780 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ 0781 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ 0782 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ 0783 #define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */ 0784 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ 0785 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ 0786 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ 0787 #define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */ 0788 #define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */ 0789 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ 0790 #define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */ 0791 #define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */ 0792 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ 0793 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ 0794 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ 0795 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ 0796 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ 0797 /** 0798 * @} 0799 */ 0800 0801 /** @defgroup UART_Interrupt_definition UART Interrupts Definition 0802 * @ingroup RTEMSBSPsARMSTM32H7 0803 * Elements values convention: 000ZZZZZ0XXYYYYYb 0804 * - YYYYY : Interrupt source position in the XX register (5bits) 0805 * - XX : Interrupt source register (2bits) 0806 * - 01: CR1 register 0807 * - 10: CR2 register 0808 * - 11: CR3 register 0809 * - ZZZZZ : Flag position in the ISR register(5bits) 0810 * Elements values convention: 000000000XXYYYYYb 0811 * - YYYYY : Interrupt source position in the XX register (5bits) 0812 * - XX : Interrupt source register (2bits) 0813 * - 01: CR1 register 0814 * - 10: CR2 register 0815 * - 11: CR3 register 0816 * Elements values convention: 0000ZZZZ00000000b 0817 * - ZZZZ : Flag position in the ISR register(4bits) 0818 * @{ 0819 */ 0820 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */ 0821 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ 0822 #define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */ 0823 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ 0824 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ 0825 #define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */ 0826 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ 0827 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ 0828 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ 0829 #define UART_IT_CM 0x112EU /*!< UART character match interruption */ 0830 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ 0831 #define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */ 0832 #define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */ 0833 #define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */ 0834 #define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */ 0835 #define UART_IT_RTO 0x0B3AU /*!< UART receiver timeout interruption */ 0836 0837 #define UART_IT_ERR 0x0060U /*!< UART error interruption */ 0838 0839 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ 0840 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */ 0841 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */ 0842 /** 0843 * @} 0844 */ 0845 0846 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags 0847 * @ingroup RTEMSBSPsARMSTM32H7 0848 * @{ 0849 */ 0850 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 0851 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 0852 #define UART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */ 0853 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ 0854 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 0855 #define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */ 0856 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 0857 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ 0858 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ 0859 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ 0860 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ 0861 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< UART receiver timeout clear flag */ 0862 /** 0863 * @} 0864 */ 0865 0866 /** @defgroup UART_Reception_Type_Values UART Reception type values 0867 * @ingroup RTEMSBSPsARMSTM32H7 0868 * @{ 0869 */ 0870 #define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */ 0871 #define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */ 0872 #define HAL_UART_RECEPTION_TORTO (0x00000002U) /*!< Reception till completion or RTO event */ 0873 #define HAL_UART_RECEPTION_TOCHARMATCH (0x00000003U) /*!< Reception till completion or CM event */ 0874 /** 0875 * @} 0876 */ 0877 0878 /** @defgroup UART_RxEvent_Type_Values UART RxEvent type values 0879 * @ingroup RTEMSBSPsARMSTM32H7 0880 * @{ 0881 */ 0882 #define HAL_UART_RXEVENT_TC (0x00000000U) /*!< RxEvent linked to Transfer Complete event */ 0883 #define HAL_UART_RXEVENT_HT (0x00000001U) /*!< RxEvent linked to Half Transfer event */ 0884 #define HAL_UART_RXEVENT_IDLE (0x00000002U) /*!< RxEvent linked to IDLE event */ 0885 /** 0886 * @} 0887 */ 0888 0889 /** 0890 * @} 0891 */ 0892 0893 /* Exported macros -----------------------------------------------------------*/ 0894 /** @defgroup UART_Exported_Macros UART Exported Macros 0895 * @ingroup RTEMSBSPsARMSTM32H7 0896 * @{ 0897 */ 0898 0899 /** @brief Reset UART handle states. 0900 * @param __HANDLE__ UART handle. 0901 * @retval None 0902 */ 0903 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 0904 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 0905 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 0906 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 0907 (__HANDLE__)->MspInitCallback = NULL; \ 0908 (__HANDLE__)->MspDeInitCallback = NULL; \ 0909 } while(0U) 0910 #else 0911 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 0912 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 0913 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 0914 } while(0U) 0915 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ 0916 0917 /** @brief Flush the UART Data registers. 0918 * @param __HANDLE__ specifies the UART Handle. 0919 * @retval None 0920 */ 0921 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ 0922 do{ \ 0923 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ 0924 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ 0925 } while(0U) 0926 0927 /** @brief Clear the specified UART pending flag. 0928 * @param __HANDLE__ specifies the UART Handle. 0929 * @param __FLAG__ specifies the flag to check. 0930 * This parameter can be any combination of the following values: 0931 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 0932 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 0933 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 0934 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 0935 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 0936 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag 0937 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 0938 * @arg @ref UART_CLEAR_RTOF Receiver Timeout clear flag 0939 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 0940 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 0941 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 0942 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 0943 * @retval None 0944 */ 0945 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 0946 0947 /** @brief Clear the UART PE pending flag. 0948 * @param __HANDLE__ specifies the UART Handle. 0949 * @retval None 0950 */ 0951 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) 0952 0953 /** @brief Clear the UART FE pending flag. 0954 * @param __HANDLE__ specifies the UART Handle. 0955 * @retval None 0956 */ 0957 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) 0958 0959 /** @brief Clear the UART NE pending flag. 0960 * @param __HANDLE__ specifies the UART Handle. 0961 * @retval None 0962 */ 0963 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) 0964 0965 /** @brief Clear the UART ORE pending flag. 0966 * @param __HANDLE__ specifies the UART Handle. 0967 * @retval None 0968 */ 0969 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) 0970 0971 /** @brief Clear the UART IDLE pending flag. 0972 * @param __HANDLE__ specifies the UART Handle. 0973 * @retval None 0974 */ 0975 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) 0976 0977 /** @brief Clear the UART TX FIFO empty clear flag. 0978 * @param __HANDLE__ specifies the UART Handle. 0979 * @retval None 0980 */ 0981 #define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF) 0982 0983 /** @brief Check whether the specified UART flag is set or not. 0984 * @param __HANDLE__ specifies the UART Handle. 0985 * @param __FLAG__ specifies the flag to check. 0986 * This parameter can be one of the following values: 0987 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag 0988 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag 0989 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag 0990 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag 0991 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag 0992 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag 0993 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag 0994 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) 0995 * @arg @ref UART_FLAG_SBKF Send Break flag 0996 * @arg @ref UART_FLAG_CMF Character match flag 0997 * @arg @ref UART_FLAG_BUSY Busy flag 0998 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag 0999 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag 1000 * @arg @ref UART_FLAG_CTS CTS Change flag 1001 * @arg @ref UART_FLAG_LBDF LIN Break detection flag 1002 * @arg @ref UART_FLAG_TXE Transmit data register empty flag 1003 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag 1004 * @arg @ref UART_FLAG_TC Transmission Complete flag 1005 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag 1006 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag 1007 * @arg @ref UART_FLAG_RTOF Receiver Timeout flag 1008 * @arg @ref UART_FLAG_IDLE Idle Line detection flag 1009 * @arg @ref UART_FLAG_ORE Overrun Error flag 1010 * @arg @ref UART_FLAG_NE Noise Error flag 1011 * @arg @ref UART_FLAG_FE Framing Error flag 1012 * @arg @ref UART_FLAG_PE Parity Error flag 1013 * @retval The new state of __FLAG__ (TRUE or FALSE). 1014 */ 1015 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 1016 1017 /** @brief Enable the specified UART interrupt. 1018 * @param __HANDLE__ specifies the UART Handle. 1019 * @param __INTERRUPT__ specifies the UART interrupt source to enable. 1020 * This parameter can be one of the following values: 1021 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1022 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1023 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1024 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1025 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1026 * @arg @ref UART_IT_CM Character match interrupt 1027 * @arg @ref UART_IT_CTS CTS change interrupt 1028 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1029 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1030 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1031 * @arg @ref UART_IT_TC Transmission complete interrupt 1032 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1033 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1034 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1035 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1036 * @arg @ref UART_IT_PE Parity Error interrupt 1037 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error) 1038 * @retval None 1039 */ 1040 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (\ 1041 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 1042 ((__HANDLE__)->Instance->CR1 |= (1U <<\ 1043 ((__INTERRUPT__) & UART_IT_MASK))): \ 1044 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 1045 ((__HANDLE__)->Instance->CR2 |= (1U <<\ 1046 ((__INTERRUPT__) & UART_IT_MASK))): \ 1047 ((__HANDLE__)->Instance->CR3 |= (1U <<\ 1048 ((__INTERRUPT__) & UART_IT_MASK)))) 1049 1050 /** @brief Disable the specified UART interrupt. 1051 * @param __HANDLE__ specifies the UART Handle. 1052 * @param __INTERRUPT__ specifies the UART interrupt source to disable. 1053 * This parameter can be one of the following values: 1054 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1055 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1056 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1057 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1058 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1059 * @arg @ref UART_IT_CM Character match interrupt 1060 * @arg @ref UART_IT_CTS CTS change interrupt 1061 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1062 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1063 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1064 * @arg @ref UART_IT_TC Transmission complete interrupt 1065 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1066 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1067 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1068 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1069 * @arg @ref UART_IT_PE Parity Error interrupt 1070 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1071 * @retval None 1072 */ 1073 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (\ 1074 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 1075 ((__HANDLE__)->Instance->CR1 &= ~ (1U <<\ 1076 ((__INTERRUPT__) & UART_IT_MASK))): \ 1077 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 1078 ((__HANDLE__)->Instance->CR2 &= ~ (1U <<\ 1079 ((__INTERRUPT__) & UART_IT_MASK))): \ 1080 ((__HANDLE__)->Instance->CR3 &= ~ (1U <<\ 1081 ((__INTERRUPT__) & UART_IT_MASK)))) 1082 1083 /** @brief Check whether the specified UART interrupt has occurred or not. 1084 * @param __HANDLE__ specifies the UART Handle. 1085 * @param __INTERRUPT__ specifies the UART interrupt to check. 1086 * This parameter can be one of the following values: 1087 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1088 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1089 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1090 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1091 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1092 * @arg @ref UART_IT_CM Character match interrupt 1093 * @arg @ref UART_IT_CTS CTS change interrupt 1094 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1095 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1096 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1097 * @arg @ref UART_IT_TC Transmission complete interrupt 1098 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1099 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1100 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1101 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1102 * @arg @ref UART_IT_PE Parity Error interrupt 1103 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1104 * @retval The new state of __INTERRUPT__ (SET or RESET). 1105 */ 1106 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\ 1107 & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) 1108 1109 /** @brief Check whether the specified UART interrupt source is enabled or not. 1110 * @param __HANDLE__ specifies the UART Handle. 1111 * @param __INTERRUPT__ specifies the UART interrupt source to check. 1112 * This parameter can be one of the following values: 1113 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1114 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1115 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1116 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1117 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1118 * @arg @ref UART_IT_CM Character match interrupt 1119 * @arg @ref UART_IT_CTS CTS change interrupt 1120 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1121 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1122 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1123 * @arg @ref UART_IT_TC Transmission complete interrupt 1124 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1125 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1126 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1127 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1128 * @arg @ref UART_IT_PE Parity Error interrupt 1129 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1130 * @retval The new state of __INTERRUPT__ (SET or RESET). 1131 */ 1132 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ?\ 1133 (__HANDLE__)->Instance->CR1 : \ 1134 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ?\ 1135 (__HANDLE__)->Instance->CR2 : \ 1136 (__HANDLE__)->Instance->CR3)) & (1U <<\ 1137 (((uint16_t)(__INTERRUPT__)) &\ 1138 UART_IT_MASK))) != RESET) ? SET : RESET) 1139 1140 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. 1141 * @param __HANDLE__ specifies the UART Handle. 1142 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 1143 * to clear the corresponding interrupt 1144 * This parameter can be one of the following values: 1145 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 1146 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 1147 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 1148 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 1149 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 1150 * @arg @ref UART_CLEAR_RTOF Receiver timeout clear flag 1151 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag 1152 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 1153 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 1154 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 1155 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 1156 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 1157 * @retval None 1158 */ 1159 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 1160 1161 /** @brief Set a specific UART request flag. 1162 * @param __HANDLE__ specifies the UART Handle. 1163 * @param __REQ__ specifies the request flag to set 1164 * This parameter can be one of the following values: 1165 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request 1166 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request 1167 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request 1168 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request 1169 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request 1170 * @retval None 1171 */ 1172 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) 1173 1174 /** @brief Enable the UART one bit sample method. 1175 * @param __HANDLE__ specifies the UART Handle. 1176 * @retval None 1177 */ 1178 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 1179 1180 /** @brief Disable the UART one bit sample method. 1181 * @param __HANDLE__ specifies the UART Handle. 1182 * @retval None 1183 */ 1184 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) 1185 1186 /** @brief Enable UART. 1187 * @param __HANDLE__ specifies the UART Handle. 1188 * @retval None 1189 */ 1190 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 1191 1192 /** @brief Disable UART. 1193 * @param __HANDLE__ specifies the UART Handle. 1194 * @retval None 1195 */ 1196 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 1197 1198 /** @brief Enable CTS flow control. 1199 * @note This macro allows to enable CTS hardware flow control for a given UART instance, 1200 * without need to call HAL_UART_Init() function. 1201 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1202 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1203 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1204 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1205 * - macro could only be called when corresponding UART instance is disabled 1206 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1207 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1208 * @param __HANDLE__ specifies the UART Handle. 1209 * @retval None 1210 */ 1211 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ 1212 do{ \ 1213 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1214 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ 1215 } while(0U) 1216 1217 /** @brief Disable CTS flow control. 1218 * @note This macro allows to disable CTS hardware flow control for a given UART instance, 1219 * without need to call HAL_UART_Init() function. 1220 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1221 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1222 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1223 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1224 * - macro could only be called when corresponding UART instance is disabled 1225 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1226 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1227 * @param __HANDLE__ specifies the UART Handle. 1228 * @retval None 1229 */ 1230 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ 1231 do{ \ 1232 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1233 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ 1234 } while(0U) 1235 1236 /** @brief Enable RTS flow control. 1237 * @note This macro allows to enable RTS hardware flow control for a given UART instance, 1238 * without need to call HAL_UART_Init() function. 1239 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1240 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1241 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1242 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1243 * - macro could only be called when corresponding UART instance is disabled 1244 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1245 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1246 * @param __HANDLE__ specifies the UART Handle. 1247 * @retval None 1248 */ 1249 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ 1250 do{ \ 1251 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ 1252 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ 1253 } while(0U) 1254 1255 /** @brief Disable RTS flow control. 1256 * @note This macro allows to disable RTS hardware flow control for a given UART instance, 1257 * without need to call HAL_UART_Init() function. 1258 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1259 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1260 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1261 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1262 * - macro could only be called when corresponding UART instance is disabled 1263 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1264 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1265 * @param __HANDLE__ specifies the UART Handle. 1266 * @retval None 1267 */ 1268 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ 1269 do{ \ 1270 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ 1271 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ 1272 } while(0U) 1273 /** 1274 * @} 1275 */ 1276 1277 /* Private macros --------------------------------------------------------*/ 1278 /** @defgroup UART_Private_Macros UART Private Macros 1279 * @ingroup RTEMSBSPsARMSTM32H7 1280 * @{ 1281 */ 1282 /** @brief Get UART clok division factor from clock prescaler value. 1283 * @param __CLOCKPRESCALER__ UART prescaler value. 1284 * @retval UART clock division factor 1285 */ 1286 #define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \ 1287 (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \ 1288 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \ 1289 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \ 1290 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \ 1291 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \ 1292 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \ 1293 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \ 1294 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \ 1295 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \ 1296 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \ 1297 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : \ 1298 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256) ? 256U : 1U) 1299 1300 /** @brief BRR division operation to set BRR register with LPUART. 1301 * @param __PCLK__ LPUART clock. 1302 * @param __BAUD__ Baud rate set by the user. 1303 * @param __CLOCKPRESCALER__ UART prescaler value. 1304 * @retval Division result 1305 */ 1306 #define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1307 ((uint32_t)((((((uint64_t)(__PCLK__))/(UARTPrescTable[(__CLOCKPRESCALER__)]))*256U)+ \ 1308 (uint32_t)((__BAUD__)/2U)) / (__BAUD__)) \ 1309 ) 1310 1311 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1312 * @param __PCLK__ UART clock. 1313 * @param __BAUD__ Baud rate set by the user. 1314 * @param __CLOCKPRESCALER__ UART prescaler value. 1315 * @retval Division result 1316 */ 1317 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1318 (((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 1319 1320 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1321 * @param __PCLK__ UART clock. 1322 * @param __BAUD__ Baud rate set by the user. 1323 * @param __CLOCKPRESCALER__ UART prescaler value. 1324 * @retval Division result 1325 */ 1326 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1327 ((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)]) + ((__BAUD__)/2U)) / (__BAUD__)) 1328 1329 /** @brief Check whether or not UART instance is Low Power UART. 1330 * @param __HANDLE__ specifies the UART Handle. 1331 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART) 1332 */ 1333 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance)) 1334 1335 /** @brief Check UART Baud rate. 1336 * @param __BAUDRATE__ Baudrate specified by the user. 1337 * The maximum Baud Rate is derived from the maximum clock on H7 (i.e. 100 MHz) 1338 * divided by the smallest oversampling used on the USART (i.e. 8) 1339 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) 1340 */ 1341 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 12500001U) 1342 1343 /** @brief Check UART assertion time. 1344 * @param __TIME__ 5-bit value assertion time. 1345 * @retval Test result (TRUE or FALSE). 1346 */ 1347 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1348 1349 /** @brief Check UART deassertion time. 1350 * @param __TIME__ 5-bit value deassertion time. 1351 * @retval Test result (TRUE or FALSE). 1352 */ 1353 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1354 1355 /** 1356 * @brief Ensure that UART frame number of stop bits is valid. 1357 * @param __STOPBITS__ UART frame number of stop bits. 1358 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1359 */ 1360 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ 1361 ((__STOPBITS__) == UART_STOPBITS_1) || \ 1362 ((__STOPBITS__) == UART_STOPBITS_1_5) || \ 1363 ((__STOPBITS__) == UART_STOPBITS_2)) 1364 1365 /** 1366 * @brief Ensure that LPUART frame number of stop bits is valid. 1367 * @param __STOPBITS__ LPUART frame number of stop bits. 1368 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1369 */ 1370 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \ 1371 ((__STOPBITS__) == UART_STOPBITS_2)) 1372 1373 /** 1374 * @brief Ensure that UART frame parity is valid. 1375 * @param __PARITY__ UART frame parity. 1376 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 1377 */ 1378 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ 1379 ((__PARITY__) == UART_PARITY_EVEN) || \ 1380 ((__PARITY__) == UART_PARITY_ODD)) 1381 1382 /** 1383 * @brief Ensure that UART hardware flow control is valid. 1384 * @param __CONTROL__ UART hardware flow control. 1385 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) 1386 */ 1387 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ 1388 (((__CONTROL__) == UART_HWCONTROL_NONE) || \ 1389 ((__CONTROL__) == UART_HWCONTROL_RTS) || \ 1390 ((__CONTROL__) == UART_HWCONTROL_CTS) || \ 1391 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) 1392 1393 /** 1394 * @brief Ensure that UART communication mode is valid. 1395 * @param __MODE__ UART communication mode. 1396 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1397 */ 1398 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) 1399 1400 /** 1401 * @brief Ensure that UART state is valid. 1402 * @param __STATE__ UART state. 1403 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 1404 */ 1405 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ 1406 ((__STATE__) == UART_STATE_ENABLE)) 1407 1408 /** 1409 * @brief Ensure that UART oversampling is valid. 1410 * @param __SAMPLING__ UART oversampling. 1411 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) 1412 */ 1413 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ 1414 ((__SAMPLING__) == UART_OVERSAMPLING_8)) 1415 1416 /** 1417 * @brief Ensure that UART frame sampling is valid. 1418 * @param __ONEBIT__ UART frame sampling. 1419 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) 1420 */ 1421 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ 1422 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) 1423 1424 /** 1425 * @brief Ensure that UART auto Baud rate detection mode is valid. 1426 * @param __MODE__ UART auto Baud rate detection mode. 1427 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1428 */ 1429 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ 1430 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ 1431 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ 1432 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) 1433 1434 /** 1435 * @brief Ensure that UART receiver timeout setting is valid. 1436 * @param __TIMEOUT__ UART receiver timeout setting. 1437 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) 1438 */ 1439 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ 1440 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) 1441 1442 /** @brief Check the receiver timeout value. 1443 * @note The maximum UART receiver timeout value is 0xFFFFFF. 1444 * @param __TIMEOUTVALUE__ receiver timeout value. 1445 * @retval Test result (TRUE or FALSE) 1446 */ 1447 #define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFFU) 1448 1449 /** 1450 * @brief Ensure that UART LIN state is valid. 1451 * @param __LIN__ UART LIN state. 1452 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) 1453 */ 1454 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ 1455 ((__LIN__) == UART_LIN_ENABLE)) 1456 1457 /** 1458 * @brief Ensure that UART LIN break detection length is valid. 1459 * @param __LENGTH__ UART LIN break detection length. 1460 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 1461 */ 1462 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ 1463 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) 1464 1465 /** 1466 * @brief Ensure that UART DMA TX state is valid. 1467 * @param __DMATX__ UART DMA TX state. 1468 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) 1469 */ 1470 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ 1471 ((__DMATX__) == UART_DMA_TX_ENABLE)) 1472 1473 /** 1474 * @brief Ensure that UART DMA RX state is valid. 1475 * @param __DMARX__ UART DMA RX state. 1476 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) 1477 */ 1478 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ 1479 ((__DMARX__) == UART_DMA_RX_ENABLE)) 1480 1481 /** 1482 * @brief Ensure that UART half-duplex state is valid. 1483 * @param __HDSEL__ UART half-duplex state. 1484 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) 1485 */ 1486 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ 1487 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) 1488 1489 /** 1490 * @brief Ensure that UART wake-up method is valid. 1491 * @param __WAKEUP__ UART wake-up method . 1492 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) 1493 */ 1494 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ 1495 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) 1496 1497 /** 1498 * @brief Ensure that UART request parameter is valid. 1499 * @param __PARAM__ UART request parameter. 1500 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 1501 */ 1502 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ 1503 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ 1504 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ 1505 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ 1506 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) 1507 1508 /** 1509 * @brief Ensure that UART advanced features initialization is valid. 1510 * @param __INIT__ UART advanced features initialization. 1511 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) 1512 */ 1513 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1514 UART_ADVFEATURE_TXINVERT_INIT | \ 1515 UART_ADVFEATURE_RXINVERT_INIT | \ 1516 UART_ADVFEATURE_DATAINVERT_INIT | \ 1517 UART_ADVFEATURE_SWAP_INIT | \ 1518 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1519 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ 1520 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1521 UART_ADVFEATURE_MSBFIRST_INIT)) 1522 1523 /** 1524 * @brief Ensure that UART frame TX inversion setting is valid. 1525 * @param __TXINV__ UART frame TX inversion setting. 1526 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) 1527 */ 1528 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ 1529 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) 1530 1531 /** 1532 * @brief Ensure that UART frame RX inversion setting is valid. 1533 * @param __RXINV__ UART frame RX inversion setting. 1534 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) 1535 */ 1536 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ 1537 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) 1538 1539 /** 1540 * @brief Ensure that UART frame data inversion setting is valid. 1541 * @param __DATAINV__ UART frame data inversion setting. 1542 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) 1543 */ 1544 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ 1545 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) 1546 1547 /** 1548 * @brief Ensure that UART frame RX/TX pins swap setting is valid. 1549 * @param __SWAP__ UART frame RX/TX pins swap setting. 1550 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) 1551 */ 1552 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ 1553 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) 1554 1555 /** 1556 * @brief Ensure that UART frame overrun setting is valid. 1557 * @param __OVERRUN__ UART frame overrun setting. 1558 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) 1559 */ 1560 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ 1561 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) 1562 1563 /** 1564 * @brief Ensure that UART auto Baud rate state is valid. 1565 * @param __AUTOBAUDRATE__ UART auto Baud rate state. 1566 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) 1567 */ 1568 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == \ 1569 UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ 1570 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) 1571 1572 /** 1573 * @brief Ensure that UART DMA enabling or disabling on error setting is valid. 1574 * @param __DMA__ UART DMA enabling or disabling on error setting. 1575 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) 1576 */ 1577 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ 1578 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) 1579 1580 /** 1581 * @brief Ensure that UART frame MSB first setting is valid. 1582 * @param __MSBFIRST__ UART frame MSB first setting. 1583 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) 1584 */ 1585 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ 1586 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) 1587 1588 /** 1589 * @brief Ensure that UART stop mode state is valid. 1590 * @param __STOPMODE__ UART stop mode state. 1591 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) 1592 */ 1593 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ 1594 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) 1595 1596 /** 1597 * @brief Ensure that UART mute mode state is valid. 1598 * @param __MUTE__ UART mute mode state. 1599 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) 1600 */ 1601 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ 1602 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) 1603 1604 /** 1605 * @brief Ensure that UART wake-up selection is valid. 1606 * @param __WAKE__ UART wake-up selection. 1607 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) 1608 */ 1609 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 1610 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ 1611 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 1612 1613 /** 1614 * @brief Ensure that UART driver enable polarity is valid. 1615 * @param __POLARITY__ UART driver enable polarity. 1616 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 1617 */ 1618 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ 1619 ((__POLARITY__) == UART_DE_POLARITY_LOW)) 1620 1621 /** 1622 * @brief Ensure that UART Prescaler is valid. 1623 * @param __CLOCKPRESCALER__ UART Prescaler value. 1624 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid) 1625 */ 1626 #define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \ 1627 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \ 1628 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \ 1629 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \ 1630 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \ 1631 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \ 1632 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \ 1633 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \ 1634 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \ 1635 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \ 1636 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \ 1637 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256)) 1638 1639 /** 1640 * @} 1641 */ 1642 1643 /* Include UART HAL Extended module */ 1644 #include "stm32h7xx_hal_uart_ex.h" 1645 1646 /* Exported functions --------------------------------------------------------*/ 1647 /** @addtogroup UART_Exported_Functions UART Exported Functions 1648 * @{ 1649 */ 1650 1651 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions 1652 * @{ 1653 */ 1654 1655 /* Initialization and de-initialization functions ****************************/ 1656 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); 1657 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); 1658 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); 1659 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); 1660 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); 1661 void HAL_UART_MspInit(UART_HandleTypeDef *huart); 1662 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); 1663 1664 /* Callbacks Register/UnRegister functions ***********************************/ 1665 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1666 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, 1667 pUART_CallbackTypeDef pCallback); 1668 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); 1669 1670 HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback); 1671 HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); 1672 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1673 1674 /** 1675 * @} 1676 */ 1677 1678 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions 1679 * @{ 1680 */ 1681 1682 /* IO operation functions *****************************************************/ 1683 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout); 1684 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1685 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1686 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1687 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1688 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1689 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); 1690 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); 1691 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); 1692 /* Transfer Abort functions */ 1693 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); 1694 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); 1695 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); 1696 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); 1697 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); 1698 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); 1699 1700 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); 1701 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); 1702 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); 1703 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); 1704 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); 1705 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); 1706 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); 1707 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); 1708 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); 1709 1710 void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size); 1711 1712 /** 1713 * @} 1714 */ 1715 1716 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions 1717 * @{ 1718 */ 1719 1720 /* Peripheral Control functions ************************************************/ 1721 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue); 1722 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart); 1723 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart); 1724 1725 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); 1726 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); 1727 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); 1728 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); 1729 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); 1730 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); 1731 1732 /** 1733 * @} 1734 */ 1735 1736 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions 1737 * @{ 1738 */ 1739 1740 /* Peripheral State and Errors functions **************************************************/ 1741 HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart); 1742 uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart); 1743 1744 /** 1745 * @} 1746 */ 1747 1748 /** 1749 * @} 1750 */ 1751 1752 /* Private functions -----------------------------------------------------------*/ 1753 /** @addtogroup UART_Private_Functions UART Private Functions 1754 * @{ 1755 */ 1756 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1757 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart); 1758 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1759 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); 1760 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); 1761 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, 1762 uint32_t Tickstart, uint32_t Timeout); 1763 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); 1764 HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1765 HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1766 1767 /** 1768 * @} 1769 */ 1770 1771 /* Private variables -----------------------------------------------------------*/ 1772 /** @defgroup UART_Private_variables UART Private variables 1773 * @ingroup RTEMSBSPsARMSTM32H7 1774 * @{ 1775 */ 1776 /* Prescaler Table used in BRR computation macros. 1777 Declared as extern here to allow use of private UART macros, outside of HAL UART functions */ 1778 extern const uint16_t UARTPrescTable[12]; 1779 /** 1780 * @} 1781 */ 1782 1783 /** 1784 * @} 1785 */ 1786 1787 /** 1788 * @} 1789 */ 1790 1791 #ifdef __cplusplus 1792 } 1793 #endif 1794 1795 #endif /* STM32H7xx_HAL_UART_H */ 1796
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