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File indexing completed on 2025-05-11 08:23:36 

0001 /**
0002   ******************************************************************************
0003   * @file    stm32h7xx_hal_tim_ex.h
0004   * @author  MCD Application Team
0005   * @brief   Header file of TIM HAL Extended module.
0006   ******************************************************************************
0007   * @attention
0008   *
0009   * Copyright (c) 2017 STMicroelectronics.
0010   * All rights reserved.
0011   *
0012   * This software is licensed under terms that can be found in the LICENSE file
0013   * in the root directory of this software component.
0014   * If no LICENSE file comes with this software, it is provided AS-IS.
0015   *
0016   ******************************************************************************
0017   */
0018 
0019 /* Define to prevent recursive inclusion -------------------------------------*/
0020 #ifndef STM32H7xx_HAL_TIM_EX_H
0021 #define STM32H7xx_HAL_TIM_EX_H
0022 
0023 #ifdef __cplusplus
0024 extern "C" {
0025 #endif
0026 
0027 /* Includes ------------------------------------------------------------------*/
0028 #include "stm32h7xx_hal_def.h"
0029 
0030 /** @addtogroup STM32H7xx_HAL_Driver
0031   * @{
0032   */
0033 
0034 /** @addtogroup TIMEx
0035   * @{
0036   */
0037 
0038 /* Exported types ------------------------------------------------------------*/
0039 /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types
0040   * @ingroup RTEMSBSPsARMSTM32H7
0041   * @{
0042   */
0043 
0044 /**
0045   * @brief  TIM Hall sensor Configuration Structure definition
0046   */
0047 
0048 typedef struct
0049 {
0050   uint32_t IC1Polarity;         /*!< Specifies the active edge of the input signal.
0051                                      This parameter can be a value of @ref TIM_Input_Capture_Polarity */
0052 
0053   uint32_t IC1Prescaler;        /*!< Specifies the Input Capture Prescaler.
0054                                      This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
0055 
0056   uint32_t IC1Filter;           /*!< Specifies the input capture filter.
0057                                      This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
0058 
0059   uint32_t Commutation_Delay;   /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
0060                                      This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
0061 } TIM_HallSensor_InitTypeDef;
0062 #if defined(TIM_BREAK_INPUT_SUPPORT)
0063 
0064 /**
0065   * @brief  TIM Break/Break2 input configuration
0066   */
0067 typedef struct
0068 {
0069   uint32_t Source;         /*!< Specifies the source of the timer break input.
0070                                 This parameter can be a value of @ref TIMEx_Break_Input_Source */
0071   uint32_t Enable;         /*!< Specifies whether or not the break input source is enabled.
0072                                 This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */
0073   uint32_t Polarity;       /*!< Specifies the break input source polarity.
0074                                 This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity
0075                                 Not relevant when analog watchdog output of the DFSDM1 used as break input source */
0076 } TIMEx_BreakInputConfigTypeDef;
0077 
0078 #endif /* TIM_BREAK_INPUT_SUPPORT */
0079 /**
0080   * @}
0081   */
0082 /* End of exported types -----------------------------------------------------*/
0083 
0084 /* Exported constants --------------------------------------------------------*/
0085 /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants
0086   * @ingroup RTEMSBSPsARMSTM32H7
0087   * @{
0088   */
0089 
0090 /** @defgroup TIMEx_Remap TIM Extended Remapping
0091   * @ingroup RTEMSBSPsARMSTM32H7
0092   * @{
0093   */
0094 #define TIM_TIM1_ETR_GPIO        0x00000000U                                                 /*!< TIM1_ETR is connected to GPIO */
0095 #define TIM_TIM1_ETR_COMP1       TIM1_AF1_ETRSEL_0                                           /*!< TIM1_ETR is connected to COMP1 OUT */
0096 #define TIM_TIM1_ETR_COMP2       TIM1_AF1_ETRSEL_1                                           /*!< TIM1_ETR is connected to COMP2 OUT */
0097 #define TIM_TIM1_ETR_ADC1_AWD1   (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0)                     /*!< TIM1_ETR is connected to ADC1 AWD1 */
0098 #define TIM_TIM1_ETR_ADC1_AWD2   (TIM1_AF1_ETRSEL_2)                                         /*!< TIM1_ETR is connected to ADC1 AWD2 */
0099 #define TIM_TIM1_ETR_ADC1_AWD3   (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0)                     /*!< TIM1_ETR is connected to ADC1 AWD3 */
0100 #define TIM_TIM1_ETR_ADC3_AWD1   (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1)                     /*!< TIM1_ETR is connected to ADC3 AWD1 */
0101 #define TIM_TIM1_ETR_ADC3_AWD2   (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< TIM1_ETR is connected to ADC3 AWD2 */
0102 #define TIM_TIM1_ETR_ADC3_AWD3   TIM1_AF1_ETRSEL_3                                           /*!< TIM1_ETR is connected to ADC3 AWD3 */
0103 
0104 #define TIM_TIM8_ETR_GPIO        0x00000000U                                                 /*!< TIM8_ETR is connected to GPIO */
0105 #define TIM_TIM8_ETR_COMP1       TIM8_AF1_ETRSEL_0                                           /*!< TIM8_ETR is connected to COMP1 OUT */
0106 #define TIM_TIM8_ETR_COMP2       TIM8_AF1_ETRSEL_1                                           /*!< TIM8_ETR is connected to COMP2 OUT */
0107 #define TIM_TIM8_ETR_ADC2_AWD1   (TIM8_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0)                     /*!< TIM8_ETR is connected to ADC2 AWD1 */
0108 #define TIM_TIM8_ETR_ADC2_AWD2   (TIM8_AF1_ETRSEL_2)                                         /*!< TIM8_ETR is connected to ADC2 AWD2 */
0109 #define TIM_TIM8_ETR_ADC2_AWD3   (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_0)                     /*!< TIM8_ETR is connected to ADC2 AWD3 */
0110 #define TIM_TIM8_ETR_ADC3_AWD1   (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_1)                     /*!< TIM8_ETR is connected to ADC3 AWD1 */
0111 #define TIM_TIM8_ETR_ADC3_AWD2   (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /*!< TIM8_ETR is connected to ADC3 AWD2 */
0112 #define TIM_TIM8_ETR_ADC3_AWD3   TIM8_AF1_ETRSEL_3                                           /*!< TIM8_ETR is connected to ADC3 AWD3 */
0113 
0114 #define TIM_TIM2_ETR_GPIO        0x00000000U                             /*!< TIM2_ETR is connected to GPIO */
0115 #define TIM_TIM2_ETR_COMP1       (TIM2_AF1_ETRSEL_0)                     /*!< TIM2_ETR is connected to COMP1 OUT */
0116 #define TIM_TIM2_ETR_COMP2       (TIM2_AF1_ETRSEL_1)                     /*!< TIM2_ETR is connected to COMP2 OUT */
0117 #define TIM_TIM2_ETR_RCC_LSE     (TIM2_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /*!< TIM2_ETR is connected to RCC LSE */
0118 #define TIM_TIM2_ETR_SAI1_FSA    TIM2_AF1_ETRSEL_2                       /*!< TIM2_ETR is connected to SAI1 FS_A */
0119 #define TIM_TIM2_ETR_SAI1_FSB    (TIM2_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_0) /*!< TIM2_ETR is connected to SAI1 FS_B */
0120 
0121 #define TIM_TIM3_ETR_GPIO        0x00000000U          /*!< TIM3_ETR is connected to GPIO */
0122 #define TIM_TIM3_ETR_COMP1       TIM3_AF1_ETRSEL_0    /*!< TIM3_ETR is connected to COMP1 OUT */
0123 
0124 #define TIM_TIM5_ETR_GPIO        0x00000000U          /*!< TIM5_ETR is connected to GPIO */
0125 #define TIM_TIM5_ETR_SAI2_FSA    TIM5_AF1_ETRSEL_0    /*!< TIM5_ETR is connected to SAI2 FS_A */
0126 #define TIM_TIM5_ETR_SAI2_FSB    TIM5_AF1_ETRSEL_1    /*!< TIM5_ETR is connected to SAI2 FS_B */
0127 #define TIM_TIM5_ETR_SAI4_FSA    TIM5_AF1_ETRSEL_0    /*!< TIM5_ETR is connected to SAI4 FS_A */
0128 #define TIM_TIM5_ETR_SAI4_FSB    TIM5_AF1_ETRSEL_1    /*!< TIM5_ETR is connected to SAI4 FS_B */
0129 
0130 #define TIM_TIM23_ETR_GPIO       0x00000000U          /*!< TIM23_ETR is connected to GPIO */
0131 #define TIM_TIM23_ETR_COMP1      (TIM2_AF1_ETRSEL_0)  /*!< TIM23_ETR is connected to COMP1 OUT */
0132 #define TIM_TIM23_ETR_COMP2      (TIM2_AF1_ETRSEL_1)  /*!< TIM23_ETR is connected to COMP2 OUT */
0133 
0134 #define TIM_TIM24_ETR_GPIO        0x00000000U                                /*!< TIM24_ETR is connected to GPIO */
0135 #define TIM_TIM24_ETR_SAI4_FSA    TIM5_AF1_ETRSEL_0                          /*!< TIM24_ETR is connected to SAI4 FS_A */
0136 #define TIM_TIM24_ETR_SAI4_FSB    TIM5_AF1_ETRSEL_1                          /*!< TIM24_ETR is connected to SAI4 FS_B */
0137 #define TIM_TIM24_ETR_SAI1_FSA    (TIM2_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0)    /*!< TIM24_ETR is connected to SAI1 FS_A */
0138 #define TIM_TIM24_ETR_SAI1_FSB    TIM2_AF1_ETRSEL_2                          /*!< TIM24_ETR is connected to SAI1 FS_B */
0139 /**
0140   * @}
0141   */
0142 #if defined(TIM_BREAK_INPUT_SUPPORT)
0143 
0144 /** @defgroup TIMEx_Break_Input TIM Extended Break input
0145   * @ingroup RTEMSBSPsARMSTM32H7
0146   * @{
0147   */
0148 #define TIM_BREAKINPUT_BRK     0x00000001U                                      /*!< Timer break input  */
0149 #define TIM_BREAKINPUT_BRK2    0x00000002U                                      /*!< Timer break2 input */
0150 /**
0151   * @}
0152   */
0153 
0154 /** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source
0155   * @ingroup RTEMSBSPsARMSTM32H7
0156   * @{
0157   */
0158 #define TIM_BREAKINPUTSOURCE_BKIN     0x00000001U                               /*!< An external source (GPIO) is connected to the BKIN pin  */
0159 #define TIM_BREAKINPUTSOURCE_COMP1    0x00000002U                               /*!< The COMP1 output is connected to the break input */
0160 #define TIM_BREAKINPUTSOURCE_COMP2    0x00000004U                               /*!< The COMP2 output is connected to the break input */
0161 #define TIM_BREAKINPUTSOURCE_DFSDM1   0x00000008U                               /*!< The analog watchdog output of the DFSDM1 peripheral is connected to the break input */
0162 /**
0163   * @}
0164   */
0165 
0166 /** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling
0167   * @ingroup RTEMSBSPsARMSTM32H7
0168   * @{
0169   */
0170 #define TIM_BREAKINPUTSOURCE_DISABLE     0x00000000U                            /*!< Break input source is disabled */
0171 #define TIM_BREAKINPUTSOURCE_ENABLE      0x00000001U                            /*!< Break input source is enabled */
0172 /**
0173   * @}
0174   */
0175 
0176 /** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity
0177   * @ingroup RTEMSBSPsARMSTM32H7
0178   * @{
0179   */
0180 #define TIM_BREAKINPUTSOURCE_POLARITY_LOW     0x00000001U                       /*!< Break input source is active low */
0181 #define TIM_BREAKINPUTSOURCE_POLARITY_HIGH    0x00000000U                       /*!< Break input source is active_high */
0182 /**
0183   * @}
0184   */
0185 #endif /* TIM_BREAK_INPUT_SUPPORT */
0186 
0187 /** @defgroup TIMEx_Timer_Input_Selection TIM Extended Timer input selection
0188   * @ingroup RTEMSBSPsARMSTM32H7
0189   * @{
0190   */
0191 #define TIM_TIM1_TI1_GPIO                          0x00000000U                               /*!< TIM1_TI1 is connected to GPIO */
0192 #define TIM_TIM1_TI1_COMP1                         TIM_TISEL_TI1SEL_0                        /*!< TIM1_TI1 is connected to COMP1 OUT */
0193 
0194 #define TIM_TIM8_TI1_GPIO                          0x00000000U                               /*!< TIM8_TI1 is connected to GPIO */
0195 #define TIM_TIM8_TI1_COMP2                         TIM_TISEL_TI1SEL_0                        /*!< TIM8_TI1 is connected to COMP2 OUT */
0196 
0197 #define TIM_TIM2_TI4_GPIO                          0x00000000U                               /*!< TIM2_TI4 is connected to GPIO */
0198 #define TIM_TIM2_TI4_COMP1                         TIM_TISEL_TI4SEL_0                        /*!< TIM2_TI4 is connected to COMP1 OUT */
0199 #define TIM_TIM2_TI4_COMP2                         TIM_TISEL_TI4SEL_1                        /*!< TIM2_TI4 is connected to COMP2 OUT */
0200 #define TIM_TIM2_TI4_COMP1_COMP2                   (TIM_TISEL_TI4SEL_0 | TIM_TISEL_TI4SEL_1) /*!< TIM2_TI4 is connected to COMP2 OUT OR COMP2 OUT */
0201 
0202 #define TIM_TIM3_TI1_GPIO                          0x00000000U                               /*!< TIM3_TI1 is connected to GPIO */
0203 #define TIM_TIM3_TI1_COMP1                         TIM_TISEL_TI1SEL_0                        /*!< TIM3_TI1 is connected to COMP1 OUT */
0204 #define TIM_TIM3_TI1_COMP2                         TIM_TISEL_TI1SEL_1                        /*!< TIM3_TI1 is connected to COMP2 OUT */
0205 #define TIM_TIM3_TI1_COMP1_COMP2                   (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /*!< TIM3_TI1 is connected to COMP1 OUT or COMP2 OUT */
0206 
0207 #define TIM_TIM5_TI1_GPIO                          0x00000000U                               /*!< TIM5_TI1 is connected to GPIO */
0208 #define TIM_TIM5_TI1_CAN_TMP                       TIM_TISEL_TI1SEL_0                        /*!< TIM5_TI1 is connected to CAN TMP */
0209 #define TIM_TIM5_TI1_CAN_RTP                       TIM_TISEL_TI1SEL_1                        /*!< TIM5_TI1 is connected to CAN RTP */
0210 
0211 #define TIM_TIM12_TI1_GPIO                         0x00000000U                               /*!< TIM12 TI1 is connected to GPIO */
0212 #define TIM_TIM12_TI1_SPDIF_FS                     TIM_TISEL_TI1SEL_0                        /*!< TIM12 TI1 is connected to SPDIF FS */
0213 
0214 #define TIM_TIM15_TI1_GPIO                         0x00000000U                               /*!< TIM15_TI1 is connected to GPIO */
0215 #define TIM_TIM15_TI1_TIM2_CH1                     TIM_TISEL_TI1SEL_0                        /*!< TIM15_TI1 is connected to TIM2 CH1 */
0216 #define TIM_TIM15_TI1_TIM3_CH1                     TIM_TISEL_TI1SEL_1                        /*!< TIM15_TI1 is connected to TIM3 CH1 */
0217 #define TIM_TIM15_TI1_TIM4_CH1                     (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /*!< TIM15_TI1 is connected to TIM4 CH1 */
0218 #define TIM_TIM15_TI1_RCC_LSE                      (TIM_TISEL_TI1SEL_2)                      /*!< TIM15_TI1 is connected to RCC LSE  */
0219 #define TIM_TIM15_TI1_RCC_CSI                      (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0) /*!< TIM15_TI1 is connected to RCC CSI  */
0220 #define TIM_TIM15_TI1_RCC_MCO2                     (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1) /*!< TIM15_TI1 is connected to RCC MCO2 */
0221 
0222 #define TIM_TIM15_TI2_GPIO                         0x00000000U                               /*!< TIM15_TI2 is connected to GPIO */
0223 #define TIM_TIM15_TI2_TIM2_CH2                     (TIM_TISEL_TI2SEL_0)                      /*!< TIM15_TI2 is connected to TIM2 CH2 */
0224 #define TIM_TIM15_TI2_TIM3_CH2                     (TIM_TISEL_TI2SEL_1)                      /*!< TIM15_TI2 is connected to TIM3 CH2 */
0225 #define TIM_TIM15_TI2_TIM4_CH2                     (TIM_TISEL_TI2SEL_0 | TIM_TISEL_TI2SEL_1) /*!< TIM15_TI2 is connected to TIM4 CH2 */
0226 
0227 #define TIM_TIM16_TI1_GPIO                         0x00000000U                               /*!< TIM16 TI1 is connected to GPIO */
0228 #define TIM_TIM16_TI1_RCC_LSI                      TIM_TISEL_TI1SEL_0                        /*!< TIM16 TI1 is connected to RCC LSI */
0229 #define TIM_TIM16_TI1_RCC_LSE                      TIM_TISEL_TI1SEL_1                        /*!< TIM16 TI1 is connected to RCC LSE */
0230 #define TIM_TIM16_TI1_WKUP_IT                      (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /*!< TIM16 TI1 is connected to WKUP_IT */
0231 
0232 #define TIM_TIM17_TI1_GPIO                         0x00000000U                               /*!< TIM17 TI1 is connected to GPIO */
0233 #define TIM_TIM17_TI1_SPDIF_FS                     TIM_TISEL_TI1SEL_0                        /*!< TIM17 TI1 is connected to SPDIF FS */
0234 #define TIM_TIM17_TI1_RCC_HSE1MHZ                  TIM_TISEL_TI1SEL_1                        /*!< TIM17 TI1 is connected to RCC HSE 1Mhz */
0235 #define TIM_TIM17_TI1_RCC_MCO1                     (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /*!< TIM17 TI1 is connected to RCC MCO1 */
0236 
0237 #define TIM_TIM23_TI4_GPIO                         0x00000000U                               /*!< TIM23_TI4 is connected to GPIO */
0238 #define TIM_TIM23_TI4_COMP1                        TIM_TISEL_TI4SEL_0                        /*!< TIM23_TI4 is connected to COMP1 OUT */
0239 #define TIM_TIM23_TI4_COMP2                        TIM_TISEL_TI4SEL_1                        /*!< TIM23_TI4 is connected to COMP2 OUT */
0240 #define TIM_TIM23_TI4_COMP1_COMP2                  (TIM_TISEL_TI4SEL_0 | TIM_TISEL_TI4SEL_1) /*!< TIM23_TI4 is connected to COMP1 OUT or COMP2 OUT */
0241 
0242 #define TIM_TIM24_TI1_GPIO                         0x00000000U                               /*!< TIM24_TI1 is connected to GPIO */
0243 #define TIM_TIM24_TI1_CAN_TMP                      TIM_TISEL_TI1SEL_0                        /*!< TIM24_TI1 is connected to CAN TMP  */
0244 #define TIM_TIM24_TI1_CAN_RTP                      TIM_TISEL_TI1SEL_1                        /*!< TIM24_TI1 is connected to CAN RTP  */
0245 #define TIM_TIM24_TI1_CAN_SOC                      (TIM_TISEL_TI4SEL_0 | TIM_TISEL_TI4SEL_1) /*!< TIM24_TI1 is connected to CAN SOC */
0246 /**
0247   * @}
0248   */
0249 
0250 /**
0251   * @}
0252   */
0253 /* End of exported constants -------------------------------------------------*/
0254 
0255 /* Exported macro ------------------------------------------------------------*/
0256 /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros
0257   * @ingroup RTEMSBSPsARMSTM32H7
0258   * @{
0259   */
0260 
0261 /**
0262   * @}
0263   */
0264 /* End of exported macro -----------------------------------------------------*/
0265 
0266 /* Private macro -------------------------------------------------------------*/
0267 /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros
0268   * @ingroup RTEMSBSPsARMSTM32H7
0269   * @{
0270   */
0271 #define IS_TIM_BREAKINPUT(__BREAKINPUT__)  (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK)  || \
0272                                             ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2))
0273 
0274 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__)  (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN)  || \
0275                                               ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \
0276                                               ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) || \
0277                                               ((__SOURCE__) == TIM_BREAKINPUTSOURCE_DFSDM1))
0278 
0279 #define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__)  (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE)  || \
0280                                                    ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE))
0281 
0282 #define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__)  (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW)  || \
0283                                                          ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH))
0284 
0285 #define IS_TIM_TISEL(__TISEL__)  (((__TISEL__) == TIM_TIM1_TI1_GPIO)         ||\
0286                                   ((__TISEL__) == TIM_TIM1_TI1_COMP1)        ||\
0287                                   ((__TISEL__) == TIM_TIM8_TI1_GPIO)         ||\
0288                                   ((__TISEL__) == TIM_TIM8_TI1_COMP2)        ||\
0289                                   ((__TISEL__) == TIM_TIM2_TI4_GPIO)         ||\
0290                                   ((__TISEL__) == TIM_TIM2_TI4_COMP1)        ||\
0291                                   ((__TISEL__) == TIM_TIM2_TI4_COMP2)        ||\
0292                                   ((__TISEL__) == TIM_TIM2_TI4_COMP1_COMP2)  ||\
0293                                   ((__TISEL__) == TIM_TIM3_TI1_GPIO)         ||\
0294                                   ((__TISEL__) == TIM_TIM3_TI1_COMP1)        ||\
0295                                   ((__TISEL__) == TIM_TIM3_TI1_COMP2)        ||\
0296                                   ((__TISEL__) == TIM_TIM3_TI1_COMP1_COMP2)  ||\
0297                                   ((__TISEL__) == TIM_TIM5_TI1_GPIO)         ||\
0298                                   ((__TISEL__) == TIM_TIM5_TI1_CAN_TMP)      ||\
0299                                   ((__TISEL__) == TIM_TIM5_TI1_CAN_RTP)      ||\
0300                                   ((__TISEL__) == TIM_TIM12_TI1_SPDIF_FS)    ||\
0301                                   ((__TISEL__) == TIM_TIM12_TI1_GPIO)        ||\
0302                                   ((__TISEL__) == TIM_TIM15_TI1_GPIO)        ||\
0303                                   ((__TISEL__) == TIM_TIM15_TI1_TIM2_CH1)    ||\
0304                                   ((__TISEL__) == TIM_TIM15_TI1_TIM3_CH1)    ||\
0305                                   ((__TISEL__) == TIM_TIM15_TI1_TIM4_CH1)    ||\
0306                                   ((__TISEL__) == TIM_TIM15_TI1_RCC_LSE)     ||\
0307                                   ((__TISEL__) == TIM_TIM15_TI1_RCC_CSI)     ||\
0308                                   ((__TISEL__) == TIM_TIM15_TI1_RCC_MCO2)    ||\
0309                                   ((__TISEL__) == TIM_TIM15_TI2_GPIO)        ||\
0310                                   ((__TISEL__) == TIM_TIM15_TI2_TIM2_CH2)    ||\
0311                                   ((__TISEL__) == TIM_TIM15_TI2_TIM3_CH2)    ||\
0312                                   ((__TISEL__) == TIM_TIM15_TI2_TIM4_CH2)    ||\
0313                                   ((__TISEL__) == TIM_TIM16_TI1_GPIO)        ||\
0314                                   ((__TISEL__) == TIM_TIM16_TI1_RCC_LSI)     ||\
0315                                   ((__TISEL__) == TIM_TIM16_TI1_RCC_LSE)     ||\
0316                                   ((__TISEL__) == TIM_TIM16_TI1_WKUP_IT)     ||\
0317                                   ((__TISEL__) == TIM_TIM17_TI1_GPIO)        ||\
0318                                   ((__TISEL__) == TIM_TIM17_TI1_SPDIF_FS)    ||\
0319                                   ((__TISEL__) == TIM_TIM17_TI1_RCC_HSE1MHZ) ||\
0320                                   ((__TISEL__) == TIM_TIM17_TI1_RCC_MCO1)    ||\
0321                                   ((__TISEL__) == TIM_TIM23_TI4_GPIO)        ||\
0322                                   ((__TISEL__) == TIM_TIM23_TI4_COMP1)       ||\
0323                                   ((__TISEL__) == TIM_TIM23_TI4_COMP2)       ||\
0324                                   ((__TISEL__) == TIM_TIM23_TI4_COMP1_COMP2) ||\
0325                                   ((__TISEL__) == TIM_TIM24_TI1_GPIO)        ||\
0326                                   ((__TISEL__) == TIM_TIM24_TI1_CAN_TMP)     ||\
0327                                   ((__TISEL__) == TIM_TIM24_TI1_CAN_RTP)     ||\
0328                                   ((__TISEL__) == TIM_TIM24_TI1_CAN_SOC))
0329 
0330 #define IS_TIM_REMAP(__RREMAP__)     (((__RREMAP__) == TIM_TIM1_ETR_GPIO)      ||\
0331                                       ((__RREMAP__) == TIM_TIM1_ETR_ADC1_AWD1) ||\
0332                                       ((__RREMAP__) == TIM_TIM1_ETR_ADC1_AWD2) ||\
0333                                       ((__RREMAP__) == TIM_TIM1_ETR_ADC1_AWD3) ||\
0334                                       ((__RREMAP__) == TIM_TIM1_ETR_ADC3_AWD1) ||\
0335                                       ((__RREMAP__) == TIM_TIM1_ETR_ADC3_AWD2) ||\
0336                                       ((__RREMAP__) == TIM_TIM1_ETR_ADC3_AWD3) ||\
0337                                       ((__RREMAP__) == TIM_TIM1_ETR_COMP1)     ||\
0338                                       ((__RREMAP__) == TIM_TIM1_ETR_COMP2)     ||\
0339                                       ((__RREMAP__) == TIM_TIM8_ETR_GPIO)      ||\
0340                                       ((__RREMAP__) == TIM_TIM8_ETR_ADC2_AWD1) ||\
0341                                       ((__RREMAP__) == TIM_TIM8_ETR_ADC2_AWD2) ||\
0342                                       ((__RREMAP__) == TIM_TIM8_ETR_ADC2_AWD3) ||\
0343                                       ((__RREMAP__) == TIM_TIM8_ETR_ADC3_AWD1) ||\
0344                                       ((__RREMAP__) == TIM_TIM8_ETR_ADC3_AWD2) ||\
0345                                       ((__RREMAP__) == TIM_TIM8_ETR_ADC3_AWD3) ||\
0346                                       ((__RREMAP__) == TIM_TIM8_ETR_COMP1)     ||\
0347                                       ((__RREMAP__) == TIM_TIM8_ETR_COMP2)     ||\
0348                                       ((__RREMAP__) == TIM_TIM2_ETR_GPIO)      ||\
0349                                       ((__RREMAP__) == TIM_TIM2_ETR_COMP1)     ||\
0350                                       ((__RREMAP__) == TIM_TIM2_ETR_COMP2)     ||\
0351                                       ((__RREMAP__) == TIM_TIM2_ETR_RCC_LSE)   ||\
0352                                       ((__RREMAP__) == TIM_TIM2_ETR_SAI1_FSA)  ||\
0353                                       ((__RREMAP__) == TIM_TIM2_ETR_SAI1_FSB)  ||\
0354                                       ((__RREMAP__) == TIM_TIM3_ETR_GPIO)      ||\
0355                                       ((__RREMAP__) == TIM_TIM3_ETR_COMP1)     ||\
0356                                       ((__RREMAP__) == TIM_TIM5_ETR_GPIO)      ||\
0357                                       ((__RREMAP__) == TIM_TIM5_ETR_SAI2_FSA)  ||\
0358                                       ((__RREMAP__) == TIM_TIM5_ETR_SAI2_FSB)  ||\
0359                                       ((__RREMAP__) == TIM_TIM23_ETR_GPIO)     ||\
0360                                       ((__RREMAP__) == TIM_TIM23_ETR_COMP1)    ||\
0361                                       ((__RREMAP__) == TIM_TIM23_ETR_COMP2)    ||\
0362                                       ((__RREMAP__) == TIM_TIM24_ETR_GPIO)     ||\
0363                                       ((__RREMAP__) == TIM_TIM24_ETR_SAI4_FSA) ||\
0364                                       ((__RREMAP__) == TIM_TIM24_ETR_SAI4_FSB) ||\
0365                                       ((__RREMAP__) == TIM_TIM24_ETR_SAI1_FSA) ||\
0366                                       ((__RREMAP__) == TIM_TIM24_ETR_SAI1_FSB))
0367 
0368 /**
0369   * @}
0370   */
0371 /* End of private macro ------------------------------------------------------*/
0372 
0373 /* Exported functions --------------------------------------------------------*/
0374 /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions
0375   * @{
0376   */
0377 
0378 /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
0379   *  @brief    Timer Hall Sensor functions
0380   * @{
0381   */
0382 /*  Timer Hall Sensor functions  **********************************************/
0383 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, const TIM_HallSensor_InitTypeDef *sConfig);
0384 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim);
0385 
0386 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim);
0387 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim);
0388 
0389 /* Blocking mode: Polling */
0390 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim);
0391 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim);
0392 /* Non-Blocking mode: Interrupt */
0393 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim);
0394 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim);
0395 /* Non-Blocking mode: DMA */
0396 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
0397 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim);
0398 /**
0399   * @}
0400   */
0401 
0402 /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
0403   *  @brief   Timer Complementary Output Compare functions
0404   * @{
0405   */
0406 /*  Timer Complementary Output Compare functions  *****************************/
0407 /* Blocking mode: Polling */
0408 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
0409 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
0410 
0411 /* Non-Blocking mode: Interrupt */
0412 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
0413 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
0414 
0415 /* Non-Blocking mode: DMA */
0416 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
0417                                           uint16_t Length);
0418 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
0419 /**
0420   * @}
0421   */
0422 
0423 /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
0424   *  @brief    Timer Complementary PWM functions
0425   * @{
0426   */
0427 /*  Timer Complementary PWM functions  ****************************************/
0428 /* Blocking mode: Polling */
0429 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
0430 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
0431 
0432 /* Non-Blocking mode: Interrupt */
0433 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
0434 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
0435 /* Non-Blocking mode: DMA */
0436 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
0437                                            uint16_t Length);
0438 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
0439 /**
0440   * @}
0441   */
0442 
0443 /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
0444   *  @brief    Timer Complementary One Pulse functions
0445   * @{
0446   */
0447 /*  Timer Complementary One Pulse functions  **********************************/
0448 /* Blocking mode: Polling */
0449 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
0450 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
0451 
0452 /* Non-Blocking mode: Interrupt */
0453 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
0454 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
0455 /**
0456   * @}
0457   */
0458 
0459 /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
0460   *  @brief    Peripheral Control functions
0461   * @{
0462   */
0463 /* Extended Control functions  ************************************************/
0464 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t  InputTrigger,
0465                                               uint32_t  CommutationSource);
0466 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t  InputTrigger,
0467                                                  uint32_t  CommutationSource);
0468 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t  InputTrigger,
0469                                                   uint32_t  CommutationSource);
0470 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
0471                                                         const TIM_MasterConfigTypeDef *sMasterConfig);
0472 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
0473                                                 const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
0474 #if defined(TIM_BREAK_INPUT_SUPPORT)
0475 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput,
0476                                              const TIMEx_BreakInputConfigTypeDef *sBreakInputConfig);
0477 #endif /* TIM_BREAK_INPUT_SUPPORT */
0478 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels);
0479 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
0480 HAL_StatusTypeDef  HAL_TIMEx_TISelection(TIM_HandleTypeDef *htim, uint32_t TISelection, uint32_t Channel);
0481 #if defined(TIM_BDTR_BKBID)
0482 
0483 HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput);
0484 HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(const TIM_HandleTypeDef *htim, uint32_t BreakInput);
0485 #endif /* TIM_BDTR_BKBID */
0486 /**
0487   * @}
0488   */
0489 
0490 /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
0491   * @brief    Extended Callbacks functions
0492   * @{
0493   */
0494 /* Extended Callback **********************************************************/
0495 void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim);
0496 void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim);
0497 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim);
0498 void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim);
0499 /**
0500   * @}
0501   */
0502 
0503 /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
0504   * @brief    Extended Peripheral State functions
0505   * @{
0506   */
0507 /* Extended Peripheral State functions  ***************************************/
0508 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim);
0509 HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim,  uint32_t ChannelN);
0510 /**
0511   * @}
0512   */
0513 
0514 /**
0515   * @}
0516   */
0517 /* End of exported functions -------------------------------------------------*/
0518 
0519 /* Private functions----------------------------------------------------------*/
0520 /** @addtogroup TIMEx_Private_Functions TIM Extended Private Functions
0521   * @{
0522   */
0523 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
0524 void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma);
0525 /**
0526   * @}
0527   */
0528 /* End of private functions --------------------------------------------------*/
0529 
0530 /**
0531   * @}
0532   */
0533 
0534 /**
0535   * @}
0536   */
0537 
0538 #ifdef __cplusplus
0539 }
0540 #endif
0541 
0542 
0543 #endif /* STM32H7xx_HAL_TIM_EX_H */
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