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File indexing completed on 2025-05-11 08:23:36 

0001 /**
0002   ******************************************************************************
0003   * @file    stm32h7xx_hal_spdifrx.h
0004   * @author  MCD Application Team
0005   * @brief   Header file of SPDIFRX HAL module.
0006   ******************************************************************************
0007   * @attention
0008   *
0009   * Copyright (c) 2017 STMicroelectronics.
0010   * All rights reserved.
0011   *
0012   * This software is licensed under terms that can be found in the LICENSE file
0013   * in the root directory of this software component.
0014   * If no LICENSE file comes with this software, it is provided AS-IS.
0015   *
0016   ******************************************************************************
0017   */
0018 
0019 /* Define to prevent recursive inclusion -------------------------------------*/
0020 #ifndef STM32H7xx_HAL_SPDIFRX_H
0021 #define STM32H7xx_HAL_SPDIFRX_H
0022 
0023 #ifdef __cplusplus
0024 extern "C" {
0025 #endif
0026 
0027 /* Includes ------------------------------------------------------------------*/
0028 #include "stm32h7xx_hal_def.h"
0029 
0030 
0031 /** @addtogroup STM32H7xx_HAL_Driver
0032   * @{
0033   */
0034 #if defined (SPDIFRX)
0035 
0036 /** @addtogroup SPDIFRX
0037   * @{
0038   */
0039 
0040 /* Exported types ------------------------------------------------------------*/
0041 /** @defgroup SPDIFRX_Exported_Types SPDIFRX Exported Types
0042   * @ingroup RTEMSBSPsARMSTM32H7
0043   * @{
0044   */
0045 
0046 /**
0047   * @brief SPDIFRX Init structure definition
0048   */
0049 typedef struct
0050 {
0051   uint32_t InputSelection;           /*!< Specifies the SPDIF input selection.
0052                                           This parameter can be a value of @ref SPDIFRX_Input_Selection */
0053 
0054   uint32_t Retries;                  /*!< Specifies the Maximum allowed re-tries during synchronization phase.
0055                                           This parameter can be a value of @ref SPDIFRX_Max_Retries */
0056 
0057   uint32_t WaitForActivity;          /*!< Specifies the wait for activity on SPDIF selected input.
0058                                           This parameter can be a value of @ref SPDIFRX_Wait_For_Activity. */
0059 
0060   uint32_t ChannelSelection;         /*!< Specifies whether the control flow will take the channel status
0061                                           from channel A or B.
0062                                           This parameter can be a value of @ref SPDIFRX_Channel_Selection */
0063 
0064   uint32_t DataFormat;               /*!< Specifies the Data samples format (LSB, MSB, ...).
0065                                           This parameter can be a value of @ref SPDIFRX_Data_Format */
0066 
0067   uint32_t StereoMode;               /*!< Specifies whether the peripheral is in stereo or mono mode.
0068                                           This parameter can be a value of @ref SPDIFRX_Stereo_Mode */
0069 
0070   uint32_t PreambleTypeMask;         /*!< Specifies whether The preamble type bits are copied or not
0071                                           into the received frame.
0072                                           This parameter can be a value of @ref SPDIFRX_PT_Mask */
0073 
0074   uint32_t ChannelStatusMask;        /*!< Specifies whether the channel status and user bits are copied or not
0075                                           into the received frame.
0076                                           This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */
0077 
0078   uint32_t ValidityBitMask;          /*!< Specifies whether the validity bit is copied or not into the received frame.
0079                                           This parameter can be a value of @ref SPDIFRX_V_Mask */
0080 
0081   uint32_t ParityErrorMask;          /*!< Specifies whether the parity error bit is copied or not
0082                                           into the received frame.
0083                                           This parameter can be a value of @ref SPDIFRX_PE_Mask */
0084   FunctionalState SymbolClockGen;     /*!< Enable/Disable the SPDIFRX Symbol Clock generation.
0085                                            This parameter can be set to Enable or Disable */
0086 
0087   FunctionalState BackupSymbolClockGen; /*!< Enable/Disable the SPDIFRX Backup Symbol Clock generation.
0088                                              This parameter can be set to Enable or Disable */
0089 } SPDIFRX_InitTypeDef;
0090 
0091 /**
0092   * @brief SPDIFRX SetDataFormat structure definition
0093   */
0094 typedef struct
0095 {
0096   uint32_t DataFormat;               /*!< Specifies the Data samples format (LSB, MSB, ...).
0097                                           This parameter can be a value of @ref SPDIFRX_Data_Format */
0098 
0099   uint32_t StereoMode;               /*!< Specifies whether the peripheral is in stereo or mono mode.
0100                                           This parameter can be a value of @ref SPDIFRX_Stereo_Mode */
0101 
0102   uint32_t PreambleTypeMask;         /*!< Specifies whether The preamble type bits are copied or not
0103                                           into the received frame.
0104                                           This parameter can be a value of @ref SPDIFRX_PT_Mask */
0105 
0106   uint32_t ChannelStatusMask;        /*!< Specifies whether the channel status and user bits are copied or not
0107                                           into the received frame.
0108                                           This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */
0109 
0110   uint32_t ValidityBitMask;          /*!< Specifies whether the validity bit is copied or not into the received frame.
0111                                           This parameter can be a value of @ref SPDIFRX_V_Mask */
0112 
0113   uint32_t ParityErrorMask;          /*!< Specifies whether the parity error bit is copied or not
0114                                           into the received frame.
0115                                           This parameter can be a value of @ref SPDIFRX_PE_Mask */
0116 
0117 } SPDIFRX_SetDataFormatTypeDef;
0118 
0119 /**
0120   * @brief  HAL State structures definition
0121   */
0122 typedef enum
0123 {
0124   HAL_SPDIFRX_STATE_RESET      = 0x00U,  /*!< SPDIFRX not yet initialized or disabled                */
0125   HAL_SPDIFRX_STATE_READY      = 0x01U,  /*!< SPDIFRX initialized and ready for use                  */
0126   HAL_SPDIFRX_STATE_BUSY       = 0x02U,  /*!< SPDIFRX internal process is ongoing                    */
0127   HAL_SPDIFRX_STATE_BUSY_RX    = 0x03U,  /*!< SPDIFRX internal Data Flow RX process is ongoing       */
0128   HAL_SPDIFRX_STATE_BUSY_CX    = 0x04U,  /*!< SPDIFRX internal Control Flow RX process is ongoing    */
0129   HAL_SPDIFRX_STATE_ERROR      = 0x07U   /*!< SPDIFRX error state                                    */
0130 } HAL_SPDIFRX_StateTypeDef;
0131 
0132 /**
0133   * @brief SPDIFRX handle Structure definition
0134   */
0135 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
0136 typedef struct __SPDIFRX_HandleTypeDef
0137 #else
0138 typedef struct
0139 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
0140 {
0141   SPDIFRX_TypeDef            *Instance;    /* SPDIFRX registers base address */
0142 
0143   SPDIFRX_InitTypeDef        Init;         /* SPDIFRX communication parameters */
0144 
0145   uint32_t                   *pRxBuffPtr;  /* Pointer to SPDIFRX Rx transfer buffer */
0146 
0147   uint32_t                   *pCsBuffPtr;  /* Pointer to SPDIFRX Cx transfer buffer */
0148 
0149   __IO uint16_t              RxXferSize;   /* SPDIFRX Rx transfer size */
0150 
0151   __IO uint16_t              RxXferCount;  /* SPDIFRX Rx transfer counter
0152                                               (This field is initialized at the
0153                                                same value as transfer size at the
0154                                                beginning of the transfer and
0155                                                decremented when a sample is received.
0156                                                NbSamplesReceived = RxBufferSize-RxBufferCount) */
0157 
0158   __IO uint16_t              CsXferSize;   /* SPDIFRX Rx transfer size */
0159 
0160   __IO uint16_t              CsXferCount;  /* SPDIFRX Rx transfer counter
0161                                               (This field is initialized at the
0162                                                same value as transfer size at the
0163                                                beginning of the transfer and
0164                                                decremented when a sample is received.
0165                                                NbSamplesReceived = RxBufferSize-RxBufferCount) */
0166 
0167   DMA_HandleTypeDef          *hdmaCsRx;    /* SPDIFRX EC60958_channel_status and user_information
0168                                               DMA handle parameters */
0169 
0170   DMA_HandleTypeDef          *hdmaDrRx;    /* SPDIFRX Rx DMA handle parameters */
0171 
0172   __IO HAL_LockTypeDef       Lock;         /* SPDIFRX locking object */
0173 
0174   __IO HAL_SPDIFRX_StateTypeDef  State;    /* SPDIFRX communication state */
0175 
0176   __IO uint32_t  ErrorCode;                /* SPDIFRX Error code */
0177 
0178 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
0179   void (*RxHalfCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);   /*!< SPDIFRX Data flow half completed
0180                                                                              callback */
0181   void (*RxCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);       /*!< SPDIFRX Data flow completed callback */
0182   void (*CxHalfCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);   /*!< SPDIFRX Control flow half completed
0183                                                                              callback */
0184   void (*CxCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);       /*!< SPDIFRX Control flow completed callback */
0185   void (*ErrorCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);        /*!< SPDIFRX error callback */
0186   void (* MspInitCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);     /*!< SPDIFRX Msp Init callback  */
0187   void (* MspDeInitCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);   /*!< SPDIFRX Msp DeInit callback  */
0188 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
0189 
0190 } SPDIFRX_HandleTypeDef;
0191 
0192 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
0193 /**
0194   * @brief  HAL SPDIFRX Callback ID enumeration definition
0195   */
0196 typedef enum
0197 {
0198   HAL_SPDIFRX_RX_HALF_CB_ID   = 0x00U,    /*!< SPDIFRX Data flow half completed callback ID */
0199   HAL_SPDIFRX_RX_CPLT_CB_ID   = 0x01U,    /*!< SPDIFRX Data flow completed callback */
0200   HAL_SPDIFRX_CX_HALF_CB_ID   = 0x02U,    /*!< SPDIFRX Control flow half completed callback */
0201   HAL_SPDIFRX_CX_CPLT_CB_ID   = 0x03U,    /*!< SPDIFRX Control flow completed callback */
0202   HAL_SPDIFRX_ERROR_CB_ID     = 0x04U,    /*!< SPDIFRX error callback */
0203   HAL_SPDIFRX_MSPINIT_CB_ID   = 0x05U,    /*!< SPDIFRX Msp Init callback ID     */
0204   HAL_SPDIFRX_MSPDEINIT_CB_ID = 0x06U     /*!< SPDIFRX Msp DeInit callback ID   */
0205 } HAL_SPDIFRX_CallbackIDTypeDef;
0206 
0207 /**
0208   * @brief  HAL SPDIFRX Callback pointer definition
0209   */
0210 typedef  void (*pSPDIFRX_CallbackTypeDef)(SPDIFRX_HandleTypeDef *hspdif);  /*!< pointer to an SPDIFRX callback
0211                                                                                 function */
0212 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
0213 /**
0214   * @}
0215   */
0216 /* Exported constants --------------------------------------------------------*/
0217 /** @defgroup SPDIFRX_Exported_Constants SPDIFRX Exported Constants
0218   * @ingroup RTEMSBSPsARMSTM32H7
0219   * @{
0220   */
0221 /** @defgroup SPDIFRX_ErrorCode SPDIFRX Error Code
0222   * @ingroup RTEMSBSPsARMSTM32H7
0223   * @{
0224   */
0225 #define HAL_SPDIFRX_ERROR_NONE      ((uint32_t)0x00000000U)  /*!< No error           */
0226 #define HAL_SPDIFRX_ERROR_TIMEOUT   ((uint32_t)0x00000001U)  /*!< Timeout error      */
0227 #define HAL_SPDIFRX_ERROR_OVR       ((uint32_t)0x00000002U)  /*!< OVR error          */
0228 #define HAL_SPDIFRX_ERROR_PE        ((uint32_t)0x00000004U)  /*!< Parity error       */
0229 #define HAL_SPDIFRX_ERROR_DMA       ((uint32_t)0x00000008U)  /*!< DMA transfer error */
0230 #define HAL_SPDIFRX_ERROR_UNKNOWN   ((uint32_t)0x00000010U)  /*!< Unknown Error error */
0231 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
0232 #define  HAL_SPDIFRX_ERROR_INVALID_CALLBACK   ((uint32_t)0x00000020U)    /*!< Invalid Callback error  */
0233 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
0234 /**
0235   * @}
0236   */
0237 
0238 /** @defgroup SPDIFRX_Input_Selection SPDIFRX Input Selection
0239   * @ingroup RTEMSBSPsARMSTM32H7
0240   * @{
0241   */
0242 #define SPDIFRX_INPUT_IN0   ((uint32_t)0x00000000U)
0243 #define SPDIFRX_INPUT_IN1   ((uint32_t)0x00010000U)
0244 #define SPDIFRX_INPUT_IN2   ((uint32_t)0x00020000U)
0245 #define SPDIFRX_INPUT_IN3   ((uint32_t)0x00030000U)
0246 /**
0247   * @}
0248   */
0249 
0250 /** @defgroup SPDIFRX_Max_Retries SPDIFRX Maximum Retries
0251   * @ingroup RTEMSBSPsARMSTM32H7
0252   * @{
0253   */
0254 #define SPDIFRX_MAXRETRIES_NONE   ((uint32_t)0x00000000U)
0255 #define SPDIFRX_MAXRETRIES_3      ((uint32_t)0x00001000U)
0256 #define SPDIFRX_MAXRETRIES_15     ((uint32_t)0x00002000U)
0257 #define SPDIFRX_MAXRETRIES_63     ((uint32_t)0x00003000U)
0258 /**
0259   * @}
0260   */
0261 
0262 /** @defgroup SPDIFRX_Wait_For_Activity SPDIFRX Wait For Activity
0263   * @ingroup RTEMSBSPsARMSTM32H7
0264   * @{
0265   */
0266 #define SPDIFRX_WAITFORACTIVITY_OFF   ((uint32_t)0x00000000U)
0267 #define SPDIFRX_WAITFORACTIVITY_ON    ((uint32_t)SPDIFRX_CR_WFA)
0268 /**
0269   * @}
0270   */
0271 
0272 /** @defgroup SPDIFRX_PT_Mask SPDIFRX Preamble Type Mask
0273   * @ingroup RTEMSBSPsARMSTM32H7
0274   * @{
0275   */
0276 #define SPDIFRX_PREAMBLETYPEMASK_OFF    ((uint32_t)0x00000000U)
0277 #define SPDIFRX_PREAMBLETYPEMASK_ON     ((uint32_t)SPDIFRX_CR_PTMSK)
0278 /**
0279   * @}
0280   */
0281 
0282 /** @defgroup SPDIFRX_ChannelStatus_Mask  SPDIFRX Channel Status Mask
0283   * @ingroup RTEMSBSPsARMSTM32H7
0284   * @{
0285   */
0286 #define SPDIFRX_CHANNELSTATUS_OFF   ((uint32_t)0x00000000U)       /* The channel status and user bits are copied
0287                                                                      into the SPDIF_DR */
0288 #define SPDIFRX_CHANNELSTATUS_ON    ((uint32_t)SPDIFRX_CR_CUMSK)  /* The channel status and user bits are not copied
0289                                                                      into the SPDIF_DR, zeros are written instead*/
0290 /**
0291   * @}
0292   */
0293 
0294 /** @defgroup SPDIFRX_V_Mask SPDIFRX Validity Mask
0295   * @ingroup RTEMSBSPsARMSTM32H7
0296   * @{
0297   */
0298 #define SPDIFRX_VALIDITYMASK_OFF    ((uint32_t)0x00000000U)
0299 #define SPDIFRX_VALIDITYMASK_ON     ((uint32_t)SPDIFRX_CR_VMSK)
0300 /**
0301   * @}
0302   */
0303 
0304 /** @defgroup SPDIFRX_PE_Mask  SPDIFRX Parity Error Mask
0305   * @ingroup RTEMSBSPsARMSTM32H7
0306   * @{
0307   */
0308 #define SPDIFRX_PARITYERRORMASK_OFF   ((uint32_t)0x00000000U)
0309 #define SPDIFRX_PARITYERRORMASK_ON    ((uint32_t)SPDIFRX_CR_PMSK)
0310 /**
0311   * @}
0312   */
0313 
0314 /** @defgroup SPDIFRX_Channel_Selection  SPDIFRX Channel Selection
0315   * @ingroup RTEMSBSPsARMSTM32H7
0316   * @{
0317   */
0318 #define SPDIFRX_CHANNEL_A   ((uint32_t)0x00000000U)
0319 #define SPDIFRX_CHANNEL_B   ((uint32_t)SPDIFRX_CR_CHSEL)
0320 /**
0321   * @}
0322   */
0323 
0324 /** @defgroup SPDIFRX_Data_Format SPDIFRX Data Format
0325   * @ingroup RTEMSBSPsARMSTM32H7
0326   * @{
0327   */
0328 #define SPDIFRX_DATAFORMAT_LSB      ((uint32_t)0x00000000U)
0329 #define SPDIFRX_DATAFORMAT_MSB      ((uint32_t)0x00000010U)
0330 #define SPDIFRX_DATAFORMAT_32BITS   ((uint32_t)0x00000020U)
0331 /**
0332   * @}
0333   */
0334 
0335 /** @defgroup SPDIFRX_Stereo_Mode SPDIFRX Stereo Mode
0336   * @ingroup RTEMSBSPsARMSTM32H7
0337   * @{
0338   */
0339 #define SPDIFRX_STEREOMODE_DISABLE    ((uint32_t)0x00000000U)
0340 #define SPDIFRX_STEREOMODE_ENABLE     ((uint32_t)SPDIFRX_CR_RXSTEO)
0341 /**
0342   * @}
0343   */
0344 
0345 /** @defgroup SPDIFRX_State SPDIFRX State
0346   * @ingroup RTEMSBSPsARMSTM32H7
0347   * @{
0348   */
0349 
0350 #define SPDIFRX_STATE_IDLE    ((uint32_t)0xFFFFFFFCU)
0351 #define SPDIFRX_STATE_SYNC    ((uint32_t)0x00000001U)
0352 #define SPDIFRX_STATE_RCV     ((uint32_t)SPDIFRX_CR_SPDIFEN)
0353 /**
0354   * @}
0355   */
0356 
0357 /** @defgroup SPDIFRX_Interrupts_Definition SPDIFRX Interrupts Definition
0358   * @ingroup RTEMSBSPsARMSTM32H7
0359   * @{
0360   */
0361 #define SPDIFRX_IT_RXNE       ((uint32_t)SPDIFRX_IMR_RXNEIE)
0362 #define SPDIFRX_IT_CSRNE      ((uint32_t)SPDIFRX_IMR_CSRNEIE)
0363 #define SPDIFRX_IT_PERRIE     ((uint32_t)SPDIFRX_IMR_PERRIE)
0364 #define SPDIFRX_IT_OVRIE      ((uint32_t)SPDIFRX_IMR_OVRIE)
0365 #define SPDIFRX_IT_SBLKIE     ((uint32_t)SPDIFRX_IMR_SBLKIE)
0366 #define SPDIFRX_IT_SYNCDIE    ((uint32_t)SPDIFRX_IMR_SYNCDIE)
0367 #define SPDIFRX_IT_IFEIE      ((uint32_t)SPDIFRX_IMR_IFEIE )
0368 /**
0369   * @}
0370   */
0371 
0372 /** @defgroup SPDIFRX_Flags_Definition SPDIFRX Flags Definition
0373   * @ingroup RTEMSBSPsARMSTM32H7
0374   * @{
0375   */
0376 #define SPDIFRX_FLAG_RXNE     ((uint32_t)SPDIFRX_SR_RXNE)
0377 #define SPDIFRX_FLAG_CSRNE    ((uint32_t)SPDIFRX_SR_CSRNE)
0378 #define SPDIFRX_FLAG_PERR     ((uint32_t)SPDIFRX_SR_PERR)
0379 #define SPDIFRX_FLAG_OVR      ((uint32_t)SPDIFRX_SR_OVR)
0380 #define SPDIFRX_FLAG_SBD      ((uint32_t)SPDIFRX_SR_SBD)
0381 #define SPDIFRX_FLAG_SYNCD    ((uint32_t)SPDIFRX_SR_SYNCD)
0382 #define SPDIFRX_FLAG_FERR     ((uint32_t)SPDIFRX_SR_FERR)
0383 #define SPDIFRX_FLAG_SERR     ((uint32_t)SPDIFRX_SR_SERR)
0384 #define SPDIFRX_FLAG_TERR     ((uint32_t)SPDIFRX_SR_TERR)
0385 /**
0386   * @}
0387   */
0388 
0389 /**
0390   * @}
0391   */
0392 
0393 /* Exported macros -----------------------------------------------------------*/
0394 /** @defgroup SPDIFRX_Exported_macros SPDIFRX Exported Macros
0395   * @ingroup RTEMSBSPsARMSTM32H7
0396   * @{
0397   */
0398 
0399 /** @brief  Reset SPDIFRX handle state
0400   * @param  __HANDLE__ SPDIFRX handle.
0401   * @retval None
0402   */
0403 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
0404 #define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) do{\
0405                                                          (__HANDLE__)->State = HAL_SPDIFRX_STATE_RESET;\
0406                                                          (__HANDLE__)->MspInitCallback = NULL;\
0407                                                          (__HANDLE__)->MspDeInitCallback = NULL;\
0408                                                        }while(0)
0409 #else
0410 #define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPDIFRX_STATE_RESET)
0411 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
0412 
0413 /** @brief  Disable the specified SPDIFRX peripheral (IDLE State).
0414   * @param  __HANDLE__ specifies the SPDIFRX Handle.
0415   * @retval None
0416   */
0417 #define __HAL_SPDIFRX_IDLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= SPDIFRX_STATE_IDLE)
0418 
0419 /** @brief  Enable the specified SPDIFRX peripheral (SYNC State).
0420   * @param  __HANDLE__ specifies the SPDIFRX Handle.
0421   * @retval None
0422   */
0423 #define __HAL_SPDIFRX_SYNC(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_SYNC)
0424 
0425 
0426 /** @brief  Enable the specified SPDIFRX peripheral (RCV State).
0427   * @param  __HANDLE__ specifies the SPDIFRX Handle.
0428   * @retval None
0429   */
0430 #define __HAL_SPDIFRX_RCV(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_RCV)
0431 
0432 
0433 /** @brief  Enable or disable the specified SPDIFRX interrupts.
0434   * @param  __HANDLE__    specifies the SPDIFRX Handle.
0435   * @param  __INTERRUPT__ specifies the interrupt source to enable or disable.
0436   *        This parameter can be one of the following values:
0437   *            @arg SPDIFRX_IT_RXNE
0438   *            @arg SPDIFRX_IT_CSRNE
0439   *            @arg SPDIFRX_IT_PERRIE
0440   *            @arg SPDIFRX_IT_OVRIE
0441   *            @arg SPDIFRX_IT_SBLKIE
0442   *            @arg SPDIFRX_IT_SYNCDIE
0443   *            @arg SPDIFRX_IT_IFEIE
0444   * @retval None
0445   */
0446 #define __HAL_SPDIFRX_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__))
0447 #define __HAL_SPDIFRX_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR\
0448                                                              &= (uint16_t)(~(__INTERRUPT__)))
0449 
0450 /** @brief  Checks if the specified SPDIFRX interrupt source is enabled or disabled.
0451   * @param  __HANDLE__    specifies the SPDIFRX Handle.
0452   * @param  __INTERRUPT__ specifies the SPDIFRX interrupt source to check.
0453   *          This parameter can be one of the following values:
0454   *            @arg SPDIFRX_IT_RXNE
0455   *            @arg SPDIFRX_IT_CSRNE
0456   *            @arg SPDIFRX_IT_PERRIE
0457   *            @arg SPDIFRX_IT_OVRIE
0458   *            @arg SPDIFRX_IT_SBLKIE
0459   *            @arg SPDIFRX_IT_SYNCDIE
0460   *            @arg SPDIFRX_IT_IFEIE
0461   * @retval The new state of __IT__ (TRUE or FALSE).
0462   */
0463 #define __HAL_SPDIFRX_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR\
0464                                                                   & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
0465 
0466 /** @brief  Checks whether the specified SPDIFRX flag is set or not.
0467   * @param  __HANDLE__  specifies the SPDIFRX Handle.
0468   * @param  __FLAG__    specifies the flag to check.
0469   *        This parameter can be one of the following values:
0470   *            @arg SPDIFRX_FLAG_RXNE
0471   *            @arg SPDIFRX_FLAG_CSRNE
0472   *            @arg SPDIFRX_FLAG_PERR
0473   *            @arg SPDIFRX_FLAG_OVR
0474   *            @arg SPDIFRX_FLAG_SBD
0475   *            @arg SPDIFRX_FLAG_SYNCD
0476   *            @arg SPDIFRX_FLAG_FERR
0477   *            @arg SPDIFRX_FLAG_SERR
0478   *            @arg SPDIFRX_FLAG_TERR
0479   * @retval The new state of __FLAG__ (TRUE or FALSE).
0480   */
0481 #define __HAL_SPDIFRX_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->SR)\
0482                                                         & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
0483 
0484 /** @brief  Clears the specified SPDIFRX SR flag, in setting the proper IFCR register bit.
0485   * @param  __HANDLE__    specifies the USART Handle.
0486   * @param  __IT_CLEAR__  specifies the interrupt clear register flag that needs to be set
0487   *                       to clear the corresponding interrupt
0488   *          This parameter can be one of the following values:
0489   *            @arg SPDIFRX_FLAG_PERR
0490   *            @arg SPDIFRX_FLAG_OVR
0491   *            @arg SPDIFRX_SR_SBD
0492   *            @arg SPDIFRX_SR_SYNCD
0493   * @retval None
0494   */
0495 #define __HAL_SPDIFRX_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->IFCR = (uint32_t)(__IT_CLEAR__))
0496 
0497 /**
0498   * @}
0499   */
0500 
0501 /* Exported functions --------------------------------------------------------*/
0502 /** @addtogroup SPDIFRX_Exported_Functions
0503   * @{
0504   */
0505 
0506 /** @addtogroup SPDIFRX_Exported_Functions_Group1
0507   * @{
0508   */
0509 /* Initialization/de-initialization functions  **********************************/
0510 HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif);
0511 HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif);
0512 void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif);
0513 void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif);
0514 HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef  sDataFormat);
0515 
0516 /* Callbacks Register/UnRegister functions  ***********************************/
0517 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
0518 HAL_StatusTypeDef HAL_SPDIFRX_RegisterCallback(SPDIFRX_HandleTypeDef *hspdif, HAL_SPDIFRX_CallbackIDTypeDef CallbackID,
0519                                                pSPDIFRX_CallbackTypeDef pCallback);
0520 HAL_StatusTypeDef HAL_SPDIFRX_UnRegisterCallback(SPDIFRX_HandleTypeDef *hspdif,
0521                                                  HAL_SPDIFRX_CallbackIDTypeDef CallbackID);
0522 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
0523 /**
0524   * @}
0525   */
0526 
0527 /** @addtogroup SPDIFRX_Exported_Functions_Group2
0528   * @{
0529   */
0530 /* I/O operation functions  ***************************************************/
0531 /* Blocking mode: Polling */
0532 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size,
0533                                               uint32_t Timeout);
0534 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveCtrlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size,
0535                                               uint32_t Timeout);
0536 
0537 /* Non-Blocking mode: Interrupt */
0538 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveCtrlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
0539 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
0540 void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif);
0541 
0542 /* Non-Blocking mode: DMA */
0543 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveCtrlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
0544 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
0545 HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif);
0546 
0547 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
0548 void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
0549 void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
0550 void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif);
0551 void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
0552 void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
0553 /**
0554   * @}
0555   */
0556 
0557 /** @addtogroup SPDIFRX_Exported_Functions_Group3
0558   * @{
0559   */
0560 /* Peripheral Control and State functions  ************************************/
0561 HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef const *const hspdif);
0562 uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef const *const hspdif);
0563 /**
0564   * @}
0565   */
0566 
0567 /**
0568   * @}
0569   */
0570 /* Private types -------------------------------------------------------------*/
0571 /* Private variables ---------------------------------------------------------*/
0572 /* Private constants ---------------------------------------------------------*/
0573 /* Private macros ------------------------------------------------------------*/
0574 /** @defgroup SPDIFRX_Private_Macros SPDIFRX Private Macros
0575   * @ingroup RTEMSBSPsARMSTM32H7
0576   * @{
0577   */
0578 #define IS_SPDIFRX_INPUT_SELECT(INPUT)      (((INPUT) == SPDIFRX_INPUT_IN1) || \
0579                                              ((INPUT) == SPDIFRX_INPUT_IN2)  || \
0580                                              ((INPUT) == SPDIFRX_INPUT_IN3)  || \
0581                                              ((INPUT) == SPDIFRX_INPUT_IN0))
0582 
0583 #define IS_SPDIFRX_MAX_RETRIES(RET)         (((RET) == SPDIFRX_MAXRETRIES_NONE) || \
0584                                              ((RET) == SPDIFRX_MAXRETRIES_3)     || \
0585                                              ((RET) == SPDIFRX_MAXRETRIES_15)    || \
0586                                              ((RET) == SPDIFRX_MAXRETRIES_63))
0587 
0588 #define IS_SPDIFRX_WAIT_FOR_ACTIVITY(VAL)   (((VAL) == SPDIFRX_WAITFORACTIVITY_ON) || \
0589                                              ((VAL) == SPDIFRX_WAITFORACTIVITY_OFF))
0590 
0591 #define IS_PREAMBLE_TYPE_MASK(VAL)          (((VAL) == SPDIFRX_PREAMBLETYPEMASK_ON) || \
0592                                              ((VAL) == SPDIFRX_PREAMBLETYPEMASK_OFF))
0593 
0594 #define IS_VALIDITY_MASK(VAL)               (((VAL) == SPDIFRX_VALIDITYMASK_OFF) || \
0595                                              ((VAL) == SPDIFRX_VALIDITYMASK_ON))
0596 
0597 #define IS_PARITY_ERROR_MASK(VAL)           (((VAL) == SPDIFRX_PARITYERRORMASK_OFF) || \
0598                                              ((VAL) == SPDIFRX_PARITYERRORMASK_ON))
0599 
0600 #define IS_SPDIFRX_CHANNEL(CHANNEL)         (((CHANNEL) == SPDIFRX_CHANNEL_A) || \
0601                                              ((CHANNEL) == SPDIFRX_CHANNEL_B))
0602 
0603 #define IS_SPDIFRX_DATA_FORMAT(FORMAT)      (((FORMAT) == SPDIFRX_DATAFORMAT_LSB) || \
0604                                              ((FORMAT) == SPDIFRX_DATAFORMAT_MSB)  || \
0605                                              ((FORMAT) == SPDIFRX_DATAFORMAT_32BITS))
0606 
0607 #define IS_STEREO_MODE(MODE)                (((MODE) == SPDIFRX_STEREOMODE_DISABLE) || \
0608                                              ((MODE) == SPDIFRX_STEREOMODE_ENABLE))
0609 
0610 #define IS_CHANNEL_STATUS_MASK(VAL)         (((VAL) == SPDIFRX_CHANNELSTATUS_ON) || \
0611                                              ((VAL) == SPDIFRX_CHANNELSTATUS_OFF))
0612 
0613 #define IS_SYMBOL_CLOCK_GEN(VAL)            (((VAL) == ENABLE) || ((VAL) == DISABLE))
0614 /**
0615   * @}
0616   */
0617 
0618 /* Private functions ---------------------------------------------------------*/
0619 /** @defgroup SPDIFRX_Private_Functions SPDIFRX Private Functions
0620   * @ingroup RTEMSBSPsARMSTM32H7
0621   * @{
0622   */
0623 /**
0624   * @}
0625   */
0626 
0627 /**
0628   * @}
0629   */
0630 #endif /* SPDIFRX */
0631 /**
0632   * @}
0633   */
0634 
0635 
0636 #ifdef __cplusplus
0637 }
0638 #endif
0639 
0640 
0641 #endif /* STM32H7xx_HAL_SPDIFRX_H */
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