stm32h7/include/stm32h7xx_hal_smbus.h

0001 /**
0002   ******************************************************************************
0003   * @file    stm32h7xx_hal_smbus.h
0004   * @author  MCD Application Team
0005   * @brief   Header file of SMBUS HAL module.
0006   ******************************************************************************
0007   * @attention
0008   *
0009   * Copyright (c) 2017 STMicroelectronics.
0010   * All rights reserved.
0011   *
0012   * This software is licensed under terms that can be found in the LICENSE file
0013   * in the root directory of this software component.
0014   * If no LICENSE file comes with this software, it is provided AS-IS.
0015   *
0016   ******************************************************************************
0017   */
0018
0019 /* Define to prevent recursive inclusion -------------------------------------*/
0020 #ifndef STM32H7xx_HAL_SMBUS_H
0021 #define STM32H7xx_HAL_SMBUS_H
0022
0023 #ifdef __cplusplus
0024 extern "C" {
0025 #endif
0026
0027 /* Includes ------------------------------------------------------------------*/
0028 #include "stm32h7xx_hal_def.h"
0029
0030 /** @addtogroup STM32H7xx_HAL_Driver
0031   * @{
0032   */
0033
0034 /** @addtogroup SMBUS
0035   * @{
0036   */
0037
0038 /* Exported types ------------------------------------------------------------*/
0039 /** @defgroup SMBUS_Exported_Types SMBUS Exported Types
0040   * @ingroup RTEMSBSPsARMSTM32H7
0041   * @{
0042   */
0043
0044 /** @defgroup SMBUS_Configuration_Structure_definition SMBUS Configuration Structure definition
0045   * @ingroup RTEMSBSPsARMSTM32H7
0046   * @brief  SMBUS Configuration Structure definition
0047   * @{
0048   */
0049 typedef struct
0050 {
0051   uint32_t Timing;                 /*!< Specifies the SMBUS_TIMINGR_register value.
0052                                         This parameter calculated by referring to SMBUS initialization section
0053                                         in Reference manual */
0054   uint32_t AnalogFilter;           /*!< Specifies if Analog Filter is enable or not.
0055                                         This parameter can be a value of @ref SMBUS_Analog_Filter */
0056
0057   uint32_t OwnAddress1;            /*!< Specifies the first device own address.
0058                                         This parameter can be a 7-bit or 10-bit address. */
0059
0060   uint32_t AddressingMode;         /*!< Specifies if 7-bit or 10-bit addressing mode for master is selected.
0061                                         This parameter can be a value of @ref SMBUS_addressing_mode */
0062
0063   uint32_t DualAddressMode;        /*!< Specifies if dual addressing mode is selected.
0064                                         This parameter can be a value of @ref SMBUS_dual_addressing_mode */
0065
0066   uint32_t OwnAddress2;            /*!< Specifies the second device own address if dual addressing mode is selected
0067                                         This parameter can be a 7-bit address. */
0068
0069   uint32_t OwnAddress2Masks;       /*!< Specifies the acknowledge mask address second device own address
0070                                         if dual addressing mode is selected
0071                                         This parameter can be a value of @ref SMBUS_own_address2_masks. */
0072
0073   uint32_t GeneralCallMode;        /*!< Specifies if general call mode is selected.
0074                                         This parameter can be a value of @ref SMBUS_general_call_addressing_mode. */
0075
0076   uint32_t NoStretchMode;          /*!< Specifies if nostretch mode is selected.
0077                                         This parameter can be a value of @ref SMBUS_nostretch_mode */
0078
0079   uint32_t PacketErrorCheckMode;   /*!< Specifies if Packet Error Check mode is selected.
0080                                         This parameter can be a value of @ref SMBUS_packet_error_check_mode */
0081
0082   uint32_t PeripheralMode;         /*!< Specifies which mode of Periphal is selected.
0083                                         This parameter can be a value of @ref SMBUS_peripheral_mode */
0084
0085   uint32_t SMBusTimeout;           /*!< Specifies the content of the 32 Bits SMBUS_TIMEOUT_register value.
0086                                         (Enable bits and different timeout values)
0087                                         This parameter calculated by referring to SMBUS initialization section
0088                                         in Reference manual */
0089 } SMBUS_InitTypeDef;
0090 /**
0091   * @}
0092   */
0093
0094 /** @defgroup HAL_state_definition HAL state definition
0095   * @ingroup RTEMSBSPsARMSTM32H7
0096   * @brief  HAL State definition
0097   * @{
0098   */
0099 #define HAL_SMBUS_STATE_RESET           (0x00000000U)  /*!< SMBUS not yet initialized or disabled         */
0100 #define HAL_SMBUS_STATE_READY           (0x00000001U)  /*!< SMBUS initialized and ready for use           */
0101 #define HAL_SMBUS_STATE_BUSY            (0x00000002U)  /*!< SMBUS internal process is ongoing             */
0102 #define HAL_SMBUS_STATE_MASTER_BUSY_TX  (0x00000012U)  /*!< Master Data Transmission process is ongoing   */
0103 #define HAL_SMBUS_STATE_MASTER_BUSY_RX  (0x00000022U)  /*!< Master Data Reception process is ongoing      */
0104 #define HAL_SMBUS_STATE_SLAVE_BUSY_TX   (0x00000032U)  /*!< Slave Data Transmission process is ongoing    */
0105 #define HAL_SMBUS_STATE_SLAVE_BUSY_RX   (0x00000042U)  /*!< Slave Data Reception process is ongoing       */
0106 #define HAL_SMBUS_STATE_LISTEN          (0x00000008U)  /*!< Address Listen Mode is ongoing                */
0107 /**
0108   * @}
0109   */
0110
0111 /** @defgroup SMBUS_Error_Code_definition SMBUS Error Code definition
0112   * @ingroup RTEMSBSPsARMSTM32H7
0113   * @brief  SMBUS Error Code definition
0114   * @{
0115   */
0116 #define HAL_SMBUS_ERROR_NONE            (0x00000000U)    /*!< No error             */
0117 #define HAL_SMBUS_ERROR_BERR            (0x00000001U)    /*!< BERR error           */
0118 #define HAL_SMBUS_ERROR_ARLO            (0x00000002U)    /*!< ARLO error           */
0119 #define HAL_SMBUS_ERROR_ACKF            (0x00000004U)    /*!< ACKF error           */
0120 #define HAL_SMBUS_ERROR_OVR             (0x00000008U)    /*!< OVR error            */
0121 #define HAL_SMBUS_ERROR_HALTIMEOUT      (0x00000010U)    /*!< Timeout error        */
0122 #define HAL_SMBUS_ERROR_BUSTIMEOUT      (0x00000020U)    /*!< Bus Timeout error    */
0123 #define HAL_SMBUS_ERROR_ALERT           (0x00000040U)    /*!< Alert error          */
0124 #define HAL_SMBUS_ERROR_PECERR          (0x00000080U)    /*!< PEC error            */
0125 #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
0126 #define HAL_SMBUS_ERROR_INVALID_CALLBACK  (0x00000100U)  /*!< Invalid Callback error   */
0127 #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
0128 #define HAL_SMBUS_ERROR_INVALID_PARAM    (0x00000200U)   /*!< Invalid Parameters error */
0129 /**
0130   * @}
0131   */
0132
0133 /** @defgroup SMBUS_handle_Structure_definition SMBUS handle Structure definition
0134   * @ingroup RTEMSBSPsARMSTM32H7
0135   * @brief  SMBUS handle Structure definition
0136   * @{
0137   */
0138 #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
0139 typedef struct __SMBUS_HandleTypeDef
0140 #else
0141 typedef struct
0142 #endif  /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
0143 {
0144   I2C_TypeDef                  *Instance;       /*!< SMBUS registers base address       */
0145
0146   SMBUS_InitTypeDef            Init;            /*!< SMBUS communication parameters     */
0147
0148   uint8_t                      *pBuffPtr;       /*!< Pointer to SMBUS transfer buffer   */
0149
0150   uint16_t                     XferSize;        /*!< SMBUS transfer size                */
0151
0152   __IO uint16_t                XferCount;       /*!< SMBUS transfer counter             */
0153
0154   __IO uint32_t                XferOptions;     /*!< SMBUS transfer options             */
0155
0156   __IO uint32_t                PreviousState;   /*!< SMBUS communication Previous state */
0157
0158   HAL_LockTypeDef              Lock;            /*!< SMBUS locking object               */
0159
0160   __IO uint32_t                State;           /*!< SMBUS communication state          */
0161
0162   __IO uint32_t                ErrorCode;       /*!< SMBUS Error code                   */
0163
0164 #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
0165   void (* MasterTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);
0166   /*!< SMBUS Master Tx Transfer completed callback */
0167   void (* MasterRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);
0168   /*!< SMBUS Master Rx Transfer completed callback */
0169   void (* SlaveTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);
0170   /*!< SMBUS Slave Tx Transfer completed callback  */
0171   void (* SlaveRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);
0172   /*!< SMBUS Slave Rx Transfer completed callback  */
0173   void (* ListenCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);
0174   /*!< SMBUS Listen Complete callback              */
0175   void (* ErrorCallback)(struct __SMBUS_HandleTypeDef *hsmbus);
0176   /*!< SMBUS Error callback                        */
0177
0178   void (* AddrCallback)(struct __SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode);
0179   /*!< SMBUS Slave Address Match callback */
0180
0181   void (* MspInitCallback)(struct __SMBUS_HandleTypeDef *hsmbus);
0182   /*!< SMBUS Msp Init callback                     */
0183   void (* MspDeInitCallback)(struct __SMBUS_HandleTypeDef *hsmbus);
0184   /*!< SMBUS Msp DeInit callback                   */
0185
0186 #endif  /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
0187 } SMBUS_HandleTypeDef;
0188
0189 #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
0190 /**
0191   * @brief  HAL SMBUS Callback ID enumeration definition
0192   */
0193 typedef enum
0194 {
0195   HAL_SMBUS_MASTER_TX_COMPLETE_CB_ID      = 0x00U,    /*!< SMBUS Master Tx Transfer completed callback ID  */
0196   HAL_SMBUS_MASTER_RX_COMPLETE_CB_ID      = 0x01U,    /*!< SMBUS Master Rx Transfer completed callback ID  */
0197   HAL_SMBUS_SLAVE_TX_COMPLETE_CB_ID       = 0x02U,    /*!< SMBUS Slave Tx Transfer completed callback ID   */
0198   HAL_SMBUS_SLAVE_RX_COMPLETE_CB_ID       = 0x03U,    /*!< SMBUS Slave Rx Transfer completed callback ID   */
0199   HAL_SMBUS_LISTEN_COMPLETE_CB_ID         = 0x04U,    /*!< SMBUS Listen Complete callback ID               */
0200   HAL_SMBUS_ERROR_CB_ID                   = 0x05U,    /*!< SMBUS Error callback ID                         */
0201
0202   HAL_SMBUS_MSPINIT_CB_ID                 = 0x06U,    /*!< SMBUS Msp Init callback ID                      */
0203   HAL_SMBUS_MSPDEINIT_CB_ID               = 0x07U     /*!< SMBUS Msp DeInit callback ID                    */
0204
0205 } HAL_SMBUS_CallbackIDTypeDef;
0206
0207 /**
0208   * @brief  HAL SMBUS Callback pointer definition
0209   */
0210 typedef  void (*pSMBUS_CallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus);
0211 /*!< pointer to an SMBUS callback function */
0212 typedef  void (*pSMBUS_AddrCallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection,
0213                                             uint16_t AddrMatchCode);
0214 /*!< pointer to an SMBUS Address Match callback function */
0215
0216 #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
0217 /**
0218   * @}
0219   */
0220
0221 /**
0222   * @}
0223   */
0224 /* Exported constants --------------------------------------------------------*/
0225
0226 /** @defgroup SMBUS_Exported_Constants SMBUS Exported Constants
0227   * @ingroup RTEMSBSPsARMSTM32H7
0228   * @{
0229   */
0230
0231 /** @defgroup SMBUS_Analog_Filter SMBUS Analog Filter
0232   * @ingroup RTEMSBSPsARMSTM32H7
0233   * @{
0234   */
0235 #define SMBUS_ANALOGFILTER_ENABLE               (0x00000000U)
0236 #define SMBUS_ANALOGFILTER_DISABLE              I2C_CR1_ANFOFF
0237 /**
0238   * @}
0239   */
0240
0241 /** @defgroup SMBUS_addressing_mode SMBUS addressing mode
0242   * @ingroup RTEMSBSPsARMSTM32H7
0243   * @{
0244   */
0245 #define SMBUS_ADDRESSINGMODE_7BIT               (0x00000001U)
0246 #define SMBUS_ADDRESSINGMODE_10BIT              (0x00000002U)
0247 /**
0248   * @}
0249   */
0250
0251 /** @defgroup SMBUS_dual_addressing_mode SMBUS dual addressing mode
0252   * @ingroup RTEMSBSPsARMSTM32H7
0253   * @{
0254   */
0255
0256 #define SMBUS_DUALADDRESS_DISABLE               (0x00000000U)
0257 #define SMBUS_DUALADDRESS_ENABLE                I2C_OAR2_OA2EN
0258 /**
0259   * @}
0260   */
0261
0262 /** @defgroup SMBUS_own_address2_masks SMBUS ownaddress2 masks
0263   * @ingroup RTEMSBSPsARMSTM32H7
0264   * @{
0265   */
0266
0267 #define SMBUS_OA2_NOMASK                        ((uint8_t)0x00U)
0268 #define SMBUS_OA2_MASK01                        ((uint8_t)0x01U)
0269 #define SMBUS_OA2_MASK02                        ((uint8_t)0x02U)
0270 #define SMBUS_OA2_MASK03                        ((uint8_t)0x03U)
0271 #define SMBUS_OA2_MASK04                        ((uint8_t)0x04U)
0272 #define SMBUS_OA2_MASK05                        ((uint8_t)0x05U)
0273 #define SMBUS_OA2_MASK06                        ((uint8_t)0x06U)
0274 #define SMBUS_OA2_MASK07                        ((uint8_t)0x07U)
0275 /**
0276   * @}
0277   */
0278
0279
0280 /** @defgroup SMBUS_general_call_addressing_mode SMBUS general call addressing mode
0281   * @ingroup RTEMSBSPsARMSTM32H7
0282   * @{
0283   */
0284 #define SMBUS_GENERALCALL_DISABLE               (0x00000000U)
0285 #define SMBUS_GENERALCALL_ENABLE                I2C_CR1_GCEN
0286 /**
0287   * @}
0288   */
0289
0290 /** @defgroup SMBUS_nostretch_mode SMBUS nostretch mode
0291   * @ingroup RTEMSBSPsARMSTM32H7
0292   * @{
0293   */
0294 #define SMBUS_NOSTRETCH_DISABLE                 (0x00000000U)
0295 #define SMBUS_NOSTRETCH_ENABLE                  I2C_CR1_NOSTRETCH
0296 /**
0297   * @}
0298   */
0299
0300 /** @defgroup SMBUS_packet_error_check_mode SMBUS packet error check mode
0301   * @ingroup RTEMSBSPsARMSTM32H7
0302   * @{
0303   */
0304 #define SMBUS_PEC_DISABLE                       (0x00000000U)
0305 #define SMBUS_PEC_ENABLE                        I2C_CR1_PECEN
0306 /**
0307   * @}
0308   */
0309
0310 /** @defgroup SMBUS_peripheral_mode SMBUS peripheral mode
0311   * @ingroup RTEMSBSPsARMSTM32H7
0312   * @{
0313   */
0314 #define SMBUS_PERIPHERAL_MODE_SMBUS_HOST        I2C_CR1_SMBHEN
0315 #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE       (0x00000000U)
0316 #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP   I2C_CR1_SMBDEN
0317 /**
0318   * @}
0319   */
0320
0321 /** @defgroup SMBUS_ReloadEndMode_definition SMBUS ReloadEndMode definition
0322   * @ingroup RTEMSBSPsARMSTM32H7
0323   * @{
0324   */
0325
0326 #define  SMBUS_SOFTEND_MODE                     (0x00000000U)
0327 #define  SMBUS_RELOAD_MODE                      I2C_CR2_RELOAD
0328 #define  SMBUS_AUTOEND_MODE                     I2C_CR2_AUTOEND
0329 #define  SMBUS_SENDPEC_MODE                     I2C_CR2_PECBYTE
0330 /**
0331   * @}
0332   */
0333
0334 /** @defgroup SMBUS_StartStopMode_definition SMBUS StartStopMode definition
0335   * @ingroup RTEMSBSPsARMSTM32H7
0336   * @{
0337   */
0338
0339 #define  SMBUS_NO_STARTSTOP                     (0x00000000U)
0340 #define  SMBUS_GENERATE_STOP                    (uint32_t)(0x80000000U | I2C_CR2_STOP)
0341 #define  SMBUS_GENERATE_START_READ              (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN)
0342 #define  SMBUS_GENERATE_START_WRITE             (uint32_t)(0x80000000U | I2C_CR2_START)
0343 /**
0344   * @}
0345   */
0346
0347 /** @defgroup SMBUS_XferOptions_definition SMBUS XferOptions definition
0348   * @ingroup RTEMSBSPsARMSTM32H7
0349   * @{
0350   */
0351
0352 /* List of XferOptions in usage of :
0353  * 1- Restart condition when direction change
0354  * 2- No Restart condition in other use cases
0355  */
0356 #define  SMBUS_FIRST_FRAME                      SMBUS_SOFTEND_MODE
0357 #define  SMBUS_NEXT_FRAME                       ((uint32_t)(SMBUS_RELOAD_MODE | SMBUS_SOFTEND_MODE))
0358 #define  SMBUS_FIRST_AND_LAST_FRAME_NO_PEC      SMBUS_AUTOEND_MODE
0359 #define  SMBUS_LAST_FRAME_NO_PEC                SMBUS_AUTOEND_MODE
0360 #define  SMBUS_FIRST_FRAME_WITH_PEC             ((uint32_t)(SMBUS_SOFTEND_MODE | SMBUS_SENDPEC_MODE))
0361 #define  SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC    ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE))
0362 #define  SMBUS_LAST_FRAME_WITH_PEC              ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE))
0363
0364 /* List of XferOptions in usage of :
0365  * 1- Restart condition in all use cases (direction change or not)
0366  */
0367 #define  SMBUS_OTHER_FRAME_NO_PEC               (0x000000AAU)
0368 #define  SMBUS_OTHER_FRAME_WITH_PEC             (0x0000AA00U)
0369 #define  SMBUS_OTHER_AND_LAST_FRAME_NO_PEC      (0x00AA0000U)
0370 #define  SMBUS_OTHER_AND_LAST_FRAME_WITH_PEC    (0xAA000000U)
0371 /**
0372   * @}
0373   */
0374
0375 /** @defgroup SMBUS_Interrupt_configuration_definition SMBUS Interrupt configuration definition
0376   * @ingroup RTEMSBSPsARMSTM32H7
0377   * @brief SMBUS Interrupt definition
0378   *        Elements values convention: 0xXXXXXXXX
0379   *           - XXXXXXXX  : Interrupt control mask
0380   * @{
0381   */
0382 #define SMBUS_IT_ERRI                           I2C_CR1_ERRIE
0383 #define SMBUS_IT_TCI                            I2C_CR1_TCIE
0384 #define SMBUS_IT_STOPI                          I2C_CR1_STOPIE
0385 #define SMBUS_IT_NACKI                          I2C_CR1_NACKIE
0386 #define SMBUS_IT_ADDRI                          I2C_CR1_ADDRIE
0387 #define SMBUS_IT_RXI                            I2C_CR1_RXIE
0388 #define SMBUS_IT_TXI                            I2C_CR1_TXIE
0389 #define SMBUS_IT_TX                             (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | \
0390                                                  SMBUS_IT_NACKI | SMBUS_IT_TXI)
0391 #define SMBUS_IT_RX                             (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_NACKI | \
0392                                                  SMBUS_IT_RXI)
0393 #define SMBUS_IT_ALERT                          (SMBUS_IT_ERRI)
0394 #define SMBUS_IT_ADDR                           (SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI)
0395 /**
0396   * @}
0397   */
0398
0399 /** @defgroup SMBUS_Flag_definition SMBUS Flag definition
0400   * @ingroup RTEMSBSPsARMSTM32H7
0401   * @brief Flag definition
0402   *        Elements values convention: 0xXXXXYYYY
0403   *           - XXXXXXXX  : Flag mask
0404   * @{
0405   */
0406
0407 #define  SMBUS_FLAG_TXE                         I2C_ISR_TXE
0408 #define  SMBUS_FLAG_TXIS                        I2C_ISR_TXIS
0409 #define  SMBUS_FLAG_RXNE                        I2C_ISR_RXNE
0410 #define  SMBUS_FLAG_ADDR                        I2C_ISR_ADDR
0411 #define  SMBUS_FLAG_AF                          I2C_ISR_NACKF
0412 #define  SMBUS_FLAG_STOPF                       I2C_ISR_STOPF
0413 #define  SMBUS_FLAG_TC                          I2C_ISR_TC
0414 #define  SMBUS_FLAG_TCR                         I2C_ISR_TCR
0415 #define  SMBUS_FLAG_BERR                        I2C_ISR_BERR
0416 #define  SMBUS_FLAG_ARLO                        I2C_ISR_ARLO
0417 #define  SMBUS_FLAG_OVR                         I2C_ISR_OVR
0418 #define  SMBUS_FLAG_PECERR                      I2C_ISR_PECERR
0419 #define  SMBUS_FLAG_TIMEOUT                     I2C_ISR_TIMEOUT
0420 #define  SMBUS_FLAG_ALERT                       I2C_ISR_ALERT
0421 #define  SMBUS_FLAG_BUSY                        I2C_ISR_BUSY
0422 #define  SMBUS_FLAG_DIR                         I2C_ISR_DIR
0423 /**
0424   * @}
0425   */
0426
0427 /**
0428   * @}
0429   */
0430
0431 /* Exported macros ------------------------------------------------------------*/
0432 /** @defgroup SMBUS_Exported_Macros SMBUS Exported Macros
0433   * @ingroup RTEMSBSPsARMSTM32H7
0434   * @{
0435   */
0436
0437 /** @brief  Reset SMBUS handle state.
0438   * @param  __HANDLE__ specifies the SMBUS Handle.
0439   * @retval None
0440   */
0441 #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
0442 #define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__)           do{                                               \
0443                                                                  (__HANDLE__)->State = HAL_SMBUS_STATE_RESET;  \
0444                                                                  (__HANDLE__)->MspInitCallback = NULL;            \
0445                                                                  (__HANDLE__)->MspDeInitCallback = NULL;          \
0446                                                                } while(0)
0447 #else
0448 #define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__)         ((__HANDLE__)->State = HAL_SMBUS_STATE_RESET)
0449 #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
0450
0451 /** @brief  Enable the specified SMBUS interrupts.
0452   * @param  __HANDLE__ specifies the SMBUS Handle.
0453   * @param  __INTERRUPT__ specifies the interrupt source to enable.
0454   *        This parameter can be one of the following values:
0455   *            @arg @ref SMBUS_IT_ERRI  Errors interrupt enable
0456   *            @arg @ref SMBUS_IT_TCI   Transfer complete interrupt enable
0457   *            @arg @ref SMBUS_IT_STOPI STOP detection interrupt enable
0458   *            @arg @ref SMBUS_IT_NACKI NACK received interrupt enable
0459   *            @arg @ref SMBUS_IT_ADDRI Address match interrupt enable
0460   *            @arg @ref SMBUS_IT_RXI   RX interrupt enable
0461   *            @arg @ref SMBUS_IT_TXI   TX interrupt enable
0462   *
0463   * @retval None
0464   */
0465 #define __HAL_SMBUS_ENABLE_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
0466
0467 /** @brief  Disable the specified SMBUS interrupts.
0468   * @param  __HANDLE__ specifies the SMBUS Handle.
0469   * @param  __INTERRUPT__ specifies the interrupt source to disable.
0470   *        This parameter can be one of the following values:
0471   *            @arg @ref SMBUS_IT_ERRI  Errors interrupt enable
0472   *            @arg @ref SMBUS_IT_TCI   Transfer complete interrupt enable
0473   *            @arg @ref SMBUS_IT_STOPI STOP detection interrupt enable
0474   *            @arg @ref SMBUS_IT_NACKI NACK received interrupt enable
0475   *            @arg @ref SMBUS_IT_ADDRI Address match interrupt enable
0476   *            @arg @ref SMBUS_IT_RXI   RX interrupt enable
0477   *            @arg @ref SMBUS_IT_TXI   TX interrupt enable
0478   *
0479   * @retval None
0480   */
0481 #define __HAL_SMBUS_DISABLE_IT(__HANDLE__, __INTERRUPT__)  ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
0482
0483 /** @brief  Check whether the specified SMBUS interrupt source is enabled or not.
0484   * @param  __HANDLE__ specifies the SMBUS Handle.
0485   * @param  __INTERRUPT__ specifies the SMBUS interrupt source to check.
0486   *          This parameter can be one of the following values:
0487   *            @arg @ref SMBUS_IT_ERRI  Errors interrupt enable
0488   *            @arg @ref SMBUS_IT_TCI   Transfer complete interrupt enable
0489   *            @arg @ref SMBUS_IT_STOPI STOP detection interrupt enable
0490   *            @arg @ref SMBUS_IT_NACKI NACK received interrupt enable
0491   *            @arg @ref SMBUS_IT_ADDRI Address match interrupt enable
0492   *            @arg @ref SMBUS_IT_RXI   RX interrupt enable
0493   *            @arg @ref SMBUS_IT_TXI   TX interrupt enable
0494   *
0495   * @retval The new state of __IT__ (SET or RESET).
0496   */
0497 #define __HAL_SMBUS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \
0498   ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
0499
0500 /** @brief  Check whether the specified SMBUS flag is set or not.
0501   * @param  __HANDLE__ specifies the SMBUS Handle.
0502   * @param  __FLAG__ specifies the flag to check.
0503   *        This parameter can be one of the following values:
0504   *            @arg @ref SMBUS_FLAG_TXE     Transmit data register empty
0505   *            @arg @ref SMBUS_FLAG_TXIS    Transmit interrupt status
0506   *            @arg @ref SMBUS_FLAG_RXNE    Receive data register not empty
0507   *            @arg @ref SMBUS_FLAG_ADDR    Address matched (slave mode)
0508   *            @arg @ref SMBUS_FLAG_AF      NACK received flag
0509   *            @arg @ref SMBUS_FLAG_STOPF   STOP detection flag
0510   *            @arg @ref SMBUS_FLAG_TC      Transfer complete (master mode)
0511   *            @arg @ref SMBUS_FLAG_TCR     Transfer complete reload
0512   *            @arg @ref SMBUS_FLAG_BERR    Bus error
0513   *            @arg @ref SMBUS_FLAG_ARLO    Arbitration lost
0514   *            @arg @ref SMBUS_FLAG_OVR     Overrun/Underrun
0515   *            @arg @ref SMBUS_FLAG_PECERR  PEC error in reception
0516   *            @arg @ref SMBUS_FLAG_TIMEOUT Timeout or Tlow detection flag
0517   *            @arg @ref SMBUS_FLAG_ALERT   SMBus alert
0518   *            @arg @ref SMBUS_FLAG_BUSY    Bus busy
0519   *            @arg @ref SMBUS_FLAG_DIR     Transfer direction (slave mode)
0520   *
0521   * @retval The new state of __FLAG__ (SET or RESET).
0522   */
0523 #define SMBUS_FLAG_MASK  (0x0001FFFFU)
0524 #define __HAL_SMBUS_GET_FLAG(__HANDLE__, __FLAG__) \
0525   (((((__HANDLE__)->Instance->ISR) & ((__FLAG__) & SMBUS_FLAG_MASK)) == \
0526     ((__FLAG__) & SMBUS_FLAG_MASK)) ? SET : RESET)
0527
0528 /** @brief  Clear the SMBUS pending flags which are cleared by writing 1 in a specific bit.
0529   * @param  __HANDLE__ specifies the SMBUS Handle.
0530   * @param  __FLAG__ specifies the flag to clear.
0531   *          This parameter can be any combination of the following values:
0532   *            @arg @ref SMBUS_FLAG_TXE     Transmit data register empty
0533   *            @arg @ref SMBUS_FLAG_ADDR    Address matched (slave mode)
0534   *            @arg @ref SMBUS_FLAG_AF      NACK received flag
0535   *            @arg @ref SMBUS_FLAG_STOPF   STOP detection flag
0536   *            @arg @ref SMBUS_FLAG_BERR    Bus error
0537   *            @arg @ref SMBUS_FLAG_ARLO    Arbitration lost
0538   *            @arg @ref SMBUS_FLAG_OVR     Overrun/Underrun
0539   *            @arg @ref SMBUS_FLAG_PECERR  PEC error in reception
0540   *            @arg @ref SMBUS_FLAG_TIMEOUT Timeout or Tlow detection flag
0541   *            @arg @ref SMBUS_FLAG_ALERT   SMBus alert
0542   *
0543   * @retval None
0544   */
0545 #define __HAL_SMBUS_CLEAR_FLAG(__HANDLE__, __FLAG__)  (((__FLAG__) == SMBUS_FLAG_TXE) ? \
0546                                                        ((__HANDLE__)->Instance->ISR |= (__FLAG__)) : \
0547                                                        ((__HANDLE__)->Instance->ICR = (__FLAG__)))
0548
0549 /** @brief  Enable the specified SMBUS peripheral.
0550   * @param  __HANDLE__ specifies the SMBUS Handle.
0551   * @retval None
0552   */
0553 #define __HAL_SMBUS_ENABLE(__HANDLE__)                  (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
0554
0555 /** @brief  Disable the specified SMBUS peripheral.
0556   * @param  __HANDLE__ specifies the SMBUS Handle.
0557   * @retval None
0558   */
0559 #define __HAL_SMBUS_DISABLE(__HANDLE__)                 (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
0560
0561 /** @brief  Generate a Non-Acknowledge SMBUS peripheral in Slave mode.
0562   * @param  __HANDLE__ specifies the SMBUS Handle.
0563   * @retval None
0564   */
0565 #define __HAL_SMBUS_GENERATE_NACK(__HANDLE__)           (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))
0566
0567 /**
0568   * @}
0569   */
0570
0571
0572 /* Private constants ---------------------------------------------------------*/
0573
0574 /* Private macros ------------------------------------------------------------*/
0575 /** @defgroup SMBUS_Private_Macro SMBUS Private Macros
0576   * @ingroup RTEMSBSPsARMSTM32H7
0577   * @{
0578   */
0579
0580 #define IS_SMBUS_ANALOG_FILTER(FILTER)                  (((FILTER) == SMBUS_ANALOGFILTER_ENABLE) || \
0581                                                          ((FILTER) == SMBUS_ANALOGFILTER_DISABLE))
0582
0583 #define IS_SMBUS_DIGITAL_FILTER(FILTER)                 ((FILTER) <= 0x0000000FU)
0584
0585 #define IS_SMBUS_ADDRESSING_MODE(MODE)                  (((MODE) == SMBUS_ADDRESSINGMODE_7BIT)  || \
0586                                                          ((MODE) == SMBUS_ADDRESSINGMODE_10BIT))
0587
0588 #define IS_SMBUS_DUAL_ADDRESS(ADDRESS)                  (((ADDRESS) == SMBUS_DUALADDRESS_DISABLE) || \
0589                                                          ((ADDRESS) == SMBUS_DUALADDRESS_ENABLE))
0590
0591 #define IS_SMBUS_OWN_ADDRESS2_MASK(MASK)                (((MASK) == SMBUS_OA2_NOMASK)    || \
0592                                                          ((MASK) == SMBUS_OA2_MASK01)    || \
0593                                                          ((MASK) == SMBUS_OA2_MASK02)    || \
0594                                                          ((MASK) == SMBUS_OA2_MASK03)    || \
0595                                                          ((MASK) == SMBUS_OA2_MASK04)    || \
0596                                                          ((MASK) == SMBUS_OA2_MASK05)    || \
0597                                                          ((MASK) == SMBUS_OA2_MASK06)    || \
0598                                                          ((MASK) == SMBUS_OA2_MASK07))
0599
0600 #define IS_SMBUS_GENERAL_CALL(CALL)                     (((CALL) == SMBUS_GENERALCALL_DISABLE) || \
0601                                                          ((CALL) == SMBUS_GENERALCALL_ENABLE))
0602
0603 #define IS_SMBUS_NO_STRETCH(STRETCH)                    (((STRETCH) == SMBUS_NOSTRETCH_DISABLE) || \
0604                                                          ((STRETCH) == SMBUS_NOSTRETCH_ENABLE))
0605
0606 #define IS_SMBUS_PEC(PEC)                               (((PEC) == SMBUS_PEC_DISABLE) || \
0607                                                          ((PEC) == SMBUS_PEC_ENABLE))
0608
0609 #define IS_SMBUS_PERIPHERAL_MODE(MODE)                  (((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_HOST)   || \
0610                                                          ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE)  || \
0611                                                          ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP))
0612
0613 #define IS_SMBUS_TRANSFER_MODE(MODE)                 (((MODE) == SMBUS_RELOAD_MODE)                          || \
0614                                                       ((MODE) == SMBUS_AUTOEND_MODE)                         || \
0615                                                       ((MODE) == SMBUS_SOFTEND_MODE)                         || \
0616                                                       ((MODE) == SMBUS_SENDPEC_MODE)                         || \
0617                                                       ((MODE) == (SMBUS_RELOAD_MODE | SMBUS_SENDPEC_MODE))   || \
0618                                                       ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE))  || \
0619                                                       ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_RELOAD_MODE))   || \
0620                                                       ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE | \
0621                                                                   SMBUS_RELOAD_MODE )))
0622
0623
0624 #define IS_SMBUS_TRANSFER_REQUEST(REQUEST)              (((REQUEST) == SMBUS_GENERATE_STOP)              || \
0625                                                          ((REQUEST) == SMBUS_GENERATE_START_READ)        || \
0626                                                          ((REQUEST) == SMBUS_GENERATE_START_WRITE)       || \
0627                                                          ((REQUEST) == SMBUS_NO_STARTSTOP))
0628
0629
0630 #define IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST)   (IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST)       || \
0631                                                       ((REQUEST) == SMBUS_FIRST_FRAME)                       || \
0632                                                       ((REQUEST) == SMBUS_NEXT_FRAME)                        || \
0633                                                       ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC)       || \
0634                                                       ((REQUEST) == SMBUS_LAST_FRAME_NO_PEC)                 || \
0635                                                       ((REQUEST) == SMBUS_FIRST_FRAME_WITH_PEC)              || \
0636                                                       ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC)     || \
0637                                                       ((REQUEST) == SMBUS_LAST_FRAME_WITH_PEC))
0638
0639 #define IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_OTHER_FRAME_NO_PEC)             || \
0640                                                           ((REQUEST) == SMBUS_OTHER_AND_LAST_FRAME_NO_PEC)    || \
0641                                                           ((REQUEST) == SMBUS_OTHER_FRAME_WITH_PEC)           || \
0642                                                           ((REQUEST) == SMBUS_OTHER_AND_LAST_FRAME_WITH_PEC))
0643
0644 #define SMBUS_RESET_CR1(__HANDLE__)                    ((__HANDLE__)->Instance->CR1 &= \
0645                                                         (uint32_t)~((uint32_t)(I2C_CR1_SMBHEN | I2C_CR1_SMBDEN | \
0646                                                                                I2C_CR1_PECEN)))
0647 #define SMBUS_RESET_CR2(__HANDLE__)                    ((__HANDLE__)->Instance->CR2 &= \
0648                                                         (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | \
0649                                                                                I2C_CR2_NBYTES | I2C_CR2_RELOAD | \
0650                                                                                I2C_CR2_RD_WRN)))
0651
0652 #define SMBUS_GENERATE_START(__ADDMODE__,__ADDRESS__)     (((__ADDMODE__) == SMBUS_ADDRESSINGMODE_7BIT) ? \
0653                                                            (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \
0654                                                                        (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & \
0655                                                                       (~I2C_CR2_RD_WRN)) : \
0656                                                            (uint32_t)((((uint32_t)(__ADDRESS__) & \
0657                                                                         (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | \
0658                                                                        (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))
0659
0660 #define SMBUS_GET_ADDR_MATCH(__HANDLE__)                  (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 17U)
0661 #define SMBUS_GET_DIR(__HANDLE__)                         (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U)
0662 #define SMBUS_GET_STOP_MODE(__HANDLE__)                   ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
0663 #define SMBUS_GET_PEC_MODE(__HANDLE__)                    ((__HANDLE__)->Instance->CR2 & I2C_CR2_PECBYTE)
0664 #define SMBUS_GET_ALERT_ENABLED(__HANDLE__)                ((__HANDLE__)->Instance->CR1 & I2C_CR1_ALERTEN)
0665
0666 #define SMBUS_CHECK_FLAG(__ISR__, __FLAG__)             ((((__ISR__) & ((__FLAG__) & SMBUS_FLAG_MASK)) == \
0667                                                           ((__FLAG__) & SMBUS_FLAG_MASK)) ? SET : RESET)
0668 #define SMBUS_CHECK_IT_SOURCE(__CR1__, __IT__)          ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)
0669
0670 #define IS_SMBUS_OWN_ADDRESS1(ADDRESS1)                         ((ADDRESS1) <= 0x000003FFU)
0671 #define IS_SMBUS_OWN_ADDRESS2(ADDRESS2)                         ((ADDRESS2) <= (uint16_t)0x00FFU)
0672
0673 /**
0674   * @}
0675   */
0676
0677 /* Include SMBUS HAL Extended module */
0678 #include "stm32h7xx_hal_smbus_ex.h"
0679
0680 /* Exported functions --------------------------------------------------------*/
0681 /** @addtogroup SMBUS_Exported_Functions SMBUS Exported Functions
0682   * @{
0683   */
0684
0685 /** @addtogroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions
0686   * @{
0687   */
0688
0689 /* Initialization and de-initialization functions  ****************************/
0690 HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus);
0691 HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus);
0692 void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus);
0693 void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus);
0694 HAL_StatusTypeDef HAL_SMBUS_ConfigAnalogFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t AnalogFilter);
0695 HAL_StatusTypeDef HAL_SMBUS_ConfigDigitalFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t DigitalFilter);
0696
0697 /* Callbacks Register/UnRegister functions  ***********************************/
0698 #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
0699 HAL_StatusTypeDef HAL_SMBUS_RegisterCallback(SMBUS_HandleTypeDef *hsmbus,
0700                                              HAL_SMBUS_CallbackIDTypeDef CallbackID,
0701                                              pSMBUS_CallbackTypeDef pCallback);
0702 HAL_StatusTypeDef HAL_SMBUS_UnRegisterCallback(SMBUS_HandleTypeDef *hsmbus,
0703                                                HAL_SMBUS_CallbackIDTypeDef CallbackID);
0704
0705 HAL_StatusTypeDef HAL_SMBUS_RegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus,
0706                                                  pSMBUS_AddrCallbackTypeDef pCallback);
0707 HAL_StatusTypeDef HAL_SMBUS_UnRegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus);
0708 #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
0709 /**
0710   * @}
0711   */
0712
0713 /** @addtogroup SMBUS_Exported_Functions_Group2 Input and Output operation functions
0714   * @{
0715   */
0716
0717 /* IO operation functions  *****************************************************/
0718 /** @addtogroup Blocking_mode_Polling Blocking mode Polling
0719   * @{
0720   */
0721 /******* Blocking mode: Polling */
0722 HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials,
0723                                           uint32_t Timeout);
0724 /**
0725   * @}
0726   */
0727
0728 /** @addtogroup Non-Blocking_mode_Interrupt Non-Blocking mode Interrupt
0729   * @{
0730   */
0731 /******* Non-Blocking mode: Interrupt */
0732 HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress,
0733                                                uint8_t *pData, uint16_t Size, uint32_t XferOptions);
0734 HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress,
0735                                               uint8_t *pData, uint16_t Size, uint32_t XferOptions);
0736 HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress);
0737 HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size,
0738                                               uint32_t XferOptions);
0739 HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size,
0740                                              uint32_t XferOptions);
0741
0742 HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus);
0743 HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus);
0744 HAL_StatusTypeDef HAL_SMBUS_EnableListen_IT(SMBUS_HandleTypeDef *hsmbus);
0745 HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus);
0746 /**
0747   * @}
0748   */
0749
0750 /** @addtogroup SMBUS_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
0751   * @{
0752   */
0753 /******* SMBUS IRQHandler and Callbacks used in non blocking modes (Interrupt) */
0754 void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus);
0755 void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus);
0756 void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
0757 void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
0758 void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
0759 void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
0760 void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode);
0761 void HAL_SMBUS_ListenCpltCallback(SMBUS_HandleTypeDef *hsmbus);
0762 void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus);
0763
0764 /**
0765   * @}
0766   */
0767
0768 /** @addtogroup SMBUS_Exported_Functions_Group3 Peripheral State and Errors functions
0769   *  @{
0770   */
0771
0772 /* Peripheral State and Errors functions  **************************************************/
0773 uint32_t HAL_SMBUS_GetState(const SMBUS_HandleTypeDef *hsmbus);
0774 uint32_t HAL_SMBUS_GetError(const SMBUS_HandleTypeDef *hsmbus);
0775
0776 /**
0777   * @}
0778   */
0779
0780 /**
0781   * @}
0782   */
0783
0784 /* Private Functions ---------------------------------------------------------*/
0785 /** @defgroup SMBUS_Private_Functions SMBUS Private Functions
0786   * @ingroup RTEMSBSPsARMSTM32H7
0787   * @{
0788   */
0789 /* Private functions are defined in stm32h7xx_hal_smbus.c file */
0790 /**
0791   * @}
0792   */
0793
0794 /**
0795   * @}
0796   */
0797
0798 /**
0799   * @}
0800   */
0801
0802 /**
0803   * @}
0804   */
0805
0806 #ifdef __cplusplus
0807 }
0808 #endif
0809
0810
0811 #endif /* STM32H7xx_HAL_SMBUS_H */