stm32h7/include/stm32h7xx_hal_sdram.h

0001 /**
0002   ******************************************************************************
0003   * @file    stm32h7xx_hal_sdram.h
0004   * @author  MCD Application Team
0005   * @brief   Header file of SDRAM HAL module.
0006   ******************************************************************************
0007   * @attention
0008   *
0009   * Copyright (c) 2017 STMicroelectronics.
0010   * All rights reserved.
0011   *
0012   * This software is licensed under terms that can be found in the LICENSE file
0013   * in the root directory of this software component.
0014   * If no LICENSE file comes with this software, it is provided AS-IS.
0015   *
0016   ******************************************************************************
0017   */
0018
0019 /* Define to prevent recursive inclusion -------------------------------------*/
0020 #ifndef STM32H7xx_HAL_SDRAM_H
0021 #define STM32H7xx_HAL_SDRAM_H
0022
0023 #ifdef __cplusplus
0024 extern "C" {
0025 #endif
0026
0027
0028 /* Includes ------------------------------------------------------------------*/
0029 #include "stm32h7xx_ll_fmc.h"
0030
0031 /** @addtogroup STM32H7xx_HAL_Driver
0032   * @{
0033   */
0034
0035 /** @addtogroup SDRAM
0036   * @{
0037   */
0038
0039 /* Exported typedef ----------------------------------------------------------*/
0040
0041 /** @defgroup SDRAM_Exported_Types SDRAM Exported Types
0042   * @ingroup RTEMSBSPsARMSTM32H7
0043   * @{
0044   */
0045
0046 /**
0047   * @brief  HAL SDRAM State structure definition
0048   */
0049 typedef enum
0050 {
0051   HAL_SDRAM_STATE_RESET             = 0x00U,  /*!< SDRAM not yet initialized or disabled */
0052   HAL_SDRAM_STATE_READY             = 0x01U,  /*!< SDRAM initialized and ready for use   */
0053   HAL_SDRAM_STATE_BUSY              = 0x02U,  /*!< SDRAM internal process is ongoing     */
0054   HAL_SDRAM_STATE_ERROR             = 0x03U,  /*!< SDRAM error state                     */
0055   HAL_SDRAM_STATE_WRITE_PROTECTED   = 0x04U,  /*!< SDRAM device write protected          */
0056   HAL_SDRAM_STATE_PRECHARGED        = 0x05U   /*!< SDRAM device precharged               */
0057
0058 } HAL_SDRAM_StateTypeDef;
0059
0060 /**
0061   * @brief  SDRAM handle Structure definition
0062   */
0063 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
0064 typedef struct __SDRAM_HandleTypeDef
0065 #else
0066 typedef struct
0067 #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS  */
0068 {
0069   FMC_SDRAM_TypeDef             *Instance;  /*!< Register base address                 */
0070
0071   FMC_SDRAM_InitTypeDef         Init;       /*!< SDRAM device configuration parameters */
0072
0073   __IO HAL_SDRAM_StateTypeDef   State;      /*!< SDRAM access state                    */
0074
0075   HAL_LockTypeDef               Lock;       /*!< SDRAM locking object                  */
0076
0077   MDMA_HandleTypeDef             *hmdma;      /*!< Pointer DMA handler                   */
0078
0079 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
0080   void (* MspInitCallback)(struct __SDRAM_HandleTypeDef *hsdram);               /*!< SDRAM Msp Init callback              */
0081   void (* MspDeInitCallback)(struct __SDRAM_HandleTypeDef *hsdram);             /*!< SDRAM Msp DeInit callback            */
0082   void (* RefreshErrorCallback)(struct __SDRAM_HandleTypeDef *hsdram);          /*!< SDRAM Refresh Error callback         */
0083   void (* DmaXferCpltCallback)(MDMA_HandleTypeDef *hmdma);                        /*!< SDRAM DMA Xfer Complete callback     */
0084   void (* DmaXferErrorCallback)(MDMA_HandleTypeDef *hmdma);                       /*!< SDRAM DMA Xfer Error callback        */
0085 #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
0086 } SDRAM_HandleTypeDef;
0087
0088 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
0089 /**
0090   * @brief  HAL SDRAM Callback ID enumeration definition
0091   */
0092 typedef enum
0093 {
0094   HAL_SDRAM_MSP_INIT_CB_ID       = 0x00U,  /*!< SDRAM MspInit Callback ID           */
0095   HAL_SDRAM_MSP_DEINIT_CB_ID     = 0x01U,  /*!< SDRAM MspDeInit Callback ID         */
0096   HAL_SDRAM_REFRESH_ERR_CB_ID    = 0x02U,  /*!< SDRAM Refresh Error Callback ID     */
0097   HAL_SDRAM_DMA_XFER_CPLT_CB_ID  = 0x03U,  /*!< SDRAM DMA Xfer Complete Callback ID */
0098   HAL_SDRAM_DMA_XFER_ERR_CB_ID   = 0x04U   /*!< SDRAM DMA Xfer Error Callback ID    */
0099 } HAL_SDRAM_CallbackIDTypeDef;
0100
0101 /**
0102   * @brief  HAL SDRAM Callback pointer definition
0103   */
0104 typedef void (*pSDRAM_CallbackTypeDef)(SDRAM_HandleTypeDef *hsdram);
0105 typedef void (*pSDRAM_DmaCallbackTypeDef)(MDMA_HandleTypeDef *hmdma);
0106 #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
0107 /**
0108   * @}
0109   */
0110
0111 /* Exported constants --------------------------------------------------------*/
0112 /* Exported macro ------------------------------------------------------------*/
0113
0114 /** @defgroup SDRAM_Exported_Macros SDRAM Exported Macros
0115   * @ingroup RTEMSBSPsARMSTM32H7
0116   * @{
0117   */
0118
0119 /** @brief Reset SDRAM handle state
0120   * @param  __HANDLE__ specifies the SDRAM handle.
0121   * @retval None
0122   */
0123 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
0124 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__)        do {                                               \
0125                                                                (__HANDLE__)->State = HAL_SDRAM_STATE_RESET;  \
0126                                                                (__HANDLE__)->MspInitCallback = NULL;         \
0127                                                                (__HANDLE__)->MspDeInitCallback = NULL;       \
0128                                                              } while(0)
0129 #else
0130 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDRAM_STATE_RESET)
0131 #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
0132 /**
0133   * @}
0134   */
0135
0136 /* Exported functions --------------------------------------------------------*/
0137
0138 /** @addtogroup SDRAM_Exported_Functions SDRAM Exported Functions
0139   * @{
0140   */
0141
0142 /** @addtogroup SDRAM_Exported_Functions_Group1
0143   * @{
0144   */
0145
0146 /* Initialization/de-initialization functions *********************************/
0147 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing);
0148 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram);
0149 void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram);
0150 void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram);
0151
0152 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram);
0153 void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram);
0154 void HAL_SDRAM_DMA_XferCpltCallback(MDMA_HandleTypeDef *hmdma);
0155 void HAL_SDRAM_DMA_XferErrorCallback(MDMA_HandleTypeDef *hmdma);
0156
0157 /**
0158   * @}
0159   */
0160
0161 /** @addtogroup SDRAM_Exported_Functions_Group2
0162   * @{
0163   */
0164 /* I/O operation functions ****************************************************/
0165 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer,
0166                                     uint32_t BufferSize);
0167 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer,
0168                                      uint32_t BufferSize);
0169 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer,
0170                                      uint32_t BufferSize);
0171 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer,
0172                                       uint32_t BufferSize);
0173 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer,
0174                                      uint32_t BufferSize);
0175 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer,
0176                                       uint32_t BufferSize);
0177
0178 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer,
0179                                      uint32_t BufferSize);
0180 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer,
0181                                       uint32_t BufferSize);
0182
0183 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
0184 /* SDRAM callback registering/unregistering */
0185 HAL_StatusTypeDef HAL_SDRAM_RegisterCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId,
0186                                              pSDRAM_CallbackTypeDef pCallback);
0187 HAL_StatusTypeDef HAL_SDRAM_UnRegisterCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId);
0188 HAL_StatusTypeDef HAL_SDRAM_RegisterDmaCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId,
0189                                                 pSDRAM_DmaCallbackTypeDef pCallback);
0190 #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
0191
0192 /**
0193   * @}
0194   */
0195
0196 /** @addtogroup SDRAM_Exported_Functions_Group3
0197   * @{
0198   */
0199 /* SDRAM Control functions  *****************************************************/
0200 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram);
0201 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram);
0202 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command,
0203                                         uint32_t Timeout);
0204 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate);
0205 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber);
0206 uint32_t          HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram);
0207
0208 /**
0209   * @}
0210   */
0211
0212 /** @addtogroup SDRAM_Exported_Functions_Group4
0213   * @{
0214   */
0215 /* SDRAM State functions ********************************************************/
0216 HAL_SDRAM_StateTypeDef  HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram);
0217 /**
0218   * @}
0219   */
0220
0221 /**
0222   * @}
0223   */
0224
0225 /**
0226   * @}
0227   */
0228
0229 /**
0230   * @}
0231   */
0232
0233
0234 #ifdef __cplusplus
0235 }
0236 #endif
0237
0238 #endif /* STM32H7xx_HAL_SDRAM_H */