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File indexing completed on 2025-05-11 08:23:36
0001 /** 0002 ****************************************************************************** 0003 * @file stm32h7xx_hal_sd.h 0004 * @author MCD Application Team 0005 * @brief Header file of SD HAL module. 0006 ****************************************************************************** 0007 * @attention 0008 * 0009 * Copyright (c) 2017 STMicroelectronics. 0010 * All rights reserved. 0011 * 0012 * This software is licensed under terms that can be found in the LICENSE file 0013 * in the root directory of this software component. 0014 * If no LICENSE file comes with this software, it is provided AS-IS. 0015 * 0016 ****************************************************************************** 0017 */ 0018 0019 /* Define to prevent recursive inclusion -------------------------------------*/ 0020 #ifndef STM32H7xx_HAL_SD_H 0021 #define STM32H7xx_HAL_SD_H 0022 0023 #ifdef __cplusplus 0024 extern "C" { 0025 #endif 0026 0027 /* Includes ------------------------------------------------------------------*/ 0028 #include "stm32h7xx_ll_sdmmc.h" 0029 #if defined (DLYB_SDMMC1) || defined (DLYB_SDMMC2) || defined (DLYB_SDMMC3) 0030 #include "stm32h7xx_ll_delayblock.h" 0031 #endif /* (DLYB_SDMMC1) || (DLYB_SDMMC2) */ 0032 0033 /** @addtogroup STM32H7xx_HAL_Driver 0034 * @{ 0035 */ 0036 0037 /** @defgroup SD SD 0038 * @ingroup RTEMSBSPsARMSTM32H7 0039 * @brief SD HAL module driver 0040 * @{ 0041 */ 0042 0043 /* Exported types ------------------------------------------------------------*/ 0044 /** @defgroup SD_Exported_Types SD Exported Types 0045 * @ingroup RTEMSBSPsARMSTM32H7 0046 * @{ 0047 */ 0048 0049 /** @defgroup SD_Exported_Types_Group1 SD State enumeration structure 0050 * @ingroup RTEMSBSPsARMSTM32H7 0051 * @{ 0052 */ 0053 typedef enum 0054 { 0055 HAL_SD_STATE_RESET = ((uint32_t)0x00000000U), /*!< SD not yet initialized or disabled */ 0056 HAL_SD_STATE_READY = ((uint32_t)0x00000001U), /*!< SD initialized and ready for use */ 0057 HAL_SD_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< SD Timeout state */ 0058 HAL_SD_STATE_BUSY = ((uint32_t)0x00000003U), /*!< SD process ongoing */ 0059 HAL_SD_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< SD Programming State */ 0060 HAL_SD_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< SD Receiving State */ 0061 HAL_SD_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< SD Transfer State */ 0062 HAL_SD_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< SD is in error state */ 0063 } HAL_SD_StateTypeDef; 0064 /** 0065 * @} 0066 */ 0067 0068 /** @defgroup SD_Exported_Types_Group2 SD Card State enumeration structure 0069 * @ingroup RTEMSBSPsARMSTM32H7 0070 * @{ 0071 */ 0072 typedef uint32_t HAL_SD_CardStateTypeDef; 0073 0074 #define HAL_SD_CARD_READY 0x00000001U /*!< Card state is ready */ 0075 #define HAL_SD_CARD_IDENTIFICATION 0x00000002U /*!< Card is in identification state */ 0076 #define HAL_SD_CARD_STANDBY 0x00000003U /*!< Card is in standby state */ 0077 #define HAL_SD_CARD_TRANSFER 0x00000004U /*!< Card is in transfer state */ 0078 #define HAL_SD_CARD_SENDING 0x00000005U /*!< Card is sending an operation */ 0079 #define HAL_SD_CARD_RECEIVING 0x00000006U /*!< Card is receiving operation information */ 0080 #define HAL_SD_CARD_PROGRAMMING 0x00000007U /*!< Card is in programming state */ 0081 #define HAL_SD_CARD_DISCONNECTED 0x00000008U /*!< Card is disconnected */ 0082 #define HAL_SD_CARD_ERROR 0x000000FFU /*!< Card response Error */ 0083 /** 0084 * @} 0085 */ 0086 0087 /** @defgroup SD_Exported_Types_Group3 SD Handle Structure definition 0088 * @ingroup RTEMSBSPsARMSTM32H7 0089 * @{ 0090 */ 0091 #define SD_InitTypeDef SDMMC_InitTypeDef 0092 #define SD_TypeDef SDMMC_TypeDef 0093 0094 /** 0095 * @brief SD Card Information Structure definition 0096 */ 0097 typedef struct 0098 { 0099 uint32_t CardType; /*!< Specifies the card Type */ 0100 0101 uint32_t CardVersion; /*!< Specifies the card version */ 0102 0103 uint32_t Class; /*!< Specifies the class of the card class */ 0104 0105 uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */ 0106 0107 uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */ 0108 0109 uint32_t BlockSize; /*!< Specifies one block size in bytes */ 0110 0111 uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */ 0112 0113 uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */ 0114 0115 uint32_t CardSpeed; /*!< Specifies the card Speed */ 0116 0117 } HAL_SD_CardInfoTypeDef; 0118 0119 /** 0120 * @brief SD handle Structure definition 0121 */ 0122 #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) 0123 typedef struct __SD_HandleTypeDef 0124 #else 0125 typedef struct 0126 #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ 0127 { 0128 SD_TypeDef *Instance; /*!< SD registers base address */ 0129 0130 SD_InitTypeDef Init; /*!< SD required parameters */ 0131 0132 HAL_LockTypeDef Lock; /*!< SD locking object */ 0133 0134 const uint8_t *pTxBuffPtr; /*!< Pointer to SD Tx transfer Buffer */ 0135 0136 uint32_t TxXferSize; /*!< SD Tx Transfer size */ 0137 0138 uint8_t *pRxBuffPtr; /*!< Pointer to SD Rx transfer Buffer */ 0139 0140 uint32_t RxXferSize; /*!< SD Rx Transfer size */ 0141 0142 __IO uint32_t Context; /*!< SD transfer context */ 0143 0144 __IO HAL_SD_StateTypeDef State; /*!< SD card State */ 0145 0146 __IO uint32_t ErrorCode; /*!< SD Card Error codes */ 0147 0148 HAL_SD_CardInfoTypeDef SdCard; /*!< SD Card information */ 0149 0150 uint32_t CSD[4]; /*!< SD card specific data table */ 0151 0152 uint32_t CID[4]; /*!< SD card identification number table */ 0153 0154 #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) 0155 void (* TxCpltCallback)(struct __SD_HandleTypeDef *hsd); 0156 void (* RxCpltCallback)(struct __SD_HandleTypeDef *hsd); 0157 void (* ErrorCallback)(struct __SD_HandleTypeDef *hsd); 0158 void (* AbortCpltCallback)(struct __SD_HandleTypeDef *hsd); 0159 void (* Read_DMADblBuf0CpltCallback)(struct __SD_HandleTypeDef *hsd); 0160 void (* Read_DMADblBuf1CpltCallback)(struct __SD_HandleTypeDef *hsd); 0161 void (* Write_DMADblBuf0CpltCallback)(struct __SD_HandleTypeDef *hsd); 0162 void (* Write_DMADblBuf1CpltCallback)(struct __SD_HandleTypeDef *hsd); 0163 #if (USE_SD_TRANSCEIVER != 0U) 0164 void (* DriveTransceiver_1_8V_Callback)(FlagStatus status); 0165 #endif /* USE_SD_TRANSCEIVER */ 0166 0167 void (* MspInitCallback)(struct __SD_HandleTypeDef *hsd); 0168 void (* MspDeInitCallback)(struct __SD_HandleTypeDef *hsd); 0169 #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ 0170 } SD_HandleTypeDef; 0171 0172 /** 0173 * @} 0174 */ 0175 0176 /** @defgroup SD_Exported_Types_Group4 Card Specific Data: CSD Register 0177 * @ingroup RTEMSBSPsARMSTM32H7 0178 * @{ 0179 */ 0180 typedef struct 0181 { 0182 __IO uint8_t CSDStruct; /*!< CSD structure */ 0183 __IO uint8_t SysSpecVersion; /*!< System specification version */ 0184 __IO uint8_t Reserved1; /*!< Reserved */ 0185 __IO uint8_t TAAC; /*!< Data read access time 1 */ 0186 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */ 0187 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ 0188 __IO uint16_t CardComdClasses; /*!< Card command classes */ 0189 __IO uint8_t RdBlockLen; /*!< Max. read data block length */ 0190 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ 0191 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */ 0192 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */ 0193 __IO uint8_t DSRImpl; /*!< DSR implemented */ 0194 __IO uint8_t Reserved2; /*!< Reserved */ 0195 __IO uint32_t DeviceSize; /*!< Device Size */ 0196 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ 0197 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ 0198 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ 0199 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ 0200 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */ 0201 __IO uint8_t EraseGrSize; /*!< Erase group size */ 0202 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */ 0203 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */ 0204 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */ 0205 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */ 0206 __IO uint8_t WrSpeedFact; /*!< Write speed factor */ 0207 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ 0208 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ 0209 __IO uint8_t Reserved3; /*!< Reserved */ 0210 __IO uint8_t ContentProtectAppli; /*!< Content protection application */ 0211 __IO uint8_t FileFormatGroup; /*!< File format group */ 0212 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ 0213 __IO uint8_t PermWrProtect; /*!< Permanent write protection */ 0214 __IO uint8_t TempWrProtect; /*!< Temporary write protection */ 0215 __IO uint8_t FileFormat; /*!< File format */ 0216 __IO uint8_t ECC; /*!< ECC code */ 0217 __IO uint8_t CSD_CRC; /*!< CSD CRC */ 0218 __IO uint8_t Reserved4; /*!< Always 1 */ 0219 } HAL_SD_CardCSDTypeDef; 0220 /** 0221 * @} 0222 */ 0223 0224 /** @defgroup SD_Exported_Types_Group5 Card Identification Data: CID Register 0225 * @ingroup RTEMSBSPsARMSTM32H7 0226 * @{ 0227 */ 0228 typedef struct 0229 { 0230 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */ 0231 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */ 0232 __IO uint32_t ProdName1; /*!< Product Name part1 */ 0233 __IO uint8_t ProdName2; /*!< Product Name part2 */ 0234 __IO uint8_t ProdRev; /*!< Product Revision */ 0235 __IO uint32_t ProdSN; /*!< Product Serial Number */ 0236 __IO uint8_t Reserved1; /*!< Reserved1 */ 0237 __IO uint16_t ManufactDate; /*!< Manufacturing Date */ 0238 __IO uint8_t CID_CRC; /*!< CID CRC */ 0239 __IO uint8_t Reserved2; /*!< Always 1 */ 0240 0241 } HAL_SD_CardCIDTypeDef; 0242 /** 0243 * @} 0244 */ 0245 0246 /** @defgroup SD_Exported_Types_Group6 SD Card Status returned by ACMD13 0247 * @ingroup RTEMSBSPsARMSTM32H7 0248 * @{ 0249 */ 0250 typedef struct 0251 { 0252 __IO uint8_t DataBusWidth; /*!< Shows the currently defined data bus width */ 0253 __IO uint8_t SecuredMode; /*!< Card is in secured mode of operation */ 0254 __IO uint16_t CardType; /*!< Carries information about card type */ 0255 __IO uint32_t ProtectedAreaSize; /*!< Carries information about the capacity of protected area */ 0256 __IO uint8_t SpeedClass; /*!< Carries information about the speed class of the card */ 0257 __IO uint8_t PerformanceMove; /*!< Carries information about the card's performance move */ 0258 __IO uint8_t AllocationUnitSize; /*!< Carries information about the card's allocation unit size */ 0259 __IO uint16_t EraseSize; /*!< Determines the number of AUs to be erased in one operation */ 0260 __IO uint8_t EraseTimeout; /*!< Determines the timeout for any number of AU erase */ 0261 __IO uint8_t EraseOffset; /*!< Carries information about the erase offset */ 0262 __IO uint8_t UhsSpeedGrade; /*!< Carries information about the speed grade of UHS card */ 0263 __IO uint8_t UhsAllocationUnitSize; /*!< Carries information about the UHS card's allocation unit size */ 0264 __IO uint8_t VideoSpeedClass; /*!< Carries information about the Video Speed Class of UHS card */ 0265 } HAL_SD_CardStatusTypeDef; 0266 /** 0267 * @} 0268 */ 0269 0270 #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) 0271 /** @defgroup SD_Exported_Types_Group7 SD Callback ID enumeration definition 0272 * @ingroup RTEMSBSPsARMSTM32H7 0273 * @{ 0274 */ 0275 typedef enum 0276 { 0277 HAL_SD_TX_CPLT_CB_ID = 0x00U, /*!< SD Tx Complete Callback ID */ 0278 HAL_SD_RX_CPLT_CB_ID = 0x01U, /*!< SD Rx Complete Callback ID */ 0279 HAL_SD_ERROR_CB_ID = 0x02U, /*!< SD Error Callback ID */ 0280 HAL_SD_ABORT_CB_ID = 0x03U, /*!< SD Abort Callback ID */ 0281 HAL_SD_READ_DMA_DBL_BUF0_CPLT_CB_ID = 0x04U, /*!< SD Rx DMA Double Buffer 0 Complete Callback ID */ 0282 HAL_SD_READ_DMA_DBL_BUF1_CPLT_CB_ID = 0x05U, /*!< SD Rx DMA Double Buffer 1 Complete Callback ID */ 0283 HAL_SD_WRITE_DMA_DBL_BUF0_CPLT_CB_ID = 0x06U, /*!< SD Tx DMA Double Buffer 0 Complete Callback ID */ 0284 HAL_SD_WRITE_DMA_DBL_BUF1_CPLT_CB_ID = 0x07U, /*!< SD Tx DMA Double Buffer 1 Complete Callback ID */ 0285 0286 HAL_SD_MSP_INIT_CB_ID = 0x10U, /*!< SD MspInit Callback ID */ 0287 HAL_SD_MSP_DEINIT_CB_ID = 0x11U /*!< SD MspDeInit Callback ID */ 0288 } HAL_SD_CallbackIDTypeDef; 0289 /** 0290 * @} 0291 */ 0292 0293 /** @defgroup SD_Exported_Types_Group8 SD Callback pointer definition 0294 * @ingroup RTEMSBSPsARMSTM32H7 0295 * @{ 0296 */ 0297 typedef void (*pSD_CallbackTypeDef)(SD_HandleTypeDef *hsd); 0298 #if (USE_SD_TRANSCEIVER != 0U) 0299 typedef void (*pSD_TransceiverCallbackTypeDef)(FlagStatus status); 0300 #endif /* USE_SD_TRANSCEIVER */ 0301 /** 0302 * @} 0303 */ 0304 #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ 0305 /** 0306 * @} 0307 */ 0308 0309 /* Exported constants --------------------------------------------------------*/ 0310 /** @defgroup SD_Exported_Constants SD Exported Constants 0311 * @ingroup RTEMSBSPsARMSTM32H7 0312 * @{ 0313 */ 0314 0315 #define BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */ 0316 0317 /** @defgroup SD_Exported_Constansts_Group1 SD Error status enumeration Structure definition 0318 * @ingroup RTEMSBSPsARMSTM32H7 0319 * @{ 0320 */ 0321 #define HAL_SD_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ 0322 #define HAL_SD_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */ 0323 #define HAL_SD_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */ 0324 #define HAL_SD_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */ 0325 #define HAL_SD_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */ 0326 #define HAL_SD_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */ 0327 #define HAL_SD_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */ 0328 #define HAL_SD_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */ 0329 #define HAL_SD_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the */ 0330 /*!< number of transferred bytes does not match the block length */ 0331 #define HAL_SD_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */ 0332 #define HAL_SD_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */ 0333 #define HAL_SD_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */ 0334 #define HAL_SD_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock */ 0335 /*!< command or if there was an attempt to access a locked card */ 0336 #define HAL_SD_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */ 0337 #define HAL_SD_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */ 0338 #define HAL_SD_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */ 0339 #define HAL_SD_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */ 0340 #define HAL_SD_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */ 0341 #define HAL_SD_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */ 0342 #define HAL_SD_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */ 0343 #define HAL_SD_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */ 0344 #define HAL_SD_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */ 0345 #define HAL_SD_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */ 0346 #define HAL_SD_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out */ 0347 /*!< of erase sequence command was received */ 0348 #define HAL_SD_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */ 0349 #define HAL_SD_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */ 0350 #define HAL_SD_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */ 0351 #define HAL_SD_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */ 0352 #define HAL_SD_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */ 0353 #define HAL_SD_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */ 0354 #define HAL_SD_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */ 0355 #define HAL_SD_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */ 0356 #define HAL_SD_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ 0357 0358 #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) 0359 #define HAL_SD_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */ 0360 #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ 0361 /** 0362 * @} 0363 */ 0364 0365 /** @defgroup SD_Exported_Constansts_Group2 SD context enumeration 0366 * @ingroup RTEMSBSPsARMSTM32H7 0367 * @{ 0368 */ 0369 #define SD_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */ 0370 #define SD_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */ 0371 #define SD_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */ 0372 #define SD_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */ 0373 #define SD_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */ 0374 #define SD_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */ 0375 #define SD_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */ 0376 0377 /** 0378 * @} 0379 */ 0380 0381 /** @defgroup SD_Exported_Constansts_Group3 SD Supported Memory Cards 0382 * @ingroup RTEMSBSPsARMSTM32H7 0383 * @{ 0384 */ 0385 #define CARD_NORMAL_SPEED ((uint32_t)0x00000000U) /*!< Normal Speed Card <12.5Mo/s , Spec Version 1.01 */ 0386 #define CARD_HIGH_SPEED ((uint32_t)0x00000100U) /*!< High Speed Card <25Mo/s , Spec version 2.00 */ 0387 #define CARD_ULTRA_HIGH_SPEED ((uint32_t)0x00000200U) /*!< UHS-I SD Card <50Mo/s for SDR50, DDR5 Cards 0388 and <104Mo/s for SDR104, Spec version 3.01 */ 0389 0390 #define CARD_SDSC ((uint32_t)0x00000000U) /*!< SD Standard Capacity <2Go */ 0391 #define CARD_SDHC_SDXC ((uint32_t)0x00000001U) /*!< SD High Capacity <32Go, SD Extended Capacity <2To */ 0392 #define CARD_SECURED ((uint32_t)0x00000003U) 0393 0394 /** 0395 * @} 0396 */ 0397 0398 /** @defgroup SD_Exported_Constansts_Group4 SD Supported Version 0399 * @ingroup RTEMSBSPsARMSTM32H7 0400 * @{ 0401 */ 0402 #define CARD_V1_X ((uint32_t)0x00000000U) 0403 #define CARD_V2_X ((uint32_t)0x00000001U) 0404 /** 0405 * @} 0406 */ 0407 0408 /** 0409 * @} 0410 */ 0411 0412 /* Exported macro ------------------------------------------------------------*/ 0413 /** @defgroup SD_Exported_macros SD Exported Macros 0414 * @ingroup RTEMSBSPsARMSTM32H7 0415 * @brief macros to handle interrupts and specific clock configurations 0416 * @{ 0417 */ 0418 /** @brief Reset SD handle state. 0419 * @param __HANDLE__ SD Handle. 0420 * @retval None 0421 */ 0422 #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) 0423 #define __HAL_SD_RESET_HANDLE_STATE(__HANDLE__) do { \ 0424 (__HANDLE__)->State = HAL_SD_STATE_RESET; \ 0425 (__HANDLE__)->MspInitCallback = NULL; \ 0426 (__HANDLE__)->MspDeInitCallback = NULL; \ 0427 } while(0) 0428 #else 0429 #define __HAL_SD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SD_STATE_RESET) 0430 #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ 0431 0432 /** 0433 * @brief Enable the SD device interrupt. 0434 * @param __HANDLE__ SD Handle. 0435 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled. 0436 * This parameter can be one or a combination of the following values: 0437 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 0438 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 0439 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 0440 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 0441 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 0442 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 0443 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 0444 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 0445 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 0446 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 0447 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 0448 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 0449 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 0450 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 0451 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 0452 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 0453 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 0454 * @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt 0455 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 0456 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 0457 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 0458 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 0459 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 0460 * @retval None 0461 */ 0462 #define __HAL_SD_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 0463 0464 /** 0465 * @brief Disable the SD device interrupt. 0466 * @param __HANDLE__ SD Handle. 0467 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled. 0468 * This parameter can be one or a combination of the following values: 0469 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 0470 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 0471 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 0472 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 0473 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 0474 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 0475 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 0476 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 0477 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 0478 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 0479 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 0480 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 0481 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 0482 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 0483 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 0484 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 0485 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 0486 * @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt 0487 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 0488 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 0489 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 0490 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 0491 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 0492 * @retval None 0493 */ 0494 #define __HAL_SD_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 0495 0496 /** 0497 * @brief Check whether the specified SD flag is set or not. 0498 * @param __HANDLE__ SD Handle. 0499 * @param __FLAG__ specifies the flag to check. 0500 * This parameter can be one of the following values: 0501 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) 0502 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) 0503 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout 0504 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout 0505 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error 0506 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error 0507 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) 0508 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) 0509 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) 0510 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold 0511 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) 0512 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 0513 * @arg SDMMC_FLAG_DPSMACT: Data path state machine active 0514 * @arg SDMMC_FLAG_CPSMACT: Command path state machine active 0515 * @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty 0516 * @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full 0517 * @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full 0518 * @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full 0519 * @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty 0520 * @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty 0521 * @arg SDMMC_FLAG_BUSYD0: Inverted value of SDMMC_D0 line (Busy) 0522 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected 0523 * @arg SDMMC_FLAG_SDIOIT: SDIO interrupt received 0524 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received 0525 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout 0526 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion 0527 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure 0528 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error 0529 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete 0530 * @retval The new state of SD FLAG (SET or RESET). 0531 */ 0532 #define __HAL_SD_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) 0533 0534 /** 0535 * @brief Clear the SD's pending flags. 0536 * @param __HANDLE__ SD Handle. 0537 * @param __FLAG__ specifies the flag to clear. 0538 * This parameter can be one or a combination of the following values: 0539 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) 0540 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) 0541 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout 0542 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout 0543 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error 0544 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error 0545 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) 0546 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) 0547 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) 0548 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold 0549 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) 0550 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 0551 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected 0552 * @arg SDMMC_FLAG_SDIOIT: SDIO interrupt received 0553 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received 0554 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout 0555 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion 0556 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure 0557 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error 0558 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete 0559 * @retval None 0560 */ 0561 #define __HAL_SD_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) 0562 0563 /** 0564 * @brief Check whether the specified SD interrupt has occurred or not. 0565 * @param __HANDLE__ SD Handle. 0566 * @param __INTERRUPT__ specifies the SDMMC interrupt source to check. 0567 * This parameter can be one of the following values: 0568 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 0569 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 0570 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 0571 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 0572 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 0573 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 0574 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 0575 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 0576 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 0577 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 0578 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 0579 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 0580 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 0581 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 0582 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 0583 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 0584 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 0585 * @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt 0586 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 0587 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 0588 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 0589 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 0590 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 0591 * @retval The new state of SD IT (SET or RESET). 0592 */ 0593 #define __HAL_SD_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 0594 0595 /** 0596 * @brief Clear the SD's interrupt pending bits. 0597 * @param __HANDLE__ SD Handle. 0598 * @param __INTERRUPT__ specifies the interrupt pending bit to clear. 0599 * This parameter can be one or a combination of the following values: 0600 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 0601 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 0602 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 0603 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 0604 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 0605 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 0606 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 0607 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 0608 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 0609 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 0610 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 0611 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 0612 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 0613 * @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt 0614 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 0615 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 0616 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 0617 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 0618 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 0619 * @retval None 0620 */ 0621 #define __HAL_SD_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 0622 0623 /** 0624 * @} 0625 */ 0626 0627 /* Include SD HAL Extension module */ 0628 #include "stm32h7xx_hal_sd_ex.h" 0629 0630 /* Exported functions --------------------------------------------------------*/ 0631 /** @defgroup SD_Exported_Functions SD Exported Functions 0632 * @ingroup RTEMSBSPsARMSTM32H7 0633 * @{ 0634 */ 0635 0636 /** @defgroup SD_Exported_Functions_Group1 Initialization and de-initialization functions 0637 * @ingroup RTEMSBSPsARMSTM32H7 0638 * @{ 0639 */ 0640 HAL_StatusTypeDef HAL_SD_Init(SD_HandleTypeDef *hsd); 0641 HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd); 0642 HAL_StatusTypeDef HAL_SD_DeInit(SD_HandleTypeDef *hsd); 0643 void HAL_SD_MspInit(SD_HandleTypeDef *hsd); 0644 void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd); 0645 /** 0646 * @} 0647 */ 0648 0649 /** @defgroup SD_Exported_Functions_Group2 Input and Output operation functions 0650 * @ingroup RTEMSBSPsARMSTM32H7 0651 * @{ 0652 */ 0653 /* Blocking mode: Polling */ 0654 HAL_StatusTypeDef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, 0655 uint32_t Timeout); 0656 HAL_StatusTypeDef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, const uint8_t *pData, uint32_t BlockAdd, 0657 uint32_t NumberOfBlocks, uint32_t Timeout); 0658 HAL_StatusTypeDef HAL_SD_Erase(SD_HandleTypeDef *hsd, uint32_t BlockStartAdd, uint32_t BlockEndAdd); 0659 /* Non-Blocking mode: IT */ 0660 HAL_StatusTypeDef HAL_SD_ReadBlocks_IT(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, 0661 uint32_t NumberOfBlocks); 0662 HAL_StatusTypeDef HAL_SD_WriteBlocks_IT(SD_HandleTypeDef *hsd, const uint8_t *pData, uint32_t BlockAdd, 0663 uint32_t NumberOfBlocks); 0664 /* Non-Blocking mode: DMA */ 0665 HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, 0666 uint32_t NumberOfBlocks); 0667 HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, const uint8_t *pData, uint32_t BlockAdd, 0668 uint32_t NumberOfBlocks); 0669 0670 void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd); 0671 0672 /* Callback in non blocking modes (DMA) */ 0673 void HAL_SD_TxCpltCallback(SD_HandleTypeDef *hsd); 0674 void HAL_SD_RxCpltCallback(SD_HandleTypeDef *hsd); 0675 void HAL_SD_ErrorCallback(SD_HandleTypeDef *hsd); 0676 void HAL_SD_AbortCallback(SD_HandleTypeDef *hsd); 0677 0678 #if (USE_SD_TRANSCEIVER != 0U) 0679 /* Callback to switch in 1.8V mode */ 0680 void HAL_SD_DriveTransceiver_1_8V_Callback(FlagStatus status); 0681 #endif /* USE_SD_TRANSCEIVER */ 0682 0683 #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) 0684 /* SD callback registering/unregistering */ 0685 HAL_StatusTypeDef HAL_SD_RegisterCallback(SD_HandleTypeDef *hsd, HAL_SD_CallbackIDTypeDef CallbackID, 0686 pSD_CallbackTypeDef pCallback); 0687 HAL_StatusTypeDef HAL_SD_UnRegisterCallback(SD_HandleTypeDef *hsd, HAL_SD_CallbackIDTypeDef CallbackID); 0688 0689 #if (USE_SD_TRANSCEIVER != 0U) 0690 HAL_StatusTypeDef HAL_SD_RegisterTransceiverCallback(SD_HandleTypeDef *hsd, pSD_TransceiverCallbackTypeDef pCallback); 0691 HAL_StatusTypeDef HAL_SD_UnRegisterTransceiverCallback(SD_HandleTypeDef *hsd); 0692 #endif /* USE_SD_TRANSCEIVER */ 0693 #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ 0694 0695 /** 0696 * @} 0697 */ 0698 0699 /** @defgroup SD_Exported_Functions_Group3 Peripheral Control functions 0700 * @ingroup RTEMSBSPsARMSTM32H7 0701 * @{ 0702 */ 0703 HAL_StatusTypeDef HAL_SD_ConfigWideBusOperation(SD_HandleTypeDef *hsd, uint32_t WideMode); 0704 HAL_StatusTypeDef HAL_SD_ConfigSpeedBusOperation(SD_HandleTypeDef *hsd, uint32_t SpeedMode); 0705 /** 0706 * @} 0707 */ 0708 0709 /** @defgroup SD_Exported_Functions_Group4 SD card related functions 0710 * @ingroup RTEMSBSPsARMSTM32H7 0711 * @{ 0712 */ 0713 HAL_SD_CardStateTypeDef HAL_SD_GetCardState(SD_HandleTypeDef *hsd); 0714 HAL_StatusTypeDef HAL_SD_GetCardCID(SD_HandleTypeDef *hsd, HAL_SD_CardCIDTypeDef *pCID); 0715 HAL_StatusTypeDef HAL_SD_GetCardCSD(SD_HandleTypeDef *hsd, HAL_SD_CardCSDTypeDef *pCSD); 0716 HAL_StatusTypeDef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypeDef *pStatus); 0717 HAL_StatusTypeDef HAL_SD_GetCardInfo(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypeDef *pCardInfo); 0718 /** 0719 * @} 0720 */ 0721 0722 /** @defgroup SD_Exported_Functions_Group5 Peripheral State and Errors functions 0723 * @ingroup RTEMSBSPsARMSTM32H7 0724 * @{ 0725 */ 0726 HAL_SD_StateTypeDef HAL_SD_GetState(SD_HandleTypeDef *hsd); 0727 uint32_t HAL_SD_GetError(SD_HandleTypeDef *hsd); 0728 /** 0729 * @} 0730 */ 0731 0732 /** @defgroup SD_Exported_Functions_Group6 Perioheral Abort management 0733 * @ingroup RTEMSBSPsARMSTM32H7 0734 * @{ 0735 */ 0736 HAL_StatusTypeDef HAL_SD_Abort(SD_HandleTypeDef *hsd); 0737 HAL_StatusTypeDef HAL_SD_Abort_IT(SD_HandleTypeDef *hsd); 0738 /** 0739 * @} 0740 */ 0741 0742 /* Private types -------------------------------------------------------------*/ 0743 /** @defgroup SD_Private_Types SD Private Types 0744 * @ingroup RTEMSBSPsARMSTM32H7 0745 * @{ 0746 */ 0747 0748 /** 0749 * @} 0750 */ 0751 0752 /* Private defines -----------------------------------------------------------*/ 0753 /** @defgroup SD_Private_Defines SD Private Defines 0754 * @ingroup RTEMSBSPsARMSTM32H7 0755 * @{ 0756 */ 0757 0758 /** 0759 * @} 0760 */ 0761 0762 /* Private variables ---------------------------------------------------------*/ 0763 /** @defgroup SD_Private_Variables SD Private Variables 0764 * @ingroup RTEMSBSPsARMSTM32H7 0765 * @{ 0766 */ 0767 0768 /** 0769 * @} 0770 */ 0771 0772 /* Private constants ---------------------------------------------------------*/ 0773 /** @defgroup SD_Private_Constants SD Private Constants 0774 * @ingroup RTEMSBSPsARMSTM32H7 0775 * @{ 0776 */ 0777 0778 /** 0779 * @} 0780 */ 0781 0782 /* Private macros ------------------------------------------------------------*/ 0783 /** @defgroup SD_Private_Macros SD Private Macros 0784 * @ingroup RTEMSBSPsARMSTM32H7 0785 * @{ 0786 */ 0787 0788 /** 0789 * @} 0790 */ 0791 0792 /* Private functions prototypes ----------------------------------------------*/ 0793 /** @defgroup SD_Private_Functions_Prototypes SD Private Functions Prototypes 0794 * @ingroup RTEMSBSPsARMSTM32H7 0795 * @{ 0796 */ 0797 0798 /** 0799 * @} 0800 */ 0801 0802 /* Private functions ---------------------------------------------------------*/ 0803 /** @defgroup SD_Private_Functions SD Private Functions 0804 * @ingroup RTEMSBSPsARMSTM32H7 0805 * @{ 0806 */ 0807 0808 /** 0809 * @} 0810 */ 0811 0812 0813 /** 0814 * @} 0815 */ 0816 0817 /** 0818 * @} 0819 */ 0820 0821 /** 0822 * @} 0823 */ 0824 0825 #ifdef __cplusplus 0826 } 0827 #endif 0828 0829 0830 #endif /* STM32H7xx_HAL_SD_H */
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