File indexing completed on 2025-05-11 08:23:36
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0020 #ifndef STM32H7xx_HAL_RTC_EX_H
0021 #define STM32H7xx_HAL_RTC_EX_H
0022
0023 #ifdef __cplusplus
0024 extern "C" {
0025 #endif
0026
0027
0028 #include "stm32h7xx_hal_def.h"
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0049
0050 typedef struct
0051 {
0052 uint32_t Tamper;
0053
0054
0055 uint32_t Interrupt;
0056
0057
0058 uint32_t Trigger;
0059
0060
0061 uint32_t NoErase;
0062
0063
0064 uint32_t MaskFlag;
0065
0066
0067 uint32_t Filter;
0068
0069
0070 uint32_t SamplingFrequency;
0071
0072
0073 uint32_t PrechargeDuration;
0074
0075
0076 uint32_t TamperPullUp;
0077
0078
0079 uint32_t TimeStampOnTamperDetection;
0080
0081 } RTC_TamperTypeDef;
0082
0083
0084
0085
0086 #if defined(TAMP)
0087
0088
0089
0090
0091 typedef struct
0092 {
0093 uint32_t IntTamper;
0094
0095
0096 uint32_t TimeStampOnTamperDetection;
0097
0098 } RTC_InternalTamperTypeDef;
0099
0100
0101
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0103
0104
0105
0106
0107 #define RTC_ATAMP_SEED_NB_UINT32 4U
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0110
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0113
0114
0115
0116 #define RTC_TAMP_NB 3u
0117
0118
0119
0120
0121
0122
0123
0124
0125 typedef struct
0126 {
0127 uint32_t Enable;
0128
0129
0130 uint32_t Interrupt;
0131
0132
0133 uint32_t Output;
0134
0135
0136
0137 uint32_t NoErase;
0138
0139
0140 uint32_t MaskFlag;
0141
0142
0143 } RTC_ATampInputTypeDef;
0144
0145
0146 typedef struct
0147 {
0148 uint32_t ActiveFilter;
0149
0150
0151 uint32_t ActiveAsyncPrescaler;
0152
0153
0154 uint32_t TimeStampOnTamperDetection;
0155
0156
0157 uint32_t ActiveOutputChangePeriod;
0158
0159
0160 uint32_t Seed[RTC_ATAMP_SEED_NB_UINT32];
0161
0162
0163
0164 RTC_ATampInputTypeDef TampInput[RTC_TAMP_NB];
0165
0166
0167 } RTC_ActiveTampersTypeDef;
0168
0169
0170
0171
0172 #endif
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0192
0193 #if defined(TAMP)
0194 #define BKP_REG_NUMBER TAMP_BKP_NUMBER
0195 #else
0196 #define BKP_REG_NUMBER RTC_BKP_NUMBER
0197 #endif
0198
0199
0200
0201
0202
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0204
0205
0206 #define RTC_BKP_DR0 0x00u
0207 #define RTC_BKP_DR1 0x01u
0208 #define RTC_BKP_DR2 0x02u
0209 #define RTC_BKP_DR3 0x03u
0210 #define RTC_BKP_DR4 0x04u
0211 #define RTC_BKP_DR5 0x05u
0212 #define RTC_BKP_DR6 0x06u
0213 #define RTC_BKP_DR7 0x07u
0214 #define RTC_BKP_DR8 0x08u
0215 #define RTC_BKP_DR9 0x09u
0216 #define RTC_BKP_DR10 0x0Au
0217 #define RTC_BKP_DR11 0x0Bu
0218 #define RTC_BKP_DR12 0x0Cu
0219 #define RTC_BKP_DR13 0x0Du
0220 #define RTC_BKP_DR14 0x0Eu
0221 #define RTC_BKP_DR15 0x0Fu
0222 #define RTC_BKP_DR16 0x10u
0223 #define RTC_BKP_DR17 0x11u
0224 #define RTC_BKP_DR18 0x12u
0225 #define RTC_BKP_DR19 0x13u
0226 #define RTC_BKP_DR20 0x14u
0227 #define RTC_BKP_DR21 0x15u
0228 #define RTC_BKP_DR22 0x16u
0229 #define RTC_BKP_DR23 0x17u
0230 #define RTC_BKP_DR24 0x18u
0231 #define RTC_BKP_DR25 0x19u
0232 #define RTC_BKP_DR26 0x1Au
0233 #define RTC_BKP_DR27 0x1Bu
0234 #define RTC_BKP_DR28 0x1Cu
0235 #define RTC_BKP_DR29 0x1Du
0236 #define RTC_BKP_DR30 0x1Eu
0237 #define RTC_BKP_DR31 0x1Fu
0238
0239
0240
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0250
0251 #define RTC_TIMESTAMPEDGE_RISING 0x00000000u
0252 #define RTC_TIMESTAMPEDGE_FALLING RTC_CR_TSEDGE
0253
0254
0255
0256
0257
0258
0259
0260
0261 #define RTC_TIMESTAMPPIN_DEFAULT 0x00000000u
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0263
0264
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0270
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0274
0275 #if defined(TAMP)
0276 #define RTC_TAMPER_1 TAMP_CR1_TAMP1E
0277 #define RTC_TAMPER_2 TAMP_CR1_TAMP2E
0278 #define RTC_TAMPER_3 TAMP_CR1_TAMP3E
0279 #else
0280 #define RTC_TAMPER_1 RTC_TAMPCR_TAMP1E
0281 #define RTC_TAMPER_2 RTC_TAMPCR_TAMP2E
0282 #define RTC_TAMPER_3 RTC_TAMPCR_TAMP3E
0283 #endif
0284
0285 #define RTC_TAMPER_ALL (RTC_TAMPER_1 | RTC_TAMPER_2 | RTC_TAMPER_3)
0286
0287
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0293
0294 #if defined(TAMP)
0295 #define RTC_IT_TAMP1 TAMP_IER_TAMP1IE
0296 #define RTC_IT_TAMP2 TAMP_IER_TAMP2IE
0297 #define RTC_IT_TAMP3 TAMP_IER_TAMP3IE
0298 #else
0299 #define RTC_IT_TAMP1 RTC_TAMPCR_TAMP1IE
0300 #define RTC_IT_TAMP2 RTC_TAMPCR_TAMP2IE
0301 #define RTC_IT_TAMP3 RTC_TAMPCR_TAMP3IE
0302 #endif
0303
0304 #if defined(TAMP)
0305 #define RTC_IT_TAMP 0x00000000u
0306 #define RTC_IT_TAMPALL (RTC_IT_TAMP1 | RTC_IT_TAMP2 | RTC_IT_TAMP3)
0307 #else
0308 #define RTC_IT_TAMP RTC_TAMPCR_TAMPIE
0309 #define RTC_IT_TAMPALL RTC_IT_TAMP
0310 #endif
0311
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0317
0318
0319 #if defined(TAMP)
0320 #define RTC_INT_TAMPER_1 TAMP_CR1_ITAMP1E
0321 #define RTC_INT_TAMPER_2 TAMP_CR1_ITAMP2E
0322 #define RTC_INT_TAMPER_3 TAMP_CR1_ITAMP3E
0323 #define RTC_INT_TAMPER_4 TAMP_CR1_ITAMP4E
0324 #define RTC_INT_TAMPER_5 TAMP_CR1_ITAMP5E
0325 #define RTC_INT_TAMPER_6 TAMP_CR1_ITAMP6E
0326 #define RTC_INT_TAMPER_8 TAMP_CR1_ITAMP8E
0327
0328 #define RTC_INT_TAMPER_ALL (RTC_INT_TAMPER_1 | RTC_INT_TAMPER_2 |\
0329 RTC_INT_TAMPER_3 | RTC_INT_TAMPER_4 |\
0330 RTC_INT_TAMPER_5 | RTC_INT_TAMPER_6 |\
0331 RTC_INT_TAMPER_8)
0332 #endif
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0339
0340
0341 #if defined(TAMP)
0342 #define RTC_INTERNAL_TAMPER1_INTERRUPT TAMP_IER_ITAMP1IE
0343 #define RTC_INTERNAL_TAMPER2_INTERRUPT TAMP_IER_ITAMP2IE
0344 #define RTC_INTERNAL_TAMPER3_INTERRUPT TAMP_IER_ITAMP3IE
0345 #define RTC_INTERNAL_TAMPER4_INTERRUPT TAMP_IER_ITAMP4IE
0346 #define RTC_INTERNAL_TAMPER5_INTERRUPT TAMP_IER_ITAMP5IE
0347 #define RTC_INTERNAL_TAMPER6_INTERRUPT TAMP_IER_ITAMP6IE
0348 #define RTC_INTERNAL_TAMPER8_INTERRUPT TAMP_IER_ITAMP8IE
0349 #endif
0350
0351
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0356
0357
0358 #define RTC_TAMPERTRIGGER_RISINGEDGE 0x01u
0359 #define RTC_TAMPERTRIGGER_FALLINGEDGE 0x02u
0360 #define RTC_TAMPERTRIGGER_LOWLEVEL 0x04u
0361 #define RTC_TAMPERTRIGGER_HIGHLEVEL 0x08u
0362
0363 #if defined(TAMP)
0364 #define RTC_TAMPER_1_TRIGGER TAMP_CR2_TAMP1TRG
0365 #define RTC_TAMPER_2_TRIGGER TAMP_CR2_TAMP2TRG
0366 #define RTC_TAMPER_3_TRIGGER TAMP_CR2_TAMP3TRG
0367 #else
0368 #define RTC_TAMPER_1_TRIGGER RTC_TAMPCR_TAMP1TRG
0369 #define RTC_TAMPER_2_TRIGGER RTC_TAMPCR_TAMP2TRG
0370 #define RTC_TAMPER_3_TRIGGER RTC_TAMPCR_TAMP3TRG
0371 #endif
0372
0373 #define RTC_TAMPER_X_TRIGGER (RTC_TAMPER_1_TRIGGER |\
0374 RTC_TAMPER_2_TRIGGER |\
0375 RTC_TAMPER_3_TRIGGER)
0376
0377
0378
0379
0380
0381
0382
0383
0384 #if defined(TAMP)
0385 #define RTC_TAMPER_ERASE_BACKUP_ENABLE 0x00u
0386 #define RTC_TAMPER_ERASE_BACKUP_DISABLE 0x01u
0387 #else
0388 #define RTC_TAMPER_ERASE_BACKUP_ENABLE 0x00000000u
0389 #define RTC_TAMPER_ERASE_BACKUP_DISABLE RTC_TAMPCR_TAMP1NOERASE
0390 #endif
0391
0392 #if defined(TAMP)
0393 #define RTC_DISABLE_BKP_ERASE_ON_TAMPER_1 TAMP_CR2_TAMP1NOERASE
0394 #define RTC_DISABLE_BKP_ERASE_ON_TAMPER_2 TAMP_CR2_TAMP2NOERASE
0395 #define RTC_DISABLE_BKP_ERASE_ON_TAMPER_3 TAMP_CR2_TAMP3NOERASE
0396 #else
0397 #define RTC_DISABLE_BKP_ERASE_ON_TAMPER_1 RTC_TAMPCR_TAMP1NOERASE
0398 #define RTC_DISABLE_BKP_ERASE_ON_TAMPER_2 RTC_TAMPCR_TAMP2NOERASE
0399 #define RTC_DISABLE_BKP_ERASE_ON_TAMPER_3 RTC_TAMPCR_TAMP3NOERASE
0400 #endif
0401
0402 #define RTC_DISABLE_BKP_ERASE_ON_TAMPER_MASK (RTC_DISABLE_BKP_ERASE_ON_TAMPER_1 |\
0403 RTC_DISABLE_BKP_ERASE_ON_TAMPER_2 |\
0404 RTC_DISABLE_BKP_ERASE_ON_TAMPER_3)
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0412
0413 #if defined(TAMP)
0414 #define RTC_TAMPERMASK_FLAG_DISABLE 0x00u
0415 #define RTC_TAMPERMASK_FLAG_ENABLE 0x01u
0416 #else
0417 #define RTC_TAMPERMASK_FLAG_DISABLE 0x00000000u
0418 #define RTC_TAMPERMASK_FLAG_ENABLE RTC_TAMPCR_TAMP1MF
0419 #endif
0420
0421 #if defined(TAMP)
0422 #define RTC_TAMPER_1_MASK_FLAG TAMP_CR2_TAMP1MSK
0423 #define RTC_TAMPER_2_MASK_FLAG TAMP_CR2_TAMP2MSK
0424 #define RTC_TAMPER_3_MASK_FLAG TAMP_CR2_TAMP3MSK
0425 #else
0426 #define RTC_TAMPER_1_MASK_FLAG RTC_TAMPCR_TAMP1MF
0427 #define RTC_TAMPER_2_MASK_FLAG RTC_TAMPCR_TAMP2MF
0428 #define RTC_TAMPER_3_MASK_FLAG RTC_TAMPCR_TAMP3MF
0429 #endif
0430
0431 #define RTC_TAMPER_X_MASK_FLAG (RTC_TAMPER_1_MASK_FLAG |\
0432 RTC_TAMPER_2_MASK_FLAG |\
0433 RTC_TAMPER_3_MASK_FLAG)
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0435
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0440
0441
0442 #if defined(TAMP)
0443 #define RTC_TAMPERFILTER_DISABLE 0x00000000U
0444
0445 #define RTC_TAMPERFILTER_2SAMPLE TAMP_FLTCR_TAMPFLT_0
0446
0447 #define RTC_TAMPERFILTER_4SAMPLE TAMP_FLTCR_TAMPFLT_1
0448
0449 #define RTC_TAMPERFILTER_8SAMPLE TAMP_FLTCR_TAMPFLT
0450
0451 #define RTC_TAMPERFILTER_MASK TAMP_FLTCR_TAMPFLT
0452
0453 #else
0454 #define RTC_TAMPERFILTER_DISABLE 0x00000000u
0455
0456 #define RTC_TAMPERFILTER_2SAMPLE RTC_TAMPCR_TAMPFLT_0
0457
0458 #define RTC_TAMPERFILTER_4SAMPLE RTC_TAMPCR_TAMPFLT_1
0459
0460 #define RTC_TAMPERFILTER_8SAMPLE RTC_TAMPCR_TAMPFLT
0461
0462 #define RTC_TAMPERFILTER_MASK RTC_TAMPCR_TAMPFLT
0463
0464 #endif
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0473 #if defined(TAMP)
0474 #define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV32768 0x00000000U
0475
0476 #define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV16384 TAMP_FLTCR_TAMPFREQ_0
0477
0478 #define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV8192 TAMP_FLTCR_TAMPFREQ_1
0479
0480 #define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV4096 (TAMP_FLTCR_TAMPFREQ_0 | TAMP_FLTCR_TAMPFREQ_1)
0481
0482 #define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV2048 TAMP_FLTCR_TAMPFREQ_2
0483
0484 #define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV1024 (TAMP_FLTCR_TAMPFREQ_0 | TAMP_FLTCR_TAMPFREQ_2)
0485
0486 #define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV512 (TAMP_FLTCR_TAMPFREQ_1 | TAMP_FLTCR_TAMPFREQ_2)
0487
0488 #define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV256 TAMP_FLTCR_TAMPFREQ
0489
0490 #define RTC_TAMPERSAMPLINGFREQ_RTCCLK_MASK TAMP_FLTCR_TAMPFREQ
0491
0492 #else
0493 #define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV32768 0x00000000u
0494
0495 #define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV16384 RTC_TAMPCR_TAMPFREQ_0
0496
0497 #define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV8192 RTC_TAMPCR_TAMPFREQ_1
0498
0499 #define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV4096 (RTC_TAMPCR_TAMPFREQ_0 | RTC_TAMPCR_TAMPFREQ_1)
0500
0501 #define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV2048 RTC_TAMPCR_TAMPFREQ_2
0502
0503 #define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV1024 (RTC_TAMPCR_TAMPFREQ_0 | RTC_TAMPCR_TAMPFREQ_2)
0504
0505 #define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV512 (RTC_TAMPCR_TAMPFREQ_1 | RTC_TAMPCR_TAMPFREQ_2)
0506
0507 #define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV256 RTC_TAMPCR_TAMPFREQ
0508
0509 #define RTC_TAMPERSAMPLINGFREQ_RTCCLK_MASK RTC_TAMPCR_TAMPFREQ
0510
0511 #endif
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0520 #if defined(TAMP)
0521 #define RTC_TAMPERPRECHARGEDURATION_1RTCCLK 0x00000000U
0522
0523 #define RTC_TAMPERPRECHARGEDURATION_2RTCCLK TAMP_FLTCR_TAMPPRCH_0
0524
0525 #define RTC_TAMPERPRECHARGEDURATION_4RTCCLK TAMP_FLTCR_TAMPPRCH_1
0526
0527 #define RTC_TAMPERPRECHARGEDURATION_8RTCCLK TAMP_FLTCR_TAMPPRCH
0528
0529 #define RTC_TAMPERPRECHARGEDURATION_MASK TAMP_FLTCR_TAMPPRCH
0530
0531 #else
0532 #define RTC_TAMPERPRECHARGEDURATION_1RTCCLK 0x00000000u
0533
0534 #define RTC_TAMPERPRECHARGEDURATION_2RTCCLK RTC_TAMPCR_TAMPPRCH_0
0535
0536 #define RTC_TAMPERPRECHARGEDURATION_4RTCCLK RTC_TAMPCR_TAMPPRCH_1
0537
0538 #define RTC_TAMPERPRECHARGEDURATION_8RTCCLK RTC_TAMPCR_TAMPPRCH
0539
0540 #define RTC_TAMPERPRECHARGEDURATION_MASK RTC_TAMPCR_TAMPPRCH
0541
0542 #endif
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0544
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0551 #if defined(TAMP)
0552 #define RTC_TIMESTAMPONTAMPERDETECTION_DISABLE 0x00000000u
0553 #define RTC_TIMESTAMPONTAMPERDETECTION_ENABLE RTC_CR_TAMPTS
0554 #define RTC_TIMESTAMPONTAMPERDETECTION_MASK RTC_CR_TAMPTS
0555 #else
0556 #define RTC_TIMESTAMPONTAMPERDETECTION_DISABLE 0x00000000u
0557 #define RTC_TIMESTAMPONTAMPERDETECTION_ENABLE RTC_TAMPCR_TAMPTS
0558 #define RTC_TIMESTAMPONTAMPERDETECTION_MASK RTC_TAMPCR_TAMPTS
0559 #endif
0560
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0567
0568 #if defined(TAMP)
0569 #define RTC_TAMPER_PULLUP_ENABLE 0x00000000u
0570 #define RTC_TAMPER_PULLUP_DISABLE TAMP_FLTCR_TAMPPUDIS
0571 #define RTC_TAMPER_PULLUP_MASK TAMP_FLTCR_TAMPPUDIS
0572 #else
0573 #define RTC_TAMPER_PULLUP_ENABLE 0x00000000u
0574 #define RTC_TAMPER_PULLUP_DISABLE RTC_TAMPCR_TAMPPUDIS
0575 #define RTC_TAMPER_PULLUP_MASK RTC_TAMPCR_TAMPPUDIS
0576 #endif
0577
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0585 #if defined(TAMP)
0586 #define RTC_TAMPERDETECTIONOUTPUT_DISABLE 0x00000000u
0587 #define RTC_TAMPERDETECTIONOUTPUT_ENABLE RTC_CR_TAMPOE
0588
0589 #endif
0590
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0597
0598 #if defined(TAMP)
0599 #define RTC_FLAG_TAMP1F TAMP_SR_TAMP1F
0600 #define RTC_FLAG_TAMP2F TAMP_SR_TAMP2F
0601 #define RTC_FLAG_TAMP3F TAMP_SR_TAMP3F
0602 #else
0603 #define RTC_FLAG_TAMP1F RTC_ISR_TAMP1F
0604 #define RTC_FLAG_TAMP2F RTC_ISR_TAMP2F
0605 #define RTC_FLAG_TAMP3F RTC_ISR_TAMP3F
0606 #endif
0607
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0614
0615 #define RTC_ATAMP_ENABLE 1u
0616 #define RTC_ATAMP_DISABLE 0u
0617
0618
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0625 #define RTC_ATAMP_INTERRUPT_ENABLE 1u
0626 #define RTC_ATAMP_INTERRUPT_DISABLE 0u
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0634
0635 #define RTC_ATAMP_FILTER_ENABLE TAMP_ATCR1_FLTEN
0636 #define RTC_ATAMP_FILTER_DISABLE 0u
0637
0638
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0640
0641
0642
0643
0644
0645 #define RTC_ATAMP_ASYNCPRES_RTCCLK 0u
0646 #define RTC_ATAMP_ASYNCPRES_RTCCLK_2 TAMP_ATCR1_ATCKSEL_0
0647 #define RTC_ATAMP_ASYNCPRES_RTCCLK_4 TAMP_ATCR1_ATCKSEL_1
0648 #define RTC_ATAMP_ASYNCPRES_RTCCLK_8 (TAMP_ATCR1_ATCKSEL_1 | TAMP_ATCR1_ATCKSEL_0)
0649 #define RTC_ATAMP_ASYNCPRES_RTCCLK_16 TAMP_ATCR1_ATCKSEL_2
0650 #define RTC_ATAMP_ASYNCPRES_RTCCLK_32 (TAMP_ATCR1_ATCKSEL_2 | TAMP_ATCR1_ATCKSEL_0)
0651 #define RTC_ATAMP_ASYNCPRES_RTCCLK_64 (TAMP_ATCR1_ATCKSEL_2 | TAMP_ATCR1_ATCKSEL_1)
0652 #define RTC_ATAMP_ASYNCPRES_RTCCLK_128 (TAMP_ATCR1_ATCKSEL_2 | TAMP_ATCR1_ATCKSEL_1 | TAMP_ATCR1_ATCKSEL_0)
0653
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0660
0661 #define RTC_ATAMP_1 0u
0662 #define RTC_ATAMP_2 1u
0663 #define RTC_ATAMP_3 2u
0664 #define RTC_ATAMP_4 3u
0665 #define RTC_ATAMP_5 4u
0666 #define RTC_ATAMP_6 5u
0667 #define RTC_ATAMP_7 6u
0668 #define RTC_ATAMP_8 7u
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0670
0671
0672
0673
0674
0675
0676
0677 #define RTC_MONOTONIC_COUNTER_1 0u
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0679
0680
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0684
0685
0686 #if defined(TAMP)
0687
0688 #define TAMP_OFFSET (TAMP_BASE - RTC_BASE)
0689 #endif
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0700
0701
0702 #define RTC_WAKEUPCLOCK_RTCCLK_DIV16 0x00000000u
0703 #define RTC_WAKEUPCLOCK_RTCCLK_DIV8 RTC_CR_WUCKSEL_0
0704 #define RTC_WAKEUPCLOCK_RTCCLK_DIV4 RTC_CR_WUCKSEL_1
0705 #define RTC_WAKEUPCLOCK_RTCCLK_DIV2 (RTC_CR_WUCKSEL_0 | RTC_CR_WUCKSEL_1)
0706 #define RTC_WAKEUPCLOCK_CK_SPRE_16BITS RTC_CR_WUCKSEL_2
0707 #define RTC_WAKEUPCLOCK_CK_SPRE_17BITS (RTC_CR_WUCKSEL_1 | RTC_CR_WUCKSEL_2)
0708
0709
0710
0711
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0719
0720 #define RTC_SMOOTHCALIB_PERIOD_32SEC 0x00000000u
0721
0722 #define RTC_SMOOTHCALIB_PERIOD_16SEC RTC_CALR_CALW16
0723
0724 #define RTC_SMOOTHCALIB_PERIOD_8SEC RTC_CALR_CALW8
0725
0726
0727
0728
0729
0730
0731
0732
0733
0734 #define RTC_SMOOTHCALIB_PLUSPULSES_SET RTC_CALR_CALP
0735
0736
0737 #define RTC_SMOOTHCALIB_PLUSPULSES_RESET 0x00000000u
0738
0739
0740
0741
0742
0743
0744
0745
0746
0747 #define RTC_CALIBOUTPUT_512HZ 0x00000000u
0748 #define RTC_CALIBOUTPUT_1HZ RTC_CR_COSEL
0749
0750
0751
0752
0753
0754
0755
0756
0757 #define RTC_SHIFTADD1S_RESET 0x00000000u
0758 #define RTC_SHIFTADD1S_SET RTC_SHIFTR_ADD1S
0759
0760
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0765
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0771
0772
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0783 #define __HAL_RTC_WAKEUPTIMER_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_WUTE))
0784
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0790 #define __HAL_RTC_WAKEUPTIMER_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_WUTE))
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0800 #define __HAL_RTC_WAKEUPTIMER_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
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0810 #define __HAL_RTC_WAKEUPTIMER_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
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0819
0820 #if defined(TAMP)
0821 #define __HAL_RTC_WAKEUPTIMER_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->SR) & (__INTERRUPT__)) != 0U) ? 1U : 0U)
0822 #else
0823 #define __HAL_RTC_WAKEUPTIMER_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & (__INTERRUPT__)) != 0U) ? 1U : 0U)
0824 #endif
0825
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0833
0834 #define __HAL_RTC_WAKEUPTIMER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != 0U) ? 1U : 0U)
0835
0836 #if defined(TAMP)
0837
0838
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0840
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0844
0845 #define __HAL_RTC_WAKEUPTIMER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->SR) & (__FLAG__)) != 0U) ? 1U : 0U)
0846 #else
0847
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0855
0856 #define __HAL_RTC_WAKEUPTIMER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U) ? 1U : 0U)
0857 #endif
0858
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0866
0867 #if defined(TAMP)
0868 #define __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SCR |= __FLAG__)
0869 #else
0870 #define __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
0871 #endif
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0882 #if defined(TAMP)
0883 #define __HAL_RTC_TAMPER1_ENABLE(__HANDLE__) (((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->CR1 |= (TAMP_CR1_TAMP1E))
0884 #else
0885 #define __HAL_RTC_TAMPER1_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR |= (RTC_TAMPCR_TAMP1E))
0886 #endif
0887
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0891
0892
0893 #if defined(TAMP)
0894 #define __HAL_RTC_TAMPER1_DISABLE(__HANDLE__) (((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->CR1 &= ~(RTC_TAMPCR_TAMP1E))
0895 #else
0896 #define __HAL_RTC_TAMPER1_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR &= ~(RTC_TAMPCR_TAMP1E))
0897 #endif
0898
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0903
0904 #if defined(TAMP)
0905 #define __HAL_RTC_TAMPER2_ENABLE(__HANDLE__) (((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->CR1 |= (TAMP_CR1_TAMP2E))
0906 #else
0907 #define __HAL_RTC_TAMPER2_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR |= (RTC_TAMPCR_TAMP2E))
0908 #endif
0909
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0914
0915 #if defined(TAMP)
0916 #define __HAL_RTC_TAMPER2_DISABLE(__HANDLE__) (((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + (TAMP_OFFSET))->CR1 &= ~(RTC_TAMPCR_TAMP2E))
0917 #else
0918 #define __HAL_RTC_TAMPER2_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR &= ~(RTC_TAMPCR_TAMP2E))
0919 #endif
0920
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0926 #if defined(TAMP)
0927 #define __HAL_RTC_TAMPER3_ENABLE(__HANDLE__) (((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->CR1 |= (TAMP_CR1_TAMP3E))
0928 #else
0929 #define __HAL_RTC_TAMPER3_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR |= (RTC_TAMPCR_TAMP3E))
0930 #endif
0931
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0936
0937 #if defined(TAMP)
0938 #define __HAL_RTC_TAMPER3_DISABLE(__HANDLE__) (((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->CR1 &= ~(RTC_TAMPCR_TAMP3E))
0939 #else
0940 #define __HAL_RTC_TAMPER3_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR &= ~(RTC_TAMPCR_TAMP3E))
0941 #endif
0942
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0954 #if defined(TAMP)
0955 #define __HAL_RTC_TAMPER_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->IER |= (__INTERRUPT__))
0956 #else
0957 #define __HAL_RTC_TAMPER_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->TAMPCR |= (__INTERRUPT__))
0958 #endif
0959
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0970
0971 #if defined(TAMP)
0972 #define __HAL_RTC_TAMPER_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->IER &= ~(__INTERRUPT__))
0973 #else
0974 #define __HAL_RTC_TAMPER_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->TAMPCR &= ~(__INTERRUPT__))
0975 #endif
0976
0977
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0987
0988 #if defined(TAMP)
0989 #define __HAL_RTC_TAMPER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->IER) & (__INTERRUPT__)) != 0U) ? 1U : 0U)
0990 #else
0991 #define __HAL_RTC_TAMPER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->TAMPCR) & (__INTERRUPT__)) != 0U) ? 1U : 0U)
0992 #endif
0993
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1002
1003
1004 #if defined(TAMP)
1005 #define __HAL_RTC_TAMPER_GET_FLAG(__HANDLE__, __FLAG__) ((((((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->SR) & (__FLAG__)) != 0U) ? 1U : 0U)
1006 #else
1007 #define __HAL_RTC_TAMPER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U) ? 1U : 0U)
1008 #endif
1009
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1019
1020 #if defined(TAMP)
1021 #define __HAL_RTC_TAMPER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->SCR) |= (__FLAG__))
1022 #else
1023 #define __HAL_RTC_TAMPER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
1024 #endif
1025
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1038
1039 #if defined(TAMP)
1040 #define __HAL_RTC_TAMPER_GET_SAMPLING_FREQ(__HANDLE__) ((uint32_t)((((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->FLTCR) & (RTC_TAMPERSAMPLINGFREQ_RTCCLK_MASK)))
1041 #else
1042 #define __HAL_RTC_TAMPER_GET_SAMPLING_FREQ(__HANDLE__) ((uint32_t)(((__HANDLE__)->Instance->TAMPCR) & (RTC_TAMPERSAMPLINGFREQ_RTCCLK_MASK)))
1043 #endif
1044
1045
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1054
1055
1056 #if defined(TAMP)
1057 #define __HAL_RTC_TAMPER_GET_SAMPLES_COUNT(__HANDLE__) ((uint32_t)((((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->FLTCR) & (RTC_TAMPERFILTER_MASK)))
1058 #else
1059 #define __HAL_RTC_TAMPER_GET_SAMPLES_COUNT(__HANDLE__) ((uint32_t)(((__HANDLE__)->Instance->TAMPCR) & (RTC_TAMPERFILTER_MASK)))
1060 #endif
1061
1062
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1070
1071
1072 #if defined(TAMP)
1073 #define __HAL_RTC_TAMPER_GET_PRCHRG_DURATION(__HANDLE__) ((uint32_t)((((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->FLTCR) & (RTC_TAMPERPRECHARGEDURATION_MASK)))
1074 #else
1075 #define __HAL_RTC_TAMPER_GET_PRCHRG_DURATION(__HANDLE__) ((uint32_t)(((__HANDLE__)->Instance->TAMPCR) & (RTC_TAMPERPRECHARGEDURATION_MASK)))
1076 #endif
1077
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1080
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1083
1084
1085
1086 #if defined(TAMP)
1087 #define __HAL_RTC_TAMPER_GET_PULLUP_STATUS(__HANDLE__) ((uint32_t)((((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->FLTCR) & (RTC_TAMPER_PULLUP_MASK)))
1088 #else
1089 #define __HAL_RTC_TAMPER_GET_PULLUP_STATUS(__HANDLE__) ((uint32_t)(((__HANDLE__)->Instance->TAMPCR) & (RTC_TAMPER_PULLUP_MASK)))
1090 #endif
1091
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1099
1100
1101 #define __HAL_RTC_TIMESTAMP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_TSE))
1102
1103
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1105
1106
1107
1108 #define __HAL_RTC_TIMESTAMP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_TSE))
1109
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1111
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1117
1118 #define __HAL_RTC_TIMESTAMP_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
1119
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1128 #define __HAL_RTC_TIMESTAMP_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
1129
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1137
1138 #if defined(TAMP)
1139 #define __HAL_RTC_TIMESTAMP_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->MISR) & ((__INTERRUPT__) >> 12)) != 0U) ? 1U : 0U)
1140 #else
1141 #define __HAL_RTC_TIMESTAMP_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & (__INTERRUPT__)) != 0U) ? 1U : 0U)
1142 #endif
1143
1144
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1150
1151 #define __HAL_RTC_TIMESTAMP_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != 0U) ? 1U : 0U)
1152
1153
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1161
1162 #if defined(TAMP)
1163 #define __HAL_RTC_TIMESTAMP_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->SR) & (__FLAG__)) != 0U) ? 1U : 0U)
1164 #else
1165 #define __HAL_RTC_TIMESTAMP_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U) ? 1U : 0U)
1166 #endif
1167
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1175
1176
1177 #if defined(TAMP)
1178 #define __HAL_RTC_TIMESTAMP_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SCR |= __FLAG__)
1179 #else
1180 #define __HAL_RTC_TIMESTAMP_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)))
1181 #endif
1182
1183
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1187
1188 #define __HAL_RTC_INTERNAL_TIMESTAMP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_ITSE))
1189
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1194
1195 #define __HAL_RTC_INTERNAL_TIMESTAMP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_ITSE))
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1204
1205 #if defined(TAMP)
1206 #define __HAL_RTC_INTERNAL_TIMESTAMP_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->SR) & (__FLAG__)) != 0U) ? 1U : 0U)
1207 #else
1208 #define __HAL_RTC_INTERNAL_TIMESTAMP_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U) ? 1U : 0U)
1209 #endif
1210
1211
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1218
1219
1220 #if defined(TAMP)
1221 #define __HAL_RTC_INTERNAL_TIMESTAMP_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SCR |= __FLAG__)
1222 #else
1223 #define __HAL_RTC_INTERNAL_TIMESTAMP_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)))
1224 #endif
1225
1226
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1229
1230
1231 #if defined(TAMP)
1232 #define __HAL_RTC_TAMPTS_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_TIMESTAMPONTAMPERDETECTION_MASK))
1233 #else
1234 #define __HAL_RTC_TAMPTS_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR |= (RTC_TIMESTAMPONTAMPERDETECTION_MASK))
1235 #endif
1236
1237
1238
1239
1240
1241
1242 #if defined(TAMP)
1243 #define __HAL_RTC_TAMPTS_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_TIMESTAMPONTAMPERDETECTION_MASK))
1244 #else
1245 #define __HAL_RTC_TAMPTS_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR &= ~(RTC_TIMESTAMPONTAMPERDETECTION_MASK))
1246 #endif
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256 #if defined(TAMP)
1257 #define __HAL_RTC_TAMPTS_GET_STATUS(__HANDLE__) ((__HANDLE__)->Instance->CR &= RTC_TIMESTAMPONTAMPERDETECTION_MASK)
1258 #else
1259 #define __HAL_RTC_TAMPTS_GET_STATUS(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR &= RTC_TIMESTAMPONTAMPERDETECTION_MASK)
1260 #endif
1261
1262 #if defined(TAMP)
1263
1264
1265
1266
1267
1268 #define __HAL_RTC_TAMPOE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_TAMPOE))
1269
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1272
1273
1274
1275 #define __HAL_RTC_TAMPOE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_TAMPOE))
1276 #endif
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287 #define __HAL_RTC_CALIBRATION_OUTPUT_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_COE))
1288
1289
1290
1291
1292
1293
1294 #define __HAL_RTC_CALIBRATION_OUTPUT_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_COE))
1295
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1299
1300
1301 #define __HAL_RTC_CLOCKREF_DETECTION_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_REFCKON))
1302
1303
1304
1305
1306
1307
1308 #define __HAL_RTC_CLOCKREF_DETECTION_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_REFCKON))
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318 #if defined(TAMP)
1319 #define __HAL_RTC_SHIFT_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ICSR) & (__FLAG__)) != 0U) ? 1U : 0U)
1320 #else
1321 #define __HAL_RTC_SHIFT_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U) ? 1U : 0U)
1322 #endif
1323
1324
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1331
1332 #if defined(EXTI_D1)
1333 #define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() (EXTI_D1->IMR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1334 #else
1335 #define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() (EXTI->IMR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1336 #endif
1337
1338
1339
1340
1341 #if defined(EXTI_D1)
1342 #define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() (EXTI_D1->IMR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
1343 #else
1344 #define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() (EXTI->IMR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
1345 #endif
1346
1347
1348
1349
1350
1351 #if defined(EXTI_D1)
1352 #define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_EVENT() (EXTI_D1->EMR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1353 #else
1354 #define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_EVENT() (EXTI->EMR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1355 #endif
1356
1357
1358
1359
1360
1361 #if defined(EXTI_D1)
1362 #define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_EVENT() (EXTI_D1->EMR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
1363 #else
1364 #define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_EVENT() (EXTI->EMR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
1365 #endif
1366
1367
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1370
1371 #define __HAL_RTC_WAKEUPTIMER_EXTID3_ENABLE_EVENT() (EXTI->D3PMR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1372
1373
1374
1375
1376
1377 #define __HAL_RTC_WAKEUPTIMER_EXTID3_DISABLE_EVENT() (EXTI->D3PMR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
1378
1379 #if defined(DUAL_CORE)
1380
1381
1382
1383
1384 #define __HAL_RTC_WAKEUPTIMER_EXTID2_ENABLE_IT() (EXTI_D2->IMR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1385
1386
1387
1388
1389
1390 #define __HAL_RTC_WAKEUPTIMER_EXTID2_DISABLE_IT() (EXTI_D2->IMR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
1391
1392
1393
1394
1395
1396 #define __HAL_RTC_WAKEUPTIMER_EXTID2_ENABLE_EVENT() (EXTI_D2->EMR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1397
1398
1399
1400
1401
1402 #define __HAL_RTC_WAKEUPTIMER_EXTID2_DISABLE_EVENT() (EXTI_D2->EMR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
1403
1404 #endif
1405
1406
1407
1408
1409
1410 #define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1411
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1414
1415
1416 #define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
1417
1418
1419
1420
1421
1422 #define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1423
1424
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1426
1427
1428 #define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
1429
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1432
1433
1434 #define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
1435 __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE(); \
1436 __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE(); \
1437 } while(0)
1438
1439
1440
1441
1442
1443
1444 #define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
1445 __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE(); \
1446 __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE(); \
1447 } while(0)
1448
1449
1450
1451
1452
1453 #if defined(EXTI_D1)
1454 #define __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() (EXTI_D1->PR1 & RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1455 #else
1456 #define __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() (EXTI->PR1 & RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1457 #endif
1458
1459
1460
1461
1462
1463 #if defined(EXTI_D1)
1464 #define __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() (EXTI_D1->PR1 = RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1465 #else
1466 #define __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() (EXTI->PR1 = RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1467 #endif
1468
1469
1470
1471
1472
1473 #define __HAL_RTC_WAKEUPTIMER_EXTID3_GET_FLAG() (EXTI_D3->PR1 & RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1474
1475
1476
1477
1478
1479 #define __HAL_RTC_WAKEUPTIMER_EXTID3_CLEAR_FLAG() (EXTI_D3->PR1 = RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1480
1481
1482
1483
1484
1485 #define __HAL_RTC_WAKEUPTIMER_EXTI_GENERATE_SWIT() (EXTI->SWIER1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1486
1487 #if defined(DUAL_CORE)
1488
1489
1490
1491
1492
1493 #define __HAL_RTC_WAKEUPTIMER_EXTID2_GET_FLAG() (EXTI_D2->PR1 & RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1494
1495
1496
1497
1498
1499 #define __HAL_RTC_WAKEUPTIMER_EXTID2_CLEAR_FLAG() (EXTI_D2->PR1 = RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1500
1501 #endif
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1511 #if defined(EXTI_D1)
1512 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT() (EXTI_D1->IMR1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
1513 #else
1514 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT() (EXTI->IMR1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
1515 #endif
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1520
1521 #if defined(EXTI_D1)
1522 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT() (EXTI_D1->IMR1 &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
1523 #else
1524 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT() (EXTI->IMR1 &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
1525 #endif
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1531 #if defined(EXTI_D1)
1532 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_EVENT() (EXTI_D1->EMR1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
1533 #else
1534 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_EVENT() (EXTI->EMR1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
1535 #endif
1536
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1540
1541 #if defined(EXTI_D1)
1542 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_EVENT() (EXTI_D1->EMR1 &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
1543 #else
1544 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_EVENT() (EXTI->EMR1 &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
1545 #endif
1546
1547 #if defined(DUAL_CORE)
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1551
1552 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTID2_ENABLE_IT() (EXTI_D2->IMR1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
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1558 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTID2_DISABLE_IT() (EXTI_D2->IMR1 &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
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1565 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTID2_ENABLE_EVENT() (EXTI_D2->EMR1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
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1572 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTID2_DISABLE_EVENT() (EXTI_D2->EMR1 &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
1573
1574 #endif
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1580 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
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1586 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR1 &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
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1592 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
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1598 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR1 &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
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1604 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
1605 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE(); \
1606 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_FALLING_EDGE(); \
1607 } while(0)
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1613 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
1614 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_EDGE(); \
1615 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_FALLING_EDGE(); \
1616 } while(0)
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1621
1622 #if defined(EXTI_D1)
1623 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG() (EXTI_D1->PR1 & RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
1624 #else
1625 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG() (EXTI->PR1 & RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
1626 #endif
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1631
1632 #if defined(EXTI_D1)
1633 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG() (EXTI_D1->PR1 = RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
1634 #else
1635 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG() (EXTI->PR1 = RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
1636 #endif
1637
1638 #if defined(DUAL_CORE)
1639
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1642
1643 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTID2_GET_FLAG() (EXTI_D2->PR1 & RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1644
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1648
1649 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTID2_CLEAR_FLAG() (EXTI_D2->PR1 = RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
1650
1651 #endif
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1656
1657 #define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT() (EXTI->SWIER1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
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1680 HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin);
1681 HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin);
1682 HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc);
1683 HAL_StatusTypeDef HAL_RTCEx_SetInternalTimeStamp(RTC_HandleTypeDef *hrtc);
1684 HAL_StatusTypeDef HAL_RTCEx_DeactivateInternalTimeStamp(RTC_HandleTypeDef *hrtc);
1685 HAL_StatusTypeDef HAL_RTCEx_GetTimeStamp(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTimeStamp, RTC_DateTypeDef *sTimeStampDate, uint32_t Format);
1686 void HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc);
1687 void HAL_RTCEx_TimeStampEventCallback(RTC_HandleTypeDef *hrtc);
1688 HAL_StatusTypeDef HAL_RTCEx_PollForTimeStampEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
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1703 HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef *sTamper);
1704 HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef *sTamper);
1705 HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper);
1706 HAL_StatusTypeDef HAL_RTCEx_PollForTamper1Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
1707 HAL_StatusTypeDef HAL_RTCEx_PollForTamper2Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
1708 HAL_StatusTypeDef HAL_RTCEx_PollForTamper3Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
1709 void HAL_RTCEx_Tamper1EventCallback(RTC_HandleTypeDef *hrtc);
1710 void HAL_RTCEx_Tamper2EventCallback(RTC_HandleTypeDef *hrtc);
1711 void HAL_RTCEx_Tamper3EventCallback(RTC_HandleTypeDef *hrtc);
1712 #if defined(TAMP)
1713 HAL_StatusTypeDef HAL_RTCEx_SetInternalTamper(RTC_HandleTypeDef *hrtc, RTC_InternalTamperTypeDef *sIntTamper);
1714 HAL_StatusTypeDef HAL_RTCEx_SetInternalTamper_IT(RTC_HandleTypeDef *hrtc, RTC_InternalTamperTypeDef *sIntTamper);
1715 HAL_StatusTypeDef HAL_RTCEx_DeactivateInternalTamper(RTC_HandleTypeDef *hrtc, uint32_t IntTamper);
1716 HAL_StatusTypeDef HAL_RTCEx_PollForInternalTamperEvent(RTC_HandleTypeDef *hrtc, uint32_t IntTamper, uint32_t Timeout);
1717 void HAL_RTCEx_InternalTamper1EventCallback(RTC_HandleTypeDef *hrtc);
1718 void HAL_RTCEx_InternalTamper2EventCallback(RTC_HandleTypeDef *hrtc);
1719 void HAL_RTCEx_InternalTamper3EventCallback(RTC_HandleTypeDef *hrtc);
1720 void HAL_RTCEx_InternalTamper4EventCallback(RTC_HandleTypeDef *hrtc);
1721 void HAL_RTCEx_InternalTamper5EventCallback(RTC_HandleTypeDef *hrtc);
1722 void HAL_RTCEx_InternalTamper6EventCallback(RTC_HandleTypeDef *hrtc);
1723 void HAL_RTCEx_InternalTamper8EventCallback(RTC_HandleTypeDef *hrtc);
1724 HAL_StatusTypeDef HAL_RTCEx_SetActiveTampers(RTC_HandleTypeDef *hrtc, RTC_ActiveTampersTypeDef *sAllTamper);
1725 HAL_StatusTypeDef HAL_RTCEx_SetActiveSeed(RTC_HandleTypeDef *hrtc, uint32_t *pSeed);
1726 HAL_StatusTypeDef HAL_RTCEx_DeactivateActiveTampers(RTC_HandleTypeDef *hrtc);
1727 #endif
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1743 HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock);
1744 HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock);
1745 HAL_StatusTypeDef HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc);
1746 uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc);
1747 void HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc);
1748 void HAL_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *hrtc);
1749 HAL_StatusTypeDef HAL_RTCEx_PollForWakeUpTimerEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
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1764 void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint32_t Data);
1765 uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister);
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1780 HAL_StatusTypeDef HAL_RTCEx_SetSmoothCalib(RTC_HandleTypeDef *hrtc, uint32_t SmoothCalibPeriod, uint32_t SmoothCalibPlusPulses, uint32_t SmoothCalibMinusPulsesValue);
1781 HAL_StatusTypeDef HAL_RTCEx_SetSynchroShift(RTC_HandleTypeDef *hrtc, uint32_t ShiftAdd1S, uint32_t ShiftSubFS);
1782 HAL_StatusTypeDef HAL_RTCEx_SetCalibrationOutPut(RTC_HandleTypeDef *hrtc, uint32_t CalibOutput);
1783 HAL_StatusTypeDef HAL_RTCEx_DeactivateCalibrationOutPut(RTC_HandleTypeDef *hrtc);
1784 HAL_StatusTypeDef HAL_RTCEx_SetRefClock(RTC_HandleTypeDef *hrtc);
1785 HAL_StatusTypeDef HAL_RTCEx_DeactivateRefClock(RTC_HandleTypeDef *hrtc);
1786 HAL_StatusTypeDef HAL_RTCEx_EnableBypassShadow(RTC_HandleTypeDef *hrtc);
1787 HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef *hrtc);
1788 #if defined(TAMP)
1789 HAL_StatusTypeDef HAL_RTCEx_MonotonicCounterIncrement(RTC_HandleTypeDef *hrtc, uint32_t Instance);
1790 HAL_StatusTypeDef HAL_RTCEx_MonotonicCounterGet(RTC_HandleTypeDef *hrtc, uint32_t *Counter, uint32_t Instance);
1791 #endif
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1803 void HAL_RTCEx_AlarmBEventCallback(RTC_HandleTypeDef *hrtc);
1804 HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
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1820 #define RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT EXTI_IMR1_IM18
1821 #define RTC_EXTI_LINE_WAKEUPTIMER_EVENT EXTI_IMR1_IM19
1822
1823
1824 #define RTC_TAMPER_X ((uint32_t) (RTC_TAMPER_1 | RTC_TAMPER_2 | RTC_TAMPER_3))
1825 #define RTC_TAMPER_X_INTERRUPT ((uint32_t) (RTC_IT_TAMP1 | RTC_IT_TAMP2 | RTC_IT_TAMP3))
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1846 #define IS_RTC_BKP(__BKP__) ((__BKP__) < BKP_REG_NUMBER)
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1851
1852 #define IS_TIMESTAMP_EDGE(EDGE) (((EDGE) == RTC_TIMESTAMPEDGE_RISING) || \
1853 ((EDGE) == RTC_TIMESTAMPEDGE_FALLING))
1854
1855 #define IS_RTC_TIMESTAMP_PIN(PIN) (((PIN) == RTC_TIMESTAMPPIN_DEFAULT))
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1860
1861 #define IS_RTC_WAKEUP_CLOCK(CLOCK) (((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV16) || \
1862 ((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV8) || \
1863 ((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV4) || \
1864 ((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV2) || \
1865 ((CLOCK) == RTC_WAKEUPCLOCK_CK_SPRE_16BITS) || \
1866 ((CLOCK) == RTC_WAKEUPCLOCK_CK_SPRE_17BITS))
1867
1868 #define IS_RTC_WAKEUP_COUNTER(COUNTER) ((COUNTER) <= RTC_WUTR_WUT)
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1873
1874 #define IS_RTC_SMOOTH_CALIB_PERIOD(PERIOD) (((PERIOD) == RTC_SMOOTHCALIB_PERIOD_32SEC) || \
1875 ((PERIOD) == RTC_SMOOTHCALIB_PERIOD_16SEC) || \
1876 ((PERIOD) == RTC_SMOOTHCALIB_PERIOD_8SEC))
1877
1878 #define IS_RTC_SMOOTH_CALIB_PLUS(PLUS) (((PLUS) == RTC_SMOOTHCALIB_PLUSPULSES_SET) || \
1879 ((PLUS) == RTC_SMOOTHCALIB_PLUSPULSES_RESET))
1880
1881 #define IS_RTC_SMOOTH_CALIB_MINUS(VALUE) ((VALUE) <= RTC_CALR_CALM)
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1886
1887 #define IS_RTC_SHIFT_ADD1S(SEL) (((SEL) == RTC_SHIFTADD1S_RESET) || \
1888 ((SEL) == RTC_SHIFTADD1S_SET))
1889
1890 #define IS_RTC_SHIFT_SUBFS(FS) ((FS) <= RTC_SHIFTR_SUBFS)
1891
1892 #define IS_RTC_CALIB_OUTPUT(OUTPUT) (((OUTPUT) == RTC_CALIBOUTPUT_512HZ) || \
1893 ((OUTPUT) == RTC_CALIBOUTPUT_1HZ))
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1898
1899 #define IS_RTC_TAMPER(__TAMPER__) ((((__TAMPER__) & RTC_TAMPER_X) != 0x00U) && \
1900 (((__TAMPER__) & ~RTC_TAMPER_X) == 0x00U))
1901
1902 #define IS_RTC_TAMPER_INTERRUPT(__INTERRUPT__) \
1903 ((((__INTERRUPT__) & ( RTC_TAMPER_X_INTERRUPT | RTC_IT_TAMPALL )) != 0x00U) && \
1904 (((__INTERRUPT__) & (~(RTC_TAMPER_X_INTERRUPT | RTC_IT_TAMPALL))) == 0x00U))
1905
1906 #define IS_RTC_TAMPER_TRIGGER(__TRIGGER__) (((__TRIGGER__) == RTC_TAMPERTRIGGER_RISINGEDGE) || \
1907 ((__TRIGGER__) == RTC_TAMPERTRIGGER_FALLINGEDGE) || \
1908 ((__TRIGGER__) == RTC_TAMPERTRIGGER_LOWLEVEL) || \
1909 ((__TRIGGER__) == RTC_TAMPERTRIGGER_HIGHLEVEL))
1910
1911 #define IS_RTC_TAMPER_ERASE_MODE(__MODE__) (((__MODE__) == RTC_TAMPER_ERASE_BACKUP_ENABLE) || \
1912 ((__MODE__) == RTC_TAMPER_ERASE_BACKUP_DISABLE))
1913
1914 #define IS_RTC_TAMPER_MASKFLAG_STATE(__STATE__) (((__STATE__) == RTC_TAMPERMASK_FLAG_ENABLE) || \
1915 ((__STATE__) == RTC_TAMPERMASK_FLAG_DISABLE))
1916
1917 #define IS_RTC_TAMPER_FILTER(__FILTER__) (((__FILTER__) == RTC_TAMPERFILTER_DISABLE) || \
1918 ((__FILTER__) == RTC_TAMPERFILTER_2SAMPLE) || \
1919 ((__FILTER__) == RTC_TAMPERFILTER_4SAMPLE) || \
1920 ((__FILTER__) == RTC_TAMPERFILTER_8SAMPLE))
1921
1922 #define IS_RTC_TAMPER_SAMPLING_FREQ(__FREQ__) (((__FREQ__) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV32768)|| \
1923 ((__FREQ__) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV16384)|| \
1924 ((__FREQ__) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV8192) || \
1925 ((__FREQ__) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV4096) || \
1926 ((__FREQ__) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV2048) || \
1927 ((__FREQ__) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV1024) || \
1928 ((__FREQ__) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV512) || \
1929 ((__FREQ__) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV256))
1930
1931 #define IS_RTC_TAMPER_PRECHARGE_DURATION(__DURATION__) (((__DURATION__) == RTC_TAMPERPRECHARGEDURATION_1RTCCLK) || \
1932 ((__DURATION__) == RTC_TAMPERPRECHARGEDURATION_2RTCCLK) || \
1933 ((__DURATION__) == RTC_TAMPERPRECHARGEDURATION_4RTCCLK) || \
1934 ((__DURATION__) == RTC_TAMPERPRECHARGEDURATION_8RTCCLK))
1935
1936 #define IS_RTC_TAMPER_PULLUP_STATE(__STATE__) (((__STATE__) == RTC_TAMPER_PULLUP_ENABLE) || \
1937 ((__STATE__) == RTC_TAMPER_PULLUP_DISABLE))
1938
1939 #define IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(__DETECTION__) (((__DETECTION__) == RTC_TIMESTAMPONTAMPERDETECTION_ENABLE) || \
1940 ((__DETECTION__) == RTC_TIMESTAMPONTAMPERDETECTION_DISABLE))
1941
1942 #if defined(TAMP)
1943 #define IS_RTC_TAMPER_TAMPERDETECTIONOUTPUT(__MODE__) (((__MODE__) == RTC_TAMPERDETECTIONOUTPUT_ENABLE) || \
1944 ((__MODE__) == RTC_TAMPERDETECTIONOUTPUT_DISABLE))
1945 #endif
1946
1947 #define IS_RTC_TAMPER_FILTER_CONFIG_CORRECT(FILTER, TRIGGER) \
1948 ( ( ((FILTER) != RTC_TAMPERFILTER_DISABLE) \
1949 && ( ((TRIGGER) == RTC_TAMPERTRIGGER_LOWLEVEL) \
1950 || ((TRIGGER) == RTC_TAMPERTRIGGER_HIGHLEVEL))) \
1951 || ( ((FILTER) == RTC_TAMPERFILTER_DISABLE) \
1952 && ( ((TRIGGER) == RTC_TAMPERTRIGGER_RISINGEDGE) \
1953 || ((TRIGGER) == RTC_TAMPERTRIGGER_FALLINGEDGE))))
1954
1955 #define IS_RTC_INTERNAL_TAMPER(__INT_TAMPER__) ((((__INT_TAMPER__) & RTC_INT_TAMPER_ALL) != 0x00U) && \
1956 (((__INT_TAMPER__) & ~RTC_INT_TAMPER_ALL) == 0x00U))
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1974 #ifdef __cplusplus
1975 }
1976 #endif
1977
1978 #endif
1979