stm32h7/include/stm32h7xx_hal_ramecc.h

0001 /**
0002   ******************************************************************************
0003   * @file    stm32h7xx_hal_ramecc.h
0004   * @author  MCD Application Team
0005   * @brief   Header file of RAMECC HAL module.
0006   ******************************************************************************
0007   * @attention
0008   *
0009   * Copyright (c) 2017 STMicroelectronics.
0010   * All rights reserved.
0011   *
0012   * This software is licensed under terms that can be found in the LICENSE file
0013   * in the root directory of this software component.
0014   * If no LICENSE file comes with this software, it is provided AS-IS.
0015   *
0016   ******************************************************************************
0017   */
0018
0019 /* Define to prevent recursive inclusion -------------------------------------*/
0020 #ifndef STM32H7xx_HAL_RAMECC_H
0021 #define STM32H7xx_HAL_RAMECC_H
0022
0023 #ifdef __cplusplus
0024  extern "C" {
0025 #endif
0026
0027 /* Includes ------------------------------------------------------------------*/
0028 #include "stm32h7xx_hal_def.h"
0029
0030 /** @addtogroup STM32H7xx_HAL_Driver
0031   * @{
0032   */
0033
0034 /** @addtogroup RAMECC
0035   * @{
0036   */
0037
0038 /* Exported types ------------------------------------------------------------*/
0039
0040 /** @defgroup RAMECC_Exported_Types RAMECC Exported Types
0041   * @ingroup RTEMSBSPsARMSTM32H7
0042   * @brief    RAMECC Exported Types
0043   * @{
0044   */
0045
0046 /**
0047   * @brief  HAL RAMECC State structures definition
0048   */
0049 typedef enum
0050 {
0051   HAL_RAMECC_STATE_RESET             = 0x00U,  /*!< RAMECC not yet initialized or disabled */
0052   HAL_RAMECC_STATE_READY             = 0x01U,  /*!< RAMECC initialized and ready for use   */
0053   HAL_RAMECC_STATE_BUSY              = 0x02U,  /*!< RAMECC process is ongoing              */
0054   HAL_RAMECC_STATE_ERROR             = 0x03U,  /*!< RAMECC error state                     */
0055 }HAL_RAMECC_StateTypeDef;
0056
0057
0058 /**
0059   * @brief  RAMECC handle Structure definition
0060   */
0061 #if (USE_HAL_RAMECC_REGISTER_CALLBACKS == 1)
0062 typedef struct __RAMECC_HandleTypeDef
0063 #else
0064 typedef struct
0065 #endif  /* USE_HAL_RAMECC_REGISTER_CALLBACKS */
0066 {
0067   RAMECC_MonitorTypeDef           *Instance;                                                         /*!< Register base address        */
0068   __IO HAL_RAMECC_StateTypeDef    State;                                                             /*!< RAMECC state                 */
0069   __IO uint32_t                   ErrorCode;                                                         /*!< RAMECC Error Code            */
0070   __IO uint32_t                   RAMECCErrorCode;                                                   /*!< RAMECC Detected Error Code   */
0071 #if (USE_HAL_RAMECC_REGISTER_CALLBACKS == 1)
0072   void                            (* DetectErrorCallback)( struct __RAMECC_HandleTypeDef *hramecc);  /*!< RAMECC Error Detect callback */
0073 #endif  /* USE_HAL_RAMECC_REGISTER_CALLBACKS */
0074 }RAMECC_HandleTypeDef;
0075
0076 /**
0077   * @}
0078   */
0079
0080
0081 /* Exported constants --------------------------------------------------------*/
0082 /** @defgroup RAMECC_Exported_Constants RAMECC Exported Constants
0083   * @ingroup RTEMSBSPsARMSTM32H7
0084   * @{
0085   */
0086 /** @defgroup RAMECC_Error_Codes RAMECC Error Codes
0087   * @ingroup RTEMSBSPsARMSTM32H7
0088   * @{
0089   */
0090 #define HAL_RAMECC_ERROR_NONE              0x00000000U  /*!< RAMECC No Error         */
0091 #define HAL_RAMECC_ERROR_TIMEOUT           0x00000001U  /*!< RAMECC Timeout Error    */
0092 #define HAL_RAMECC_ERROR_BUSY              0x00000002U  /*!< RAMECC Busy Error       */
0093 #if (USE_HAL_RAMECC_REGISTER_CALLBACKS == 1)
0094 #define HAL_RAMECC_ERROR_INVALID_CALLBACK  0x00000003U  /*!< Invalid Callback error  */
0095 #endif  /* USE_HAL_RAMECC_REGISTER_CALLBACKS */
0096
0097 /**
0098   * @}
0099   */
0100
0101 /** @defgroup RAMECC_Error_Codes RAMECC Error Detected Codes
0102   * @{
0103   */
0104 #define HAL_RAMECC_NO_ERROR                           0x00000000U  /*!< RAMECC No Error Detected                      */
0105 #define HAL_RAMECC_SINGLEERROR_DETECTED               0x00000001U  /*!< RAMECC Single Error Detected                  */
0106 #define HAL_RAMECC_DOUBLEERROR_DETECTED               0x00000002U  /*!< RAMECC Double Error Detected                  */
0107 /**
0108   * @}
0109   */
0110
0111 /** @defgroup RAMECC_Interrupt RAMECC interrupts
0112   * @ingroup RTEMSBSPsARMSTM32H7
0113   * @{
0114   */
0115 #define RAMECC_IT_GLOBAL_ID                0x10000000UL
0116 #define RAMECC_IT_MONITOR_ID               0x20000000UL
0117
0118 #define RAMECC_IT_GLOBAL_ENABLE            (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GIE)
0119 #define RAMECC_IT_GLOBAL_SINGLEERR_R       (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GECCSEIE)
0120 #define RAMECC_IT_GLOBAL_DOUBLEERR_R       (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GECCDEIE)
0121 #define RAMECC_IT_GLOBAL_DOUBLEERR_W       (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GECCDEBWIE)
0122 #define RAMECC_IT_GLOBAL_ALL               (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GIE | RAMECC_IER_GECCSEIE | RAMECC_IER_GECCDEIE | RAMECC_IER_GECCDEBWIE)
0123
0124
0125 #define RAMECC_IT_MONITOR_SINGLEERR_R      (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCSEIE)
0126 #define RAMECC_IT_MONITOR_DOUBLEERR_R      (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCDEIE)
0127 #define RAMECC_IT_MONITOR_DOUBLEERR_W      (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCDEBWIE)
0128 #define RAMECC_IT_MONITOR_ALL              (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCDEBWIE | RAMECC_CR_ECCDEIE | RAMECC_CR_ECCSEIE)
0129 /**
0130   * @}
0131   */
0132
0133 /** @defgroup RAMECC_FLAG RAMECC Monitor flags
0134   * @ingroup RTEMSBSPsARMSTM32H7
0135   * @{
0136   */
0137 #define RAMECC_FLAG_SINGLEERR_R            RAMECC_SR_SEDCF
0138 #define RAMECC_FLAG_DOUBLEERR_R            RAMECC_SR_DEDF
0139 #define RAMECC_FLAG_DOUBLEERR_W            RAMECC_SR_DEBWDF
0140 #define RAMECC_FLAGS_ALL                   (RAMECC_SR_SEDCF | RAMECC_SR_DEDF | RAMECC_SR_DEBWDF)
0141
0142 /**
0143   * @}
0144   */
0145 /**
0146   * @}
0147   */
0148
0149 /* Exported macro ------------------------------------------------------------*/
0150 /** @defgroup RAMECC_Exported_Macros RAMECC Exported Macros
0151   * @ingroup RTEMSBSPsARMSTM32H7
0152   * @{
0153   */
0154
0155 #define __HAL_RAMECC_ENABLE_GLOBAL_IT(__HANDLE__, __INTERRUPT__) ((((RAMECC_TypeDef *)((uint32_t)(__HANDLE__)->Instance & 0xFFFFFF00U))->IER) |= ((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID))
0156 #define __HAL_RAMECC_ENABLE_MONITOR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= ((__INTERRUPT__) & ~RAMECC_IT_MONITOR_ID))
0157
0158 /**
0159   * @brief  Enable the specified RAMECC interrupts.
0160   * @param  __HANDLE__   : RAMECC handle.
0161   * @param  __INTERRUPT__: specifies the RAMECC interrupt sources to be enabled or disabled.
0162   *        This parameter can be one of the following values:
0163   *           @arg RAMECC_IT_GLOBAL_ENABLE         : Global interrupt enable mask.
0164   *           @arg RAMECC_IT_GLOBAL_SINGLEERR_R    : Global ECC single error interrupt enable.
0165   *           @arg RAMECC_IT_GLOBAL_DOUBLEERR_R    : Global ECC double error interrupt enable.
0166   *           @arg RAMECC_IT_GLOBAL_DOUBLEERR_W    : Global ECC double error on byte write (BW) interrupt enable.
0167   *           @arg RAMECC_IT_GLOBAL_ALL            : All Global ECC interrupts enable mask.
0168   *           @arg RAMECC_IT_MONITOR_SINGLEERR_R   : Monitor ECC single error interrupt enable.
0169   *           @arg RAMECC_IT_MONITOR_DOUBLEERR_R   : Monitor ECC double error interrupt enable.
0170   *           @arg RAMECC_IT_MONITOR_DOUBLEERR_W   : Monitor ECC double error on byte write (BW) interrupt enable.
0171   *           @arg RAMECC_IT_MONITOR_ALL           : All Monitor ECC interrupts enable mask.
0172   * @retval None
0173   */
0174 #define __HAL_RAMECC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ( \
0175 (IS_RAMECC_GLOBAL_INTERRUPT(__INTERRUPT__)) ? (__HAL_RAMECC_ENABLE_GLOBAL_IT((__HANDLE__), (__INTERRUPT__))) :\
0176 (__HAL_RAMECC_ENABLE_MONITOR_IT((__HANDLE__), (__INTERRUPT__))))
0177
0178
0179 #define __HAL_RAMECC_DISABLE_GLOBAL_IT(__HANDLE__, __INTERRUPT__) ((((RAMECC_TypeDef *)((uint32_t)(__HANDLE__)->Instance & 0xFFFFFF00U))->IER) &= ~((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID))
0180 #define __HAL_RAMECC_DISABLE_MONITOR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~((__INTERRUPT__) & ~RAMECC_IT_MONITOR_ID))
0181
0182 /**
0183   * @brief  Disable the specified RAMECC interrupts.
0184   * @param  __HANDLE__   : RAMECC handle.
0185   * @param  __INTERRUPT__: specifies the RAMECC interrupt sources to be enabled or disabled.
0186   *        This parameter can be one of the following values:
0187   *           @arg RAMECC_IT_GLOBAL_ENABLE         : Global interrupt enable mask.
0188   *           @arg RAMECC_IT_GLOBAL_SINGLEERR_R    : Global ECC single error interrupt enable.
0189   *           @arg RAMECC_IT_GLOBAL_DOUBLEERR_R    : Global ECC double error interrupt enable.
0190   *           @arg RAMECC_IT_GLOBAL_DOUBLEERR_W    : Global ECC double error on byte write (BW) interrupt enable.
0191   *           @arg RAMECC_IT_GLOBAL_ALL            : All Global ECC interrupts enable mask.
0192   *           @arg RAMECC_IT_MONITOR_SINGLEERR_R   : Monitor ECC single error interrupt enable.
0193   *           @arg RAMECC_IT_MONITOR_DOUBLEERR_R   : Monitor ECC double error interrupt enable.
0194   *           @arg RAMECC_IT_MONITOR_DOUBLEERR_W   : Monitor ECC double error on byte write (BW) interrupt enable.
0195   *           @arg RAMECC_IT_MONITOR_ALL           : All Monitor ECC interrupts enable mask.
0196   * @retval None
0197   */
0198 #define __HAL_RAMECC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ( \
0199 (IS_RAMECC_GLOBAL_INTERRUPT(__INTERRUPT__)) ? (__HAL_RAMECC_DISABLE_GLOBAL_IT((__HANDLE__), (__INTERRUPT__))) :\
0200 (__HAL_RAMECC_DISABLE_MONITOR_IT((__HANDLE__), (__INTERRUPT__))))
0201
0202
0203 #define __HAL_RAMECC_GET_GLOBAL_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((RAMECC_TypeDef *)((uint32_t)(__HANDLE__)->Instance & 0xFFFFFF00U))->IER) & ((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID)) ? SET : RESET)
0204 #define __HAL_RAMECC_GET_MONITOR_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR) & ((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID)) ? SET : RESET)
0205
0206 /**
0207   * @brief  Check whether the specified RAMECC interrupt source is enabled or not.
0208   * @param  __HANDLE__    : Specifies the RAMECC Handle.
0209   * @param  __INTERRUPT__ : Specifies the RAMECC interrupt source to check.
0210   *          This parameter can be one of the following values:
0211   *           @arg RAMECC_IT_GLOBAL_ENABLE         : Global interrupt enable mask.
0212   *           @arg RAMECC_IT_GLOBAL_SINGLEERR_R    : Global ECC single error interrupt enable.
0213   *           @arg RAMECC_IT_GLOBAL_DOUBLEERR_R    : Global ECC double error interrupt enable.
0214   *           @arg RAMECC_IT_GLOBAL_DOUBLEERR_W    : Global ECC double error on byte write (BW) interrupt enable.
0215   *           @arg RAMECC_IT_GLOBAL_ALL            : All Global ECC interrupts enable mask.
0216   *           @arg RAMECC_IT_MONITOR_SINGLEERR_R   : Monitor ECC single error interrupt enable.
0217   *           @arg RAMECC_IT_MONITOR_DOUBLEERR_R   : Monitor ECC double error interrupt enable.
0218   *           @arg RAMECC_IT_MONITOR_DOUBLEERR_W   : Monitor ECC double error on byte write (BW) interrupt enable.
0219   *           @arg RAMECC_IT_MONITOR_ALL           : All Monitor ECC interrupts enable mask.
0220   * @retval The new state of __INTERRUPT__ (SET or RESET).
0221   */
0222 #define __HAL_RAMECC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (  \
0223 (IS_RAMECC_GLOBAL_INTERRUPT(__INTERRUPT__)) ? (__HAL_RAMECC_GET_GLOBAL_IT_SOURCE((__HANDLE__), (__INTERRUPT__))) :\
0224 (__HAL_RAMECC_GET_MONITOR_IT_SOURCE((__HANDLE__), (__INTERRUPT__))))
0225
0226
0227 /**
0228   * @brief  Get the RAMECC pending flags.
0229   * @param  __HANDLE__   : RAMECC handle.
0230   * @param  __FLAG__     : specifies the flag to clear.
0231   *          This parameter can be any combination of the following values:
0232   *            @arg RAMECC_FLAG_SINGLEERR_R  : RAMECC instance ECC single error detected and corrected flag.
0233   *            @arg RAMECC_FLAG_DOUBLEERR_R  : RAMECC instance ECC double error detected flag.
0234   *            @arg RAMECC_FLAG_DOUBLEERR_W  : RAMECC instance ECC double error on byte write (BW) detected flag.
0235   *            @arg RAMECC_FLAGS_ALL         : RAMECC instance all flag.
0236   * @retval The state of __FLAG__ (SET or RESET).
0237   */
0238 #define __HAL_RAMECC_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR &= (__FLAG__))
0239
0240
0241 /**
0242   * @brief  Clear the RAMECC pending flags.
0243   * @param  __HANDLE__   : RAMECC handle.
0244   * @param  __FLAG__     : specifies the flag to clear.
0245   *          This parameter can be any combination of the following values:
0246   *            @arg RAMECC_FLAG_SINGLEERR_R  : RAMECC instance ECC single error detected and corrected flag.
0247   *            @arg RAMECC_FLAG_DOUBLEERR_R  : RAMECC instance ECC double error detected flag.
0248   *            @arg RAMECC_FLAG_DOUBLEERR_W  : RAMECC instance ECC double error on byte write (BW) detected flag.
0249   *            @arg RAMECC_FLAGS_ALL         : RAMECC instance all flag.
0250   * @retval None.
0251   */
0252 #define __HAL_RAMECC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR &= ~(__FLAG__))
0253
0254 /**
0255   * @brief  Reset the RAMECC handle state.
0256   * @param  __HANDLE__    : Specifies the RAMECC Handle.
0257   * @retval None.
0258   */
0259 #define __HAL_RAMECC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RAMECC_STATE_RESET)
0260 /**
0261   * @}
0262   */
0263
0264 /* Exported functions --------------------------------------------------------*/
0265
0266 /** @defgroup RAMECC_Exported_Functions RAMECC Exported Functions
0267   * @ingroup RTEMSBSPsARMSTM32H7
0268   * @brief    RAMECC Exported functions
0269   * @{
0270   */
0271
0272 /** @defgroup RAMECC_Exported_Functions_Group1 Initialization and de-initialization functions
0273   * @ingroup RTEMSBSPsARMSTM32H7
0274   * @brief    Initialization and de-initialization functions
0275   * @{
0276   */
0277 HAL_StatusTypeDef HAL_RAMECC_Init(RAMECC_HandleTypeDef *hramecc);
0278 HAL_StatusTypeDef HAL_RAMECC_DeInit(RAMECC_HandleTypeDef *hramecc);
0279 /**
0280   * @}
0281   */
0282
0283 /** @defgroup RAMECC_Exported_Functions_Group2 monitoring operation functions
0284   * @ingroup RTEMSBSPsARMSTM32H7
0285   * @brief    monitoring operation functions
0286   * @{
0287   */
0288 HAL_StatusTypeDef HAL_RAMECC_StartMonitor(RAMECC_HandleTypeDef *hramecc);
0289 HAL_StatusTypeDef HAL_RAMECC_StopMonitor(RAMECC_HandleTypeDef *hramecc);
0290 HAL_StatusTypeDef HAL_RAMECC_EnableNotification(RAMECC_HandleTypeDef *hramecc, uint32_t Notifications);
0291 HAL_StatusTypeDef HAL_RAMECC_DisableNotification(RAMECC_HandleTypeDef *hramecc, uint32_t Notifications);
0292
0293 /**
0294   * @}
0295   */
0296
0297 /** @defgroup RAMECC_Exported_Functions_Group3 handle Interrupt and Callbacks Functions
0298   * @ingroup RTEMSBSPsARMSTM32H7
0299   * @brief    handle Interrupt and Callbacks Functions
0300   * @{
0301   */
0302 void              HAL_RAMECC_IRQHandler(RAMECC_HandleTypeDef *hramecc);
0303 void              HAL_RAMECC_DetectErrorCallback(RAMECC_HandleTypeDef *hramecc);
0304 #if (USE_HAL_RAMECC_REGISTER_CALLBACKS == 1)
0305 HAL_StatusTypeDef HAL_RAMECC_RegisterCallback(RAMECC_HandleTypeDef *hramecc, void (* pCallback)(RAMECC_HandleTypeDef *_hramecc));
0306 HAL_StatusTypeDef HAL_RAMECC_UnRegisterCallback(RAMECC_HandleTypeDef *hramecc);
0307 #endif /* USE_HAL_RAMECC_REGISTER_CALLBACKS */
0308 /**
0309   * @}
0310   */
0311
0312 /** @defgroup RAMECC_Exported_Functions_Group4 Error information functions
0313   * @ingroup RTEMSBSPsARMSTM32H7
0314   * @brief    Error information functions
0315   * @{
0316   */
0317 uint32_t HAL_RAMECC_GetFailingAddress(RAMECC_HandleTypeDef *hramecc);
0318 uint32_t HAL_RAMECC_GetFailingDataLow(RAMECC_HandleTypeDef *hramecc);
0319 uint32_t HAL_RAMECC_GetFailingDataHigh(RAMECC_HandleTypeDef *hramecc);
0320 uint32_t HAL_RAMECC_GetHammingErrorCode(RAMECC_HandleTypeDef *hramecc);
0321 uint32_t HAL_RAMECC_IsECCSingleErrorDetected(RAMECC_HandleTypeDef *hramecc);
0322 uint32_t HAL_RAMECC_IsECCDoubleErrorDetected(RAMECC_HandleTypeDef *hramecc);
0323 /**
0324   * @}
0325   */
0326
0327 /** @defgroup RAMECC_Exported_Functions_Group5 State and Error Functions
0328   * @ingroup RTEMSBSPsARMSTM32H7
0329   * @brief    State and Error Functions
0330   * @{
0331   */
0332 HAL_RAMECC_StateTypeDef HAL_RAMECC_GetState(RAMECC_HandleTypeDef *hramecc);
0333 uint32_t HAL_RAMECC_GetError(RAMECC_HandleTypeDef *hramecc);
0334 uint32_t HAL_RAMECC_GetRAMECCError(RAMECC_HandleTypeDef *hramecc);
0335 /**
0336   * @}
0337   */
0338
0339 /**
0340   * @}
0341   */
0342 /* Private Constants -------------------------------------------------------------*/
0343 /** @defgroup RAMECC_Private_Constants RAMECC Private Constants
0344   * @ingroup RTEMSBSPsARMSTM32H7
0345   * @brief    RAMECC private defines and constants
0346   * @{
0347   */
0348 /**
0349   * @}
0350   */
0351
0352 /* Private macros ------------------------------------------------------------*/
0353 /** @defgroup RAMECC_Private_Macros RAMECC Private Macros
0354   * @ingroup RTEMSBSPsARMSTM32H7
0355   * @brief    RAMECC private macros
0356   * @{
0357   */
0358
0359 #define IS_RAMECC_GLOBAL_INTERRUPT(INTERRUPT) (((INTERRUPT) == RAMECC_IT_GLOBAL_ENABLE)      || \
0360                                                ((INTERRUPT) == RAMECC_IT_GLOBAL_SINGLEERR_R) || \
0361                                                ((INTERRUPT) == RAMECC_IT_GLOBAL_DOUBLEERR_R) || \
0362                                                ((INTERRUPT) == RAMECC_IT_GLOBAL_DOUBLEERR_W) || \
0363                                                ((INTERRUPT) == RAMECC_IT_GLOBAL_ALL))
0364
0365
0366 #define IS_RAMECC_MONITOR_INTERRUPT(INTERRUPT) (((INTERRUPT) == RAMECC_IT_MONITOR_SINGLEERR_R) || \
0367                                                 ((INTERRUPT) == RAMECC_IT_MONITOR_DOUBLEERR_R) || \
0368                                                 ((INTERRUPT) == RAMECC_IT_MONITOR_DOUBLEERR_W) || \
0369                                                 ((INTERRUPT) == RAMECC_IT_MONITOR_ALL))
0370
0371 #define IS_RAMECC_INTERRUPT(INTERRUPT) ((IS_RAMECC_GLOBAL_INTERRUPT(INTERRUPT)) || \
0372                                         (IS_RAMECC_MONITOR_INTERRUPT(INTERRUPT)))
0373
0374 /**
0375   * @}
0376   */
0377
0378 /* Private functions ---------------------------------------------------------*/
0379 /** @defgroup RAMECC_Private_Functions RAMECC Private Functions
0380   * @ingroup RTEMSBSPsARMSTM32H7
0381   * @brief    RAMECC private  functions
0382   * @{
0383   */
0384 /**
0385   * @}
0386   */
0387
0388 /**
0389   * @}
0390   */
0391
0392 /**
0393   * @}
0394   */
0395 #ifdef __cplusplus
0396 }
0397 #endif
0398
0399 #endif /* STM32H7xx_HAL_RAMECC_H */