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File indexing completed on 2025-05-11 08:23:35
0001 /** 0002 ****************************************************************************** 0003 * @file stm32h7xx_hal_mmc.h 0004 * @author MCD Application Team 0005 * @brief Header file of MMC HAL module. 0006 ****************************************************************************** 0007 * @attention 0008 * 0009 * Copyright (c) 2017 STMicroelectronics. 0010 * All rights reserved. 0011 * 0012 * This software is licensed under terms that can be found in the LICENSE file 0013 * in the root directory of this software component. 0014 * If no LICENSE file comes with this software, it is provided AS-IS. 0015 * 0016 ****************************************************************************** 0017 */ 0018 0019 /* Define to prevent recursive inclusion -------------------------------------*/ 0020 #ifndef STM32H7xx_HAL_MMC_H 0021 #define STM32H7xx_HAL_MMC_H 0022 0023 #ifdef __cplusplus 0024 extern "C" { 0025 #endif 0026 0027 /* Includes ------------------------------------------------------------------*/ 0028 #include "stm32h7xx_ll_sdmmc.h" 0029 0030 /** @addtogroup STM32H7xx_HAL_Driver 0031 * @{ 0032 */ 0033 0034 /** @addtogroup MMC 0035 * @{ 0036 */ 0037 0038 /* Exported types ------------------------------------------------------------*/ 0039 /** @defgroup MMC_Exported_Types MMC Exported Types 0040 * @ingroup RTEMSBSPsARMSTM32H7 0041 * @{ 0042 */ 0043 0044 /** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure 0045 * @ingroup RTEMSBSPsARMSTM32H7 0046 * @{ 0047 */ 0048 typedef enum 0049 { 0050 HAL_MMC_STATE_RESET = ((uint32_t)0x00000000U), /*!< MMC not yet initialized or disabled */ 0051 HAL_MMC_STATE_READY = ((uint32_t)0x00000001U), /*!< MMC initialized and ready for use */ 0052 HAL_MMC_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< MMC Timeout state */ 0053 HAL_MMC_STATE_BUSY = ((uint32_t)0x00000003U), /*!< MMC process ongoing */ 0054 HAL_MMC_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< MMC Programming State */ 0055 HAL_MMC_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< MMC Receinving State */ 0056 HAL_MMC_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< MMC Transfer State */ 0057 HAL_MMC_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< MMC is in error state */ 0058 } HAL_MMC_StateTypeDef; 0059 /** 0060 * @} 0061 */ 0062 0063 /** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure 0064 * @ingroup RTEMSBSPsARMSTM32H7 0065 * @{ 0066 */ 0067 typedef uint32_t HAL_MMC_CardStateTypeDef; 0068 0069 #define HAL_MMC_CARD_IDLE 0x00000000U /*!< Card is in idle state (can't be checked by CMD13) */ 0070 #define HAL_MMC_CARD_READY 0x00000001U /*!< Card state is ready (can't be checked by CMD13) */ 0071 #define HAL_MMC_CARD_IDENTIFICATION 0x00000002U /*!< Card is in identification state (can't be checked by CMD13) */ 0072 #define HAL_MMC_CARD_STANDBY 0x00000003U /*!< Card is in standby state */ 0073 #define HAL_MMC_CARD_TRANSFER 0x00000004U /*!< Card is in transfer state */ 0074 #define HAL_MMC_CARD_SENDING 0x00000005U /*!< Card is sending an operation */ 0075 #define HAL_MMC_CARD_RECEIVING 0x00000006U /*!< Card is receiving operation information */ 0076 #define HAL_MMC_CARD_PROGRAMMING 0x00000007U /*!< Card is in programming state */ 0077 #define HAL_MMC_CARD_DISCONNECTED 0x00000008U /*!< Card is disconnected */ 0078 #define HAL_MMC_CARD_BUSTEST 0x00000009U /*!< Card is in bus test state */ 0079 #define HAL_MMC_CARD_SLEEP 0x0000000AU /*!< Card is in sleep state (can't be checked by CMD13) */ 0080 #define HAL_MMC_CARD_ERROR 0x000000FFU /*!< Card response Error (can't be checked by CMD13) */ 0081 /** 0082 * @} 0083 */ 0084 0085 /** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition 0086 * @ingroup RTEMSBSPsARMSTM32H7 0087 * @{ 0088 */ 0089 #define MMC_InitTypeDef SDMMC_InitTypeDef 0090 #define MMC_TypeDef SDMMC_TypeDef 0091 0092 /** 0093 * @brief MMC Card Information Structure definition 0094 */ 0095 typedef struct 0096 { 0097 uint32_t CardType; /*!< Specifies the card Type */ 0098 0099 uint32_t Class; /*!< Specifies the class of the card class */ 0100 0101 uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */ 0102 0103 uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */ 0104 0105 uint32_t BlockSize; /*!< Specifies one block size in bytes */ 0106 0107 uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */ 0108 0109 uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */ 0110 0111 } HAL_MMC_CardInfoTypeDef; 0112 0113 /** 0114 * @brief MMC handle Structure definition 0115 */ 0116 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 0117 typedef struct __MMC_HandleTypeDef 0118 #else 0119 typedef struct 0120 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 0121 { 0122 MMC_TypeDef *Instance; /*!< MMC registers base address */ 0123 0124 MMC_InitTypeDef Init; /*!< MMC required parameters */ 0125 0126 HAL_LockTypeDef Lock; /*!< MMC locking object */ 0127 0128 const uint8_t *pTxBuffPtr; /*!< Pointer to MMC Tx transfer Buffer */ 0129 0130 uint32_t TxXferSize; /*!< MMC Tx Transfer size */ 0131 0132 uint8_t *pRxBuffPtr; /*!< Pointer to MMC Rx transfer Buffer */ 0133 0134 uint32_t RxXferSize; /*!< MMC Rx Transfer size */ 0135 0136 __IO uint32_t Context; /*!< MMC transfer context */ 0137 0138 __IO HAL_MMC_StateTypeDef State; /*!< MMC card State */ 0139 0140 __IO uint32_t ErrorCode; /*!< MMC Card Error codes */ 0141 0142 HAL_MMC_CardInfoTypeDef MmcCard; /*!< MMC Card information */ 0143 0144 uint32_t CSD[4U]; /*!< MMC card specific data table */ 0145 0146 uint32_t CID[4U]; /*!< MMC card identification number table */ 0147 0148 uint32_t Ext_CSD[128]; 0149 0150 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 0151 void (* TxCpltCallback)(struct __MMC_HandleTypeDef *hmmc); 0152 void (* RxCpltCallback)(struct __MMC_HandleTypeDef *hmmc); 0153 void (* ErrorCallback)(struct __MMC_HandleTypeDef *hmmc); 0154 void (* AbortCpltCallback)(struct __MMC_HandleTypeDef *hmmc); 0155 void (* Read_DMADblBuf0CpltCallback)(struct __MMC_HandleTypeDef *hmmc); 0156 void (* Read_DMADblBuf1CpltCallback)(struct __MMC_HandleTypeDef *hmmc); 0157 void (* Write_DMADblBuf0CpltCallback)(struct __MMC_HandleTypeDef *hmmc); 0158 void (* Write_DMADblBuf1CpltCallback)(struct __MMC_HandleTypeDef *hmmc); 0159 0160 void (* MspInitCallback)(struct __MMC_HandleTypeDef *hmmc); 0161 void (* MspDeInitCallback)(struct __MMC_HandleTypeDef *hmmc); 0162 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 0163 } MMC_HandleTypeDef; 0164 0165 0166 /** 0167 * @} 0168 */ 0169 0170 /** @defgroup MMC_Exported_Types_Group4 Card Specific Data: CSD Register 0171 * @ingroup RTEMSBSPsARMSTM32H7 0172 * @{ 0173 */ 0174 typedef struct 0175 { 0176 __IO uint8_t CSDStruct; /*!< CSD structure */ 0177 __IO uint8_t SysSpecVersion; /*!< System specification version */ 0178 __IO uint8_t Reserved1; /*!< Reserved */ 0179 __IO uint8_t TAAC; /*!< Data read access time 1 */ 0180 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */ 0181 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ 0182 __IO uint16_t CardComdClasses; /*!< Card command classes */ 0183 __IO uint8_t RdBlockLen; /*!< Max. read data block length */ 0184 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ 0185 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */ 0186 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */ 0187 __IO uint8_t DSRImpl; /*!< DSR implemented */ 0188 __IO uint8_t Reserved2; /*!< Reserved */ 0189 __IO uint32_t DeviceSize; /*!< Device Size */ 0190 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ 0191 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ 0192 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ 0193 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ 0194 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */ 0195 __IO uint8_t EraseGrSize; /*!< Erase group size */ 0196 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */ 0197 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */ 0198 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */ 0199 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */ 0200 __IO uint8_t WrSpeedFact; /*!< Write speed factor */ 0201 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ 0202 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ 0203 __IO uint8_t Reserved3; /*!< Reserved */ 0204 __IO uint8_t ContentProtectAppli; /*!< Content protection application */ 0205 __IO uint8_t FileFormatGroup; /*!< File format group */ 0206 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ 0207 __IO uint8_t PermWrProtect; /*!< Permanent write protection */ 0208 __IO uint8_t TempWrProtect; /*!< Temporary write protection */ 0209 __IO uint8_t FileFormat; /*!< File format */ 0210 __IO uint8_t ECC; /*!< ECC code */ 0211 __IO uint8_t CSD_CRC; /*!< CSD CRC */ 0212 __IO uint8_t Reserved4; /*!< Always 1 */ 0213 0214 } HAL_MMC_CardCSDTypeDef; 0215 /** 0216 * @} 0217 */ 0218 0219 /** @defgroup MMC_Exported_Types_Group5 Card Identification Data: CID Register 0220 * @ingroup RTEMSBSPsARMSTM32H7 0221 * @{ 0222 */ 0223 typedef struct 0224 { 0225 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */ 0226 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */ 0227 __IO uint32_t ProdName1; /*!< Product Name part1 */ 0228 __IO uint8_t ProdName2; /*!< Product Name part2 */ 0229 __IO uint8_t ProdRev; /*!< Product Revision */ 0230 __IO uint32_t ProdSN; /*!< Product Serial Number */ 0231 __IO uint8_t Reserved1; /*!< Reserved1 */ 0232 __IO uint16_t ManufactDate; /*!< Manufacturing Date */ 0233 __IO uint8_t CID_CRC; /*!< CID CRC */ 0234 __IO uint8_t Reserved2; /*!< Always 1 */ 0235 0236 } HAL_MMC_CardCIDTypeDef; 0237 /** 0238 * @} 0239 */ 0240 0241 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 0242 /** @defgroup MMC_Exported_Types_Group6 MMC Callback ID enumeration definition 0243 * @ingroup RTEMSBSPsARMSTM32H7 0244 * @{ 0245 */ 0246 typedef enum 0247 { 0248 HAL_MMC_TX_CPLT_CB_ID = 0x00U, /*!< MMC Tx Complete Callback ID */ 0249 HAL_MMC_RX_CPLT_CB_ID = 0x01U, /*!< MMC Rx Complete Callback ID */ 0250 HAL_MMC_ERROR_CB_ID = 0x02U, /*!< MMC Error Callback ID */ 0251 HAL_MMC_ABORT_CB_ID = 0x03U, /*!< MMC Abort Callback ID */ 0252 HAL_MMC_READ_DMA_DBL_BUF0_CPLT_CB_ID = 0x04U, /*!< MMC Rx DMA Double Buffer 0 Complete Callback ID */ 0253 HAL_MMC_READ_DMA_DBL_BUF1_CPLT_CB_ID = 0x05U, /*!< MMC Rx DMA Double Buffer 1 Complete Callback ID */ 0254 HAL_MMC_WRITE_DMA_DBL_BUF0_CPLT_CB_ID = 0x06U, /*!< MMC Tx DMA Double Buffer 0 Complete Callback ID */ 0255 HAL_MMC_WRITE_DMA_DBL_BUF1_CPLT_CB_ID = 0x07U, /*!< MMC Tx DMA Double Buffer 1 Complete Callback ID */ 0256 0257 HAL_MMC_MSP_INIT_CB_ID = 0x10U, /*!< MMC MspInit Callback ID */ 0258 HAL_MMC_MSP_DEINIT_CB_ID = 0x11U /*!< MMC MspDeInit Callback ID */ 0259 } HAL_MMC_CallbackIDTypeDef; 0260 /** 0261 * @} 0262 */ 0263 0264 /** @defgroup MMC_Exported_Types_Group7 MMC Callback pointer definition 0265 * @ingroup RTEMSBSPsARMSTM32H7 0266 * @{ 0267 */ 0268 typedef void (*pMMC_CallbackTypeDef)(MMC_HandleTypeDef *hmmc); 0269 /** 0270 * @} 0271 */ 0272 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 0273 /** 0274 * @} 0275 */ 0276 0277 /* Exported constants --------------------------------------------------------*/ 0278 /** @defgroup MMC_Exported_Constants Exported Constants 0279 * @ingroup RTEMSBSPsARMSTM32H7 0280 * @{ 0281 */ 0282 0283 #define MMC_BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */ 0284 0285 /** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition 0286 * @ingroup RTEMSBSPsARMSTM32H7 0287 * @{ 0288 */ 0289 #define HAL_MMC_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ 0290 #define HAL_MMC_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */ 0291 #define HAL_MMC_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */ 0292 #define HAL_MMC_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */ 0293 #define HAL_MMC_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */ 0294 #define HAL_MMC_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */ 0295 #define HAL_MMC_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */ 0296 #define HAL_MMC_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */ 0297 #define HAL_MMC_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the */ 0298 /*!< number of transferred bytes does not match the block length */ 0299 #define HAL_MMC_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */ 0300 #define HAL_MMC_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */ 0301 #define HAL_MMC_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */ 0302 #define HAL_MMC_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock */ 0303 /*!< command or if there was an attempt to access a locked card */ 0304 #define HAL_MMC_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */ 0305 #define HAL_MMC_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */ 0306 #define HAL_MMC_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */ 0307 #define HAL_MMC_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */ 0308 #define HAL_MMC_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */ 0309 #define HAL_MMC_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */ 0310 #define HAL_MMC_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */ 0311 #define HAL_MMC_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */ 0312 #define HAL_MMC_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */ 0313 #define HAL_MMC_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */ 0314 #define HAL_MMC_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out */ 0315 /*!< of erase sequence command was received */ 0316 #define HAL_MMC_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */ 0317 #define HAL_MMC_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */ 0318 #define HAL_MMC_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */ 0319 #define HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */ 0320 #define HAL_MMC_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */ 0321 #define HAL_MMC_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */ 0322 #define HAL_MMC_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */ 0323 #define HAL_MMC_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */ 0324 #define HAL_MMC_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ 0325 0326 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 0327 #define HAL_MMC_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */ 0328 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 0329 /** 0330 * @} 0331 */ 0332 0333 /** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration 0334 * @ingroup RTEMSBSPsARMSTM32H7 0335 * @{ 0336 */ 0337 #define MMC_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */ 0338 #define MMC_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */ 0339 #define MMC_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */ 0340 #define MMC_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */ 0341 #define MMC_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */ 0342 #define MMC_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */ 0343 #define MMC_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */ 0344 0345 /** 0346 * @} 0347 */ 0348 0349 /** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode 0350 * @ingroup RTEMSBSPsARMSTM32H7 0351 * @{ 0352 */ 0353 /** 0354 * @brief 0355 */ 0356 #define MMC_HIGH_VOLTAGE_RANGE 0x80FF8000U /*!< High voltage in byte mode */ 0357 #define MMC_DUAL_VOLTAGE_RANGE 0x80FF8080U /*!< Dual voltage in byte mode */ 0358 #define MMC_LOW_VOLTAGE_RANGE 0x80000080U /*!< Low voltage in byte mode */ 0359 #define EMMC_HIGH_VOLTAGE_RANGE 0xC0FF8000U /*!< High voltage in sector mode */ 0360 #define EMMC_DUAL_VOLTAGE_RANGE 0xC0FF8080U /*!< Dual voltage in sector mode */ 0361 #define EMMC_LOW_VOLTAGE_RANGE 0xC0000080U /*!< Low voltage in sector mode */ 0362 #define MMC_INVALID_VOLTAGE_RANGE 0x0001FF01U 0363 /** 0364 * @} 0365 */ 0366 0367 /** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards 0368 * @ingroup RTEMSBSPsARMSTM32H7 0369 * @{ 0370 */ 0371 #define MMC_LOW_CAPACITY_CARD ((uint32_t)0x00000000U) /*!< MMC Card Capacity <=2Gbytes */ 0372 #define MMC_HIGH_CAPACITY_CARD ((uint32_t)0x00000001U) /*!< MMC Card Capacity >2Gbytes and <2Tbytes */ 0373 0374 /** 0375 * @} 0376 */ 0377 0378 /** @defgroup MMC_Exported_Constansts_Group5 MMC Erase Type 0379 * @ingroup RTEMSBSPsARMSTM32H7 0380 * @{ 0381 */ 0382 #define HAL_MMC_ERASE 0x00000000U /*!< Erase the erase groups identified by CMD35 & 36 */ 0383 #define HAL_MMC_TRIM 0x00000001U /*!< Erase the write blocks identified by CMD35 & 36 */ 0384 #define HAL_MMC_DISCARD 0x00000003U /*!< Discard the write blocks identified by CMD35 & 36 */ 0385 #define HAL_MMC_SECURE_ERASE 0x80000000U /*!< Perform a secure purge according SRT on the erase groups identified by CMD35 & 36 */ 0386 #define HAL_MMC_SECURE_TRIM_STEP1 0x80000001U /*!< Mark the write blocks identified by CMD35 & 36 for secure erase */ 0387 #define HAL_MMC_SECURE_TRIM_STEP2 0x80008000U /*!< Perform a secure purge according SRT on the write blocks previously identified */ 0388 0389 #define IS_MMC_ERASE_TYPE(TYPE) (((TYPE) == HAL_MMC_ERASE) || \ 0390 ((TYPE) == HAL_MMC_TRIM) || \ 0391 ((TYPE) == HAL_MMC_DISCARD) || \ 0392 ((TYPE) == HAL_MMC_SECURE_ERASE) || \ 0393 ((TYPE) == HAL_MMC_SECURE_TRIM_STEP1) || \ 0394 ((TYPE) == HAL_MMC_SECURE_TRIM_STEP2)) 0395 /** 0396 * @} 0397 */ 0398 0399 /** @defgroup MMC_Exported_Constansts_Group6 MMC Secure Removal Type 0400 * @ingroup RTEMSBSPsARMSTM32H7 0401 * @{ 0402 */ 0403 #define HAL_MMC_SRT_ERASE 0x00000001U /*!< Information removed by an erase */ 0404 #define HAL_MMC_SRT_WRITE_CHAR_ERASE 0x00000002U /*!< Information removed by an overwriting with a character followed by an erase */ 0405 #define HAL_MMC_SRT_WRITE_CHAR_COMPL_RANDOM 0x00000004U /*!< Information removed by an overwriting with a character, its complement then a random character */ 0406 #define HAL_MMC_SRT_VENDOR_DEFINED 0x00000008U /*!< Information removed using a vendor defined */ 0407 0408 0409 #define IS_MMC_SRT_TYPE(TYPE) (((TYPE) == HAL_MMC_SRT_ERASE) || \ 0410 ((TYPE) == HAL_MMC_SRT_WRITE_CHAR_ERASE) || \ 0411 ((TYPE) == HAL_MMC_SRT_WRITE_CHAR_COMPL_RANDOM) || \ 0412 ((TYPE) == HAL_MMC_SRT_VENDOR_DEFINED)) 0413 /** 0414 * @} 0415 */ 0416 0417 /** 0418 * @} 0419 */ 0420 0421 /* Exported macro ------------------------------------------------------------*/ 0422 /** @defgroup MMC_Exported_macros MMC Exported Macros 0423 * @ingroup RTEMSBSPsARMSTM32H7 0424 * @brief macros to handle interrupts and specific clock configurations 0425 * @{ 0426 */ 0427 /** @brief Reset MMC handle state. 0428 * @param __HANDLE__ MMC Handle. 0429 * @retval None 0430 */ 0431 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 0432 #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) do { \ 0433 (__HANDLE__)->State = HAL_MMC_STATE_RESET; \ 0434 (__HANDLE__)->MspInitCallback = NULL; \ 0435 (__HANDLE__)->MspDeInitCallback = NULL; \ 0436 } while(0) 0437 #else 0438 #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_MMC_STATE_RESET) 0439 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 0440 0441 /** 0442 * @brief Enable the MMC device interrupt. 0443 * @param __HANDLE__ MMC Handle. 0444 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled. 0445 * This parameter can be one or a combination of the following values: 0446 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 0447 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 0448 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 0449 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 0450 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 0451 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 0452 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 0453 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 0454 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 0455 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 0456 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 0457 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 0458 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 0459 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 0460 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 0461 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 0462 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 0463 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 0464 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 0465 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 0466 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 0467 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 0468 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 0469 * @retval None 0470 */ 0471 #define __HAL_MMC_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 0472 0473 /** 0474 * @brief Disable the MMC device interrupt. 0475 * @param __HANDLE__ MMC Handle. 0476 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled. 0477 * This parameter can be one or a combination of the following values: 0478 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 0479 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 0480 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 0481 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 0482 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 0483 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 0484 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 0485 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 0486 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 0487 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 0488 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 0489 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 0490 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 0491 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 0492 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 0493 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 0494 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 0495 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 0496 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 0497 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 0498 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 0499 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 0500 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 0501 * @retval None 0502 */ 0503 #define __HAL_MMC_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 0504 0505 /** 0506 * @brief Check whether the specified MMC flag is set or not. 0507 * @param __HANDLE__ MMC Handle. 0508 * @param __FLAG__ specifies the flag to check. 0509 * This parameter can be one of the following values: 0510 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) 0511 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) 0512 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout 0513 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout 0514 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error 0515 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error 0516 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) 0517 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) 0518 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) 0519 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold 0520 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) 0521 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 0522 * @arg SDMMC_FLAG_DPSMACT: Data path state machine active 0523 * @arg SDMMC_FLAG_CPSMACT: Command path state machine active 0524 * @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty 0525 * @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full 0526 * @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full 0527 * @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full 0528 * @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty 0529 * @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty 0530 * @arg SDMMC_FLAG_BUSYD0: Inverted value of SDMMC_D0 line (Busy) 0531 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected 0532 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received 0533 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received 0534 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout 0535 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion 0536 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure 0537 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error 0538 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete 0539 * @retval The new state of MMC FLAG (SET or RESET). 0540 */ 0541 #define __HAL_MMC_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) 0542 0543 /** 0544 * @brief Clear the MMC's pending flags. 0545 * @param __HANDLE__ MMC Handle. 0546 * @param __FLAG__ specifies the flag to clear. 0547 * This parameter can be one or a combination of the following values: 0548 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) 0549 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) 0550 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout 0551 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout 0552 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error 0553 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error 0554 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) 0555 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) 0556 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) 0557 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold 0558 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) 0559 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 0560 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected 0561 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received 0562 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received 0563 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout 0564 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion 0565 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure 0566 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error 0567 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete 0568 * @retval None 0569 */ 0570 #define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) 0571 0572 /** 0573 * @brief Check whether the specified MMC interrupt has occurred or not. 0574 * @param __HANDLE__ MMC Handle. 0575 * @param __INTERRUPT__ specifies the SDMMC interrupt source to check. 0576 * This parameter can be one of the following values: 0577 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 0578 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 0579 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 0580 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 0581 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 0582 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 0583 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 0584 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 0585 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 0586 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 0587 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 0588 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 0589 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 0590 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 0591 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 0592 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 0593 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 0594 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 0595 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 0596 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 0597 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 0598 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 0599 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 0600 * @retval The new state of MMC IT (SET or RESET). 0601 */ 0602 #define __HAL_MMC_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 0603 0604 /** 0605 * @brief Clear the MMC's interrupt pending bits. 0606 * @param __HANDLE__ MMC Handle. 0607 * @param __INTERRUPT__ specifies the interrupt pending bit to clear. 0608 * This parameter can be one or a combination of the following values: 0609 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 0610 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 0611 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 0612 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 0613 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 0614 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 0615 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 0616 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 0617 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 0618 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 0619 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 0620 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 0621 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 0622 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 0623 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 0624 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 0625 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 0626 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 0627 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 0628 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 0629 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 0630 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 0631 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 0632 * @retval None 0633 */ 0634 #define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 0635 0636 /** 0637 * @} 0638 */ 0639 0640 /* Include MMC HAL Extension module */ 0641 #include "stm32h7xx_hal_mmc_ex.h" 0642 0643 /* Exported functions --------------------------------------------------------*/ 0644 /** @defgroup MMC_Exported_Functions MMC Exported Functions 0645 * @ingroup RTEMSBSPsARMSTM32H7 0646 * @{ 0647 */ 0648 0649 /** @defgroup MMC_Exported_Functions_Group1 Initialization and de-initialization functions 0650 * @ingroup RTEMSBSPsARMSTM32H7 0651 * @{ 0652 */ 0653 HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc); 0654 HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc); 0655 HAL_StatusTypeDef HAL_MMC_DeInit(MMC_HandleTypeDef *hmmc); 0656 void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc); 0657 void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc); 0658 0659 /** 0660 * @} 0661 */ 0662 0663 /** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions 0664 * @ingroup RTEMSBSPsARMSTM32H7 0665 * @{ 0666 */ 0667 /* Blocking mode: Polling */ 0668 HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, 0669 uint32_t NumberOfBlocks, 0670 uint32_t Timeout); 0671 HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint32_t BlockAdd, 0672 uint32_t NumberOfBlocks, uint32_t Timeout); 0673 HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd); 0674 /* Non-Blocking mode: IT */ 0675 HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, 0676 uint32_t NumberOfBlocks); 0677 HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint32_t BlockAdd, 0678 uint32_t NumberOfBlocks); 0679 /* Non-Blocking mode: DMA */ 0680 HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, 0681 uint32_t NumberOfBlocks); 0682 HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint32_t BlockAdd, 0683 uint32_t NumberOfBlocks); 0684 0685 void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc); 0686 0687 /* Callback in non blocking modes (DMA) */ 0688 void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc); 0689 void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc); 0690 void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc); 0691 void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc); 0692 0693 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 0694 /* MMC callback registering/unregistering */ 0695 HAL_StatusTypeDef HAL_MMC_RegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId, 0696 pMMC_CallbackTypeDef pCallback); 0697 HAL_StatusTypeDef HAL_MMC_UnRegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId); 0698 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 0699 /** 0700 * @} 0701 */ 0702 0703 /** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions 0704 * @ingroup RTEMSBSPsARMSTM32H7 0705 * @{ 0706 */ 0707 HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode); 0708 HAL_StatusTypeDef HAL_MMC_ConfigSpeedBusOperation(MMC_HandleTypeDef *hmmc, uint32_t SpeedMode); 0709 /** 0710 * @} 0711 */ 0712 0713 /** @defgroup MMC_Exported_Functions_Group4 MMC card related functions 0714 * @ingroup RTEMSBSPsARMSTM32H7 0715 * @{ 0716 */ 0717 HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc); 0718 HAL_StatusTypeDef HAL_MMC_GetCardCID(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID); 0719 HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD); 0720 HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo); 0721 HAL_StatusTypeDef HAL_MMC_GetCardExtCSD(MMC_HandleTypeDef *hmmc, uint32_t *pExtCSD, uint32_t Timeout); 0722 /** 0723 * @} 0724 */ 0725 0726 /** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions 0727 * @ingroup RTEMSBSPsARMSTM32H7 0728 * @{ 0729 */ 0730 HAL_MMC_StateTypeDef HAL_MMC_GetState(MMC_HandleTypeDef *hmmc); 0731 uint32_t HAL_MMC_GetError(MMC_HandleTypeDef *hmmc); 0732 /** 0733 * @} 0734 */ 0735 0736 /** @defgroup MMC_Exported_Functions_Group6 Peripheral Abort management 0737 * @ingroup RTEMSBSPsARMSTM32H7 0738 * @{ 0739 */ 0740 HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc); 0741 HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc); 0742 /** 0743 * @} 0744 */ 0745 0746 /** @defgroup MMC_Exported_Functions_Group7 Peripheral Erase management 0747 * @ingroup RTEMSBSPsARMSTM32H7 0748 * @{ 0749 */ 0750 HAL_StatusTypeDef HAL_MMC_EraseSequence(MMC_HandleTypeDef *hmmc, uint32_t EraseType, uint32_t BlockStartAdd, 0751 uint32_t BlockEndAdd); 0752 HAL_StatusTypeDef HAL_MMC_Sanitize(MMC_HandleTypeDef *hmmc); 0753 HAL_StatusTypeDef HAL_MMC_ConfigSecRemovalType(MMC_HandleTypeDef *hmmc, uint32_t SRTMode); 0754 HAL_StatusTypeDef HAL_MMC_GetSupportedSecRemovalType(MMC_HandleTypeDef *hmmc, uint32_t *SupportedSRT); 0755 /** 0756 * @} 0757 */ 0758 0759 /** @defgroup MMC_Exported_Functions_Group8 Peripheral Sleep management 0760 * @ingroup RTEMSBSPsARMSTM32H7 0761 * @{ 0762 */ 0763 HAL_StatusTypeDef HAL_MMC_SleepDevice(MMC_HandleTypeDef *hmmc); 0764 HAL_StatusTypeDef HAL_MMC_AwakeDevice(MMC_HandleTypeDef *hmmc); 0765 /** 0766 * @} 0767 */ 0768 /* Private types -------------------------------------------------------------*/ 0769 /** @defgroup MMC_Private_Types MMC Private Types 0770 * @ingroup RTEMSBSPsARMSTM32H7 0771 * @{ 0772 */ 0773 0774 /** 0775 * @} 0776 */ 0777 0778 /* Private defines -----------------------------------------------------------*/ 0779 /** @defgroup MMC_Private_Defines MMC Private Defines 0780 * @ingroup RTEMSBSPsARMSTM32H7 0781 * @{ 0782 */ 0783 #define MMC_EXT_CSD_DATA_SEC_SIZE_INDEX 61 0784 #define MMC_EXT_CSD_DATA_SEC_SIZE_POS 8 0785 /** 0786 * @} 0787 */ 0788 0789 /* Private variables ---------------------------------------------------------*/ 0790 /** @defgroup MMC_Private_Variables MMC Private Variables 0791 * @ingroup RTEMSBSPsARMSTM32H7 0792 * @{ 0793 */ 0794 0795 /** 0796 * @} 0797 */ 0798 0799 /* Private constants ---------------------------------------------------------*/ 0800 /** @defgroup MMC_Private_Constants MMC Private Constants 0801 * @ingroup RTEMSBSPsARMSTM32H7 0802 * @{ 0803 */ 0804 0805 /** 0806 * @} 0807 */ 0808 0809 /* Private macros ------------------------------------------------------------*/ 0810 /** @defgroup MMC_Private_Macros MMC Private Macros 0811 * @ingroup RTEMSBSPsARMSTM32H7 0812 * @{ 0813 */ 0814 0815 /** 0816 * @} 0817 */ 0818 0819 /* Private functions prototypes ----------------------------------------------*/ 0820 /** @defgroup MMC_Private_Functions_Prototypes MMC Private Functions Prototypes 0821 * @ingroup RTEMSBSPsARMSTM32H7 0822 * @{ 0823 */ 0824 0825 /** 0826 * @} 0827 */ 0828 0829 /* Private functions ---------------------------------------------------------*/ 0830 /** @defgroup MMC_Private_Functions MMC Private Functions 0831 * @ingroup RTEMSBSPsARMSTM32H7 0832 * @{ 0833 */ 0834 0835 /** 0836 * @} 0837 */ 0838 0839 0840 /** 0841 * @} 0842 */ 0843 0844 /** 0845 * @} 0846 */ 0847 0848 /** 0849 * @} 0850 */ 0851 0852 #ifdef __cplusplus 0853 } 0854 #endif 0855 0856 0857 #endif /* STM32H7xx_HAL_MMC_H */
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