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File indexing completed on 2025-05-11 08:23:35

0001 /**
0002   ******************************************************************************
0003   * @file    stm32h7xx_hal_lptim.h
0004   * @author  MCD Application Team
0005   * @brief   Header file of LPTIM HAL module.
0006   ******************************************************************************
0007   * @attention
0008   *
0009   * Copyright (c) 2017 STMicroelectronics.
0010   * All rights reserved.
0011   *
0012   * This software is licensed under terms that can be found in the LICENSE file
0013   * in the root directory of this software component.
0014   * If no LICENSE file comes with this software, it is provided AS-IS.
0015   *
0016   ******************************************************************************
0017   */
0018 
0019 /* Define to prevent recursive inclusion -------------------------------------*/
0020 #ifndef STM32H7xx_HAL_LPTIM_H
0021 #define STM32H7xx_HAL_LPTIM_H
0022 
0023 #ifdef __cplusplus
0024 extern "C" {
0025 #endif
0026 
0027 /* Includes ------------------------------------------------------------------*/
0028 #include "stm32h7xx_hal_def.h"
0029 
0030 /** @addtogroup STM32H7xx_HAL_Driver
0031   * @{
0032   */
0033 
0034 #if defined (LPTIM1) || defined (LPTIM2) || defined (LPTIM3) || defined (LPTIM4) || defined (LPTIM5)
0035 
0036 /** @addtogroup LPTIM
0037   * @{
0038   */
0039 
0040 /* Exported types ------------------------------------------------------------*/
0041 /** @defgroup LPTIM_Exported_Types LPTIM Exported Types
0042   * @ingroup RTEMSBSPsARMSTM32H7
0043   * @{
0044   */
0045 
0046 /**
0047   * @brief  LPTIM Clock configuration definition
0048   */
0049 typedef struct
0050 {
0051   uint32_t Source;         /*!< Selects the clock source.
0052                            This parameter can be a value of @ref LPTIM_Clock_Source   */
0053 
0054   uint32_t Prescaler;      /*!< Specifies the counter clock Prescaler.
0055                            This parameter can be a value of @ref LPTIM_Clock_Prescaler */
0056 
0057 } LPTIM_ClockConfigTypeDef;
0058 
0059 /**
0060   * @brief  LPTIM Clock configuration definition
0061   */
0062 typedef struct
0063 {
0064   uint32_t Polarity;      /*!< Selects the polarity of the active edge for the counter unit
0065                            if the ULPTIM input is selected.
0066                            Note: This parameter is used only when Ultra low power clock source is used.
0067                            Note: If the polarity is configured on 'both edges', an auxiliary clock
0068                            (one of the Low power oscillator) must be active.
0069                            This parameter can be a value of @ref LPTIM_Clock_Polarity */
0070 
0071   uint32_t SampleTime;     /*!< Selects the clock sampling time to configure the clock glitch filter.
0072                            Note: This parameter is used only when Ultra low power clock source is used.
0073                            This parameter can be a value of @ref LPTIM_Clock_Sample_Time */
0074 
0075 } LPTIM_ULPClockConfigTypeDef;
0076 
0077 /**
0078   * @brief  LPTIM Trigger configuration definition
0079   */
0080 typedef struct
0081 {
0082   uint32_t Source;        /*!< Selects the Trigger source.
0083                           This parameter can be a value of @ref LPTIM_Trigger_Source */
0084 
0085   uint32_t ActiveEdge;    /*!< Selects the Trigger active edge.
0086                           Note: This parameter is used only when an external trigger is used.
0087                           This parameter can be a value of @ref LPTIM_External_Trigger_Polarity */
0088 
0089   uint32_t SampleTime;    /*!< Selects the trigger sampling time to configure the clock glitch filter.
0090                           Note: This parameter is used only when an external trigger is used.
0091                           This parameter can be a value of @ref LPTIM_Trigger_Sample_Time  */
0092 } LPTIM_TriggerConfigTypeDef;
0093 
0094 /**
0095   * @brief  LPTIM Initialization Structure definition
0096   */
0097 typedef struct
0098 {
0099   LPTIM_ClockConfigTypeDef     Clock;             /*!< Specifies the clock parameters */
0100 
0101   LPTIM_ULPClockConfigTypeDef  UltraLowPowerClock;/*!< Specifies the Ultra Low Power clock parameters */
0102 
0103   LPTIM_TriggerConfigTypeDef   Trigger;           /*!< Specifies the Trigger parameters */
0104 
0105   uint32_t                     OutputPolarity;    /*!< Specifies the Output polarity.
0106                                                   This parameter can be a value of @ref LPTIM_Output_Polarity */
0107 
0108   uint32_t                     UpdateMode;        /*!< Specifies whether the update of the autoreload and the compare
0109                                                   values is done immediately or after the end of current period.
0110                                                   This parameter can be a value of @ref LPTIM_Updating_Mode */
0111 
0112   uint32_t                     CounterSource;     /*!< Specifies whether the counter is incremented each internal event
0113                                                   or each external event.
0114                                                   This parameter can be a value of @ref LPTIM_Counter_Source */
0115 
0116   uint32_t                     Input1Source;      /*!< Specifies source selected for input1 (GPIO or comparator output).
0117                                                   This parameter can be a value of @ref LPTIM_Input1_Source */
0118 
0119   uint32_t                     Input2Source;      /*!< Specifies source selected for input2 (GPIO or comparator output).
0120                                                   Note: This parameter is used only for encoder feature so is used only
0121                                                   for LPTIM1 instance.
0122                                                   This parameter can be a value of @ref LPTIM_Input2_Source */
0123 } LPTIM_InitTypeDef;
0124 
0125 /**
0126   * @brief  HAL LPTIM State structure definition
0127   */
0128 typedef enum
0129 {
0130   HAL_LPTIM_STATE_RESET            = 0x00U,    /*!< Peripheral not yet initialized or disabled  */
0131   HAL_LPTIM_STATE_READY            = 0x01U,    /*!< Peripheral Initialized and ready for use    */
0132   HAL_LPTIM_STATE_BUSY             = 0x02U,    /*!< An internal process is ongoing              */
0133   HAL_LPTIM_STATE_TIMEOUT          = 0x03U,    /*!< Timeout state                               */
0134   HAL_LPTIM_STATE_ERROR            = 0x04U     /*!< Internal Process is ongoing                 */
0135 } HAL_LPTIM_StateTypeDef;
0136 
0137 /**
0138   * @brief  LPTIM handle Structure definition
0139   */
0140 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
0141 typedef struct __LPTIM_HandleTypeDef
0142 #else
0143 typedef struct
0144 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
0145 {
0146   LPTIM_TypeDef                 *Instance;         /*!< Register base address     */
0147 
0148   LPTIM_InitTypeDef              Init;             /*!< LPTIM required parameters */
0149 
0150   HAL_StatusTypeDef              Status;           /*!< LPTIM peripheral status   */
0151 
0152   HAL_LockTypeDef                Lock;             /*!< LPTIM locking object      */
0153 
0154   __IO  HAL_LPTIM_StateTypeDef   State;            /*!< LPTIM peripheral state    */
0155 
0156 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
0157   void (* MspInitCallback)(struct __LPTIM_HandleTypeDef *hlptim);            /*!< LPTIM Base Msp Init Callback                 */
0158   void (* MspDeInitCallback)(struct __LPTIM_HandleTypeDef *hlptim);          /*!< LPTIM Base Msp DeInit Callback               */
0159   void (* CompareMatchCallback)(struct __LPTIM_HandleTypeDef *hlptim);       /*!< Compare match Callback                       */
0160   void (* AutoReloadMatchCallback)(struct __LPTIM_HandleTypeDef *hlptim);    /*!< Auto-reload match Callback                   */
0161   void (* TriggerCallback)(struct __LPTIM_HandleTypeDef *hlptim);            /*!< External trigger event detection Callback    */
0162   void (* CompareWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim);       /*!< Compare register write complete Callback     */
0163   void (* AutoReloadWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim);    /*!< Auto-reload register write complete Callback */
0164   void (* DirectionUpCallback)(struct __LPTIM_HandleTypeDef *hlptim);        /*!< Up-counting direction change Callback        */
0165   void (* DirectionDownCallback)(struct __LPTIM_HandleTypeDef *hlptim);      /*!< Down-counting direction change Callback      */
0166 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
0167 } LPTIM_HandleTypeDef;
0168 
0169 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
0170 /**
0171   * @brief  HAL LPTIM Callback ID enumeration definition
0172   */
0173 typedef enum
0174 {
0175   HAL_LPTIM_MSPINIT_CB_ID          = 0x00U,    /*!< LPTIM Base Msp Init Callback ID                  */
0176   HAL_LPTIM_MSPDEINIT_CB_ID        = 0x01U,    /*!< LPTIM Base Msp DeInit Callback ID                */
0177   HAL_LPTIM_COMPARE_MATCH_CB_ID    = 0x02U,    /*!< Compare match Callback ID                        */
0178   HAL_LPTIM_AUTORELOAD_MATCH_CB_ID = 0x03U,    /*!< Auto-reload match Callback ID                    */
0179   HAL_LPTIM_TRIGGER_CB_ID          = 0x04U,    /*!< External trigger event detection Callback ID     */
0180   HAL_LPTIM_COMPARE_WRITE_CB_ID    = 0x05U,    /*!< Compare register write complete Callback ID      */
0181   HAL_LPTIM_AUTORELOAD_WRITE_CB_ID = 0x06U,    /*!< Auto-reload register write complete Callback ID  */
0182   HAL_LPTIM_DIRECTION_UP_CB_ID     = 0x07U,    /*!< Up-counting direction change Callback ID         */
0183   HAL_LPTIM_DIRECTION_DOWN_CB_ID   = 0x08U,    /*!< Down-counting direction change Callback ID       */
0184 } HAL_LPTIM_CallbackIDTypeDef;
0185 
0186 /**
0187   * @brief  HAL TIM Callback pointer definition
0188   */
0189 typedef  void (*pLPTIM_CallbackTypeDef)(LPTIM_HandleTypeDef *hlptim);  /*!< pointer to the LPTIM callback function */
0190 
0191 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
0192 /**
0193   * @}
0194   */
0195 
0196 /* Exported constants --------------------------------------------------------*/
0197 /** @defgroup LPTIM_Exported_Constants LPTIM Exported Constants
0198   * @ingroup RTEMSBSPsARMSTM32H7
0199   * @{
0200   */
0201 
0202 /** @defgroup LPTIM_Clock_Source LPTIM Clock Source
0203   * @ingroup RTEMSBSPsARMSTM32H7
0204   * @{
0205   */
0206 #define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC        0x00000000U
0207 #define LPTIM_CLOCKSOURCE_ULPTIM                LPTIM_CFGR_CKSEL
0208 /**
0209   * @}
0210   */
0211 
0212 /** @defgroup LPTIM_Clock_Prescaler LPTIM Clock Prescaler
0213   * @ingroup RTEMSBSPsARMSTM32H7
0214   * @{
0215   */
0216 #define LPTIM_PRESCALER_DIV1                    0x00000000U
0217 #define LPTIM_PRESCALER_DIV2                    LPTIM_CFGR_PRESC_0
0218 #define LPTIM_PRESCALER_DIV4                    LPTIM_CFGR_PRESC_1
0219 #define LPTIM_PRESCALER_DIV8                    (LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_1)
0220 #define LPTIM_PRESCALER_DIV16                   LPTIM_CFGR_PRESC_2
0221 #define LPTIM_PRESCALER_DIV32                   (LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_2)
0222 #define LPTIM_PRESCALER_DIV64                   (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_2)
0223 #define LPTIM_PRESCALER_DIV128                  LPTIM_CFGR_PRESC
0224 /**
0225   * @}
0226   */
0227 
0228 /** @defgroup LPTIM_Output_Polarity LPTIM Output Polarity
0229   * @ingroup RTEMSBSPsARMSTM32H7
0230   * @{
0231   */
0232 
0233 #define LPTIM_OUTPUTPOLARITY_HIGH               0x00000000U
0234 #define LPTIM_OUTPUTPOLARITY_LOW                LPTIM_CFGR_WAVPOL
0235 /**
0236   * @}
0237   */
0238 
0239 /** @defgroup LPTIM_Clock_Sample_Time LPTIM Clock Sample Time
0240   * @ingroup RTEMSBSPsARMSTM32H7
0241   * @{
0242   */
0243 #define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION  0x00000000U
0244 #define LPTIM_CLOCKSAMPLETIME_2TRANSITIONS      LPTIM_CFGR_CKFLT_0
0245 #define LPTIM_CLOCKSAMPLETIME_4TRANSITIONS      LPTIM_CFGR_CKFLT_1
0246 #define LPTIM_CLOCKSAMPLETIME_8TRANSITIONS      LPTIM_CFGR_CKFLT
0247 /**
0248   * @}
0249   */
0250 
0251 /** @defgroup LPTIM_Clock_Polarity LPTIM Clock Polarity
0252   * @ingroup RTEMSBSPsARMSTM32H7
0253   * @{
0254   */
0255 #define LPTIM_CLOCKPOLARITY_RISING              0x00000000U
0256 #define LPTIM_CLOCKPOLARITY_FALLING             LPTIM_CFGR_CKPOL_0
0257 #define LPTIM_CLOCKPOLARITY_RISING_FALLING      LPTIM_CFGR_CKPOL_1
0258 /**
0259   * @}
0260   */
0261 
0262 /** @defgroup LPTIM_Trigger_Source LPTIM Trigger Source
0263   * @ingroup RTEMSBSPsARMSTM32H7
0264   * @{
0265   */
0266 #define LPTIM_TRIGSOURCE_SOFTWARE               0x0000FFFFU
0267 #define LPTIM_TRIGSOURCE_0                      0x00000000U
0268 #define LPTIM_TRIGSOURCE_1                      LPTIM_CFGR_TRIGSEL_0
0269 #define LPTIM_TRIGSOURCE_2                      LPTIM_CFGR_TRIGSEL_1
0270 #define LPTIM_TRIGSOURCE_3                      (LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_1)
0271 #define LPTIM_TRIGSOURCE_4                      LPTIM_CFGR_TRIGSEL_2
0272 #define LPTIM_TRIGSOURCE_5                      (LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_2)
0273 #define LPTIM_TRIGSOURCE_6                      (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_2)
0274 #define LPTIM_TRIGSOURCE_7                      LPTIM_CFGR_TRIGSEL
0275 /**
0276   * @}
0277   */
0278 
0279 /** @defgroup LPTIM_External_Trigger_Polarity LPTIM External Trigger Polarity
0280   * @ingroup RTEMSBSPsARMSTM32H7
0281   * @{
0282   */
0283 #define LPTIM_ACTIVEEDGE_RISING                LPTIM_CFGR_TRIGEN_0
0284 #define LPTIM_ACTIVEEDGE_FALLING               LPTIM_CFGR_TRIGEN_1
0285 #define LPTIM_ACTIVEEDGE_RISING_FALLING        LPTIM_CFGR_TRIGEN
0286 /**
0287   * @}
0288   */
0289 
0290 /** @defgroup LPTIM_Trigger_Sample_Time LPTIM Trigger Sample Time
0291   * @ingroup RTEMSBSPsARMSTM32H7
0292   * @{
0293   */
0294 #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION  0x00000000U
0295 #define LPTIM_TRIGSAMPLETIME_2TRANSITIONS      LPTIM_CFGR_TRGFLT_0
0296 #define LPTIM_TRIGSAMPLETIME_4TRANSITIONS      LPTIM_CFGR_TRGFLT_1
0297 #define LPTIM_TRIGSAMPLETIME_8TRANSITIONS      LPTIM_CFGR_TRGFLT
0298 /**
0299   * @}
0300   */
0301 
0302 /** @defgroup LPTIM_Updating_Mode LPTIM Updating Mode
0303   * @ingroup RTEMSBSPsARMSTM32H7
0304   * @{
0305   */
0306 
0307 #define LPTIM_UPDATE_IMMEDIATE                  0x00000000U
0308 #define LPTIM_UPDATE_ENDOFPERIOD                LPTIM_CFGR_PRELOAD
0309 /**
0310   * @}
0311   */
0312 
0313 /** @defgroup LPTIM_Counter_Source LPTIM Counter Source
0314   * @ingroup RTEMSBSPsARMSTM32H7
0315   * @{
0316   */
0317 
0318 #define LPTIM_COUNTERSOURCE_INTERNAL            0x00000000U
0319 #define LPTIM_COUNTERSOURCE_EXTERNAL            LPTIM_CFGR_COUNTMODE
0320 /**
0321   * @}
0322   */
0323 
0324 /** @defgroup LPTIM_Input1_Source LPTIM Input1 Source
0325   * @ingroup RTEMSBSPsARMSTM32H7
0326   * @{
0327   */
0328 
0329 #define LPTIM_INPUT1SOURCE_GPIO          0x00000000U                                   /*!< For LPTIM1 and LPTIM2 */
0330 #define LPTIM_INPUT1SOURCE_COMP1         LPTIM_CFGR2_IN1SEL_0                          /*!< For LPTIM1 and LPTIM2 */
0331 #define LPTIM_INPUT1SOURCE_COMP2         LPTIM_CFGR2_IN1SEL_1                          /*!< For LPTIM2 */
0332 #define LPTIM_INPUT1SOURCE_COMP1_COMP2   (LPTIM_CFGR2_IN1SEL_1 | LPTIM_CFGR2_IN1SEL_0) /*!< For LPTIM2 */
0333 #define LPTIM_INPUT1SOURCE_NOT_CONNECTED 0x00000000U                                   /*!< For LPTIM3 */
0334 #define LPTIM_INPUT1SOURCE_SAI4_FSA      LPTIM_CFGR2_IN1SEL_0                          /*!< For LPTIM3 */
0335 #define LPTIM_INPUT1SOURCE_SAI4_FSB      LPTIM_CFGR2_IN1SEL_1                          /*!< For LPTIM3 */
0336 /**
0337   * @}
0338   */
0339 
0340 /** @defgroup LPTIM_Input2_Source LPTIM Input2 Source
0341   * @ingroup RTEMSBSPsARMSTM32H7
0342   * @{
0343   */
0344 
0345 #define LPTIM_INPUT2SOURCE_GPIO         0x00000000U                    /*!< For LPTIM1 */
0346 #define LPTIM_INPUT2SOURCE_COMP2        LPTIM_CFGR2_IN2SEL_0           /*!< For LPTIM1 */
0347 /**
0348   * @}
0349   */
0350 
0351 /** @defgroup LPTIM_Flag_Definition LPTIM Flags Definition
0352   * @ingroup RTEMSBSPsARMSTM32H7
0353   * @{
0354   */
0355 
0356 #define LPTIM_FLAG_DOWN                          LPTIM_ISR_DOWN
0357 #define LPTIM_FLAG_UP                            LPTIM_ISR_UP
0358 #define LPTIM_FLAG_ARROK                         LPTIM_ISR_ARROK
0359 #define LPTIM_FLAG_CMPOK                         LPTIM_ISR_CMPOK
0360 #define LPTIM_FLAG_EXTTRIG                       LPTIM_ISR_EXTTRIG
0361 #define LPTIM_FLAG_ARRM                          LPTIM_ISR_ARRM
0362 #define LPTIM_FLAG_CMPM                          LPTIM_ISR_CMPM
0363 /**
0364   * @}
0365   */
0366 
0367 /** @defgroup LPTIM_Interrupts_Definition LPTIM Interrupts Definition
0368   * @ingroup RTEMSBSPsARMSTM32H7
0369   * @{
0370   */
0371 #define LPTIM_IT_DOWN                            LPTIM_IER_DOWNIE
0372 #define LPTIM_IT_UP                              LPTIM_IER_UPIE
0373 #define LPTIM_IT_ARROK                           LPTIM_IER_ARROKIE
0374 #define LPTIM_IT_CMPOK                           LPTIM_IER_CMPOKIE
0375 #define LPTIM_IT_EXTTRIG                         LPTIM_IER_EXTTRIGIE
0376 #define LPTIM_IT_ARRM                            LPTIM_IER_ARRMIE
0377 #define LPTIM_IT_CMPM                            LPTIM_IER_CMPMIE
0378 /**
0379   * @}
0380   */
0381 
0382 /**
0383   * @}
0384   */
0385 
0386 /* Exported macros -----------------------------------------------------------*/
0387 /** @defgroup LPTIM_Exported_Macros LPTIM Exported Macros
0388   * @ingroup RTEMSBSPsARMSTM32H7
0389   * @{
0390   */
0391 
0392 /** @brief Reset LPTIM handle state.
0393   * @param  __HANDLE__ LPTIM handle
0394   * @retval None
0395   */
0396 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
0397 #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) do {                                                        \
0398                                                         (__HANDLE__)->State             = HAL_LPTIM_STATE_RESET; \
0399                                                         (__HANDLE__)->MspInitCallback   = NULL;                  \
0400                                                         (__HANDLE__)->MspDeInitCallback = NULL;                  \
0401                                                       } while(0)
0402 #else
0403 #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LPTIM_STATE_RESET)
0404 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
0405 
0406 /**
0407   * @brief  Enable the LPTIM peripheral.
0408   * @param  __HANDLE__ LPTIM handle
0409   * @retval None
0410   */
0411 #define __HAL_LPTIM_ENABLE(__HANDLE__)   ((__HANDLE__)->Instance->CR |= (LPTIM_CR_ENABLE))
0412 
0413 /**
0414   * @brief  Disable the LPTIM peripheral.
0415   * @param  __HANDLE__ LPTIM handle
0416   * @note   The following sequence is required to solve LPTIM disable HW limitation.
0417   *         Please check Errata Sheet ES0335 for more details under "MCU may remain
0418   *         stuck in LPTIM interrupt when entering Stop mode" section.
0419   * @note   Please call @ref HAL_LPTIM_GetState() after a call to __HAL_LPTIM_DISABLE to
0420   *         check for TIMEOUT.
0421   * @retval None
0422   */
0423 #define __HAL_LPTIM_DISABLE(__HANDLE__)   LPTIM_Disable(__HANDLE__)
0424 
0425 /**
0426   * @brief  Start the LPTIM peripheral in Continuous mode.
0427   * @param  __HANDLE__ LPTIM handle
0428   * @retval None
0429   */
0430 #define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__)  ((__HANDLE__)->Instance->CR |=  LPTIM_CR_CNTSTRT)
0431 /**
0432   * @brief  Start the LPTIM peripheral in single mode.
0433   * @param  __HANDLE__ LPTIM handle
0434   * @retval None
0435   */
0436 #define __HAL_LPTIM_START_SINGLE(__HANDLE__)      ((__HANDLE__)->Instance->CR |=  LPTIM_CR_SNGSTRT)
0437 
0438 /**
0439   * @brief  Reset the LPTIM Counter register in synchronous mode.
0440   * @param  __HANDLE__ LPTIM handle
0441   * @retval None
0442   */
0443 #define __HAL_LPTIM_RESET_COUNTER(__HANDLE__)      ((__HANDLE__)->Instance->CR |=  LPTIM_CR_COUNTRST)
0444 
0445 /**
0446   * @brief  Reset after read of the LPTIM Counter register in asynchronous mode.
0447   * @param  __HANDLE__ LPTIM handle
0448   * @retval None
0449   */
0450 #define __HAL_LPTIM_RESET_COUNTER_AFTERREAD(__HANDLE__)      ((__HANDLE__)->Instance->CR |=  LPTIM_CR_RSTARE)
0451 
0452 /**
0453   * @brief  Write the passed parameter in the Autoreload register.
0454   * @param  __HANDLE__ LPTIM handle
0455   * @param  __VALUE__ Autoreload value
0456   *         This parameter must be a value between Min_Data = 0x0001 and Max_Data = 0xFFFF.
0457   * @retval None
0458   * @note   The ARR register can only be modified when the LPTIM instance is enabled.
0459   */
0460 #define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__)  ((__HANDLE__)->Instance->ARR =  (__VALUE__))
0461 
0462 /**
0463   * @brief  Write the passed parameter in the Compare register.
0464   * @param  __HANDLE__ LPTIM handle
0465   * @param  __VALUE__ Compare value
0466   * @retval None
0467   * @note   The CMP register can only be modified when the LPTIM instance is enabled.
0468   */
0469 #define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __VALUE__)     ((__HANDLE__)->Instance->CMP =  (__VALUE__))
0470 
0471 /**
0472   * @brief  Check whether the specified LPTIM flag is set or not.
0473   * @param  __HANDLE__ LPTIM handle
0474   * @param  __FLAG__ LPTIM flag to check
0475   *            This parameter can be a value of:
0476   *            @arg LPTIM_FLAG_DOWN    : Counter direction change up Flag.
0477   *            @arg LPTIM_FLAG_UP      : Counter direction change down to up Flag.
0478   *            @arg LPTIM_FLAG_ARROK   : Autoreload register update OK Flag.
0479   *            @arg LPTIM_FLAG_CMPOK   : Compare register update OK Flag.
0480   *            @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag.
0481   *            @arg LPTIM_FLAG_ARRM    : Autoreload match Flag.
0482   *            @arg LPTIM_FLAG_CMPM    : Compare match Flag.
0483   * @retval The state of the specified flag (SET or RESET).
0484   */
0485 #define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__)          (((__HANDLE__)->Instance->ISR &(__FLAG__)) == (__FLAG__))
0486 
0487 /**
0488   * @brief  Clear the specified LPTIM flag.
0489   * @param  __HANDLE__ LPTIM handle.
0490   * @param  __FLAG__ LPTIM flag to clear.
0491   *            This parameter can be a value of:
0492   *            @arg LPTIM_FLAG_DOWN    : Counter direction change up Flag.
0493   *            @arg LPTIM_FLAG_UP      : Counter direction change down to up Flag.
0494   *            @arg LPTIM_FLAG_ARROK   : Autoreload register update OK Flag.
0495   *            @arg LPTIM_FLAG_CMPOK   : Compare register update OK Flag.
0496   *            @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag.
0497   *            @arg LPTIM_FLAG_ARRM    : Autoreload match Flag.
0498   *            @arg LPTIM_FLAG_CMPM    : Compare match Flag.
0499   * @retval None.
0500   */
0501 #define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__)        ((__HANDLE__)->Instance->ICR  = (__FLAG__))
0502 
0503 /**
0504   * @brief  Enable the specified LPTIM interrupt.
0505   * @param  __HANDLE__ LPTIM handle.
0506   * @param  __INTERRUPT__ LPTIM interrupt to set.
0507   *            This parameter can be a value of:
0508   *            @arg LPTIM_IT_DOWN    : Counter direction change up Interrupt.
0509   *            @arg LPTIM_IT_UP      : Counter direction change down to up Interrupt.
0510   *            @arg LPTIM_IT_ARROK   : Autoreload register update OK Interrupt.
0511   *            @arg LPTIM_IT_CMPOK   : Compare register update OK Interrupt.
0512   *            @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
0513   *            @arg LPTIM_IT_ARRM    : Autoreload match Interrupt.
0514   *            @arg LPTIM_IT_CMPM    : Compare match Interrupt.
0515   * @retval None.
0516   * @note   The LPTIM interrupts can only be enabled when the LPTIM instance is disabled.
0517   */
0518 #define __HAL_LPTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__)    ((__HANDLE__)->Instance->IER  |= (__INTERRUPT__))
0519 
0520 /**
0521   * @brief  Disable the specified LPTIM interrupt.
0522   * @param  __HANDLE__ LPTIM handle.
0523   * @param  __INTERRUPT__ LPTIM interrupt to set.
0524   *            This parameter can be a value of:
0525   *            @arg LPTIM_IT_DOWN    : Counter direction change up Interrupt.
0526   *            @arg LPTIM_IT_UP      : Counter direction change down to up Interrupt.
0527   *            @arg LPTIM_IT_ARROK   : Autoreload register update OK Interrupt.
0528   *            @arg LPTIM_IT_CMPOK   : Compare register update OK Interrupt.
0529   *            @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
0530   *            @arg LPTIM_IT_ARRM    : Autoreload match Interrupt.
0531   *            @arg LPTIM_IT_CMPM    : Compare match Interrupt.
0532   * @retval None.
0533   * @note   The LPTIM interrupts can only be disabled when the LPTIM instance is disabled.
0534   */
0535 #define __HAL_LPTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->IER  &= (~(__INTERRUPT__)))
0536 
0537 /**
0538   * @brief  Check whether the specified LPTIM interrupt source is enabled or not.
0539   * @param  __HANDLE__ LPTIM handle.
0540   * @param  __INTERRUPT__ LPTIM interrupt to check.
0541   *            This parameter can be a value of:
0542   *            @arg LPTIM_IT_DOWN    : Counter direction change up Interrupt.
0543   *            @arg LPTIM_IT_UP      : Counter direction change down to up Interrupt.
0544   *            @arg LPTIM_IT_ARROK   : Autoreload register update OK Interrupt.
0545   *            @arg LPTIM_IT_CMPOK   : Compare register update OK Interrupt.
0546   *            @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
0547   *            @arg LPTIM_IT_ARRM    : Autoreload match Interrupt.
0548   *            @arg LPTIM_IT_CMPM    : Compare match Interrupt.
0549   * @retval Interrupt status.
0550   */
0551 
0552 #define __HAL_LPTIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER\
0553                                                                 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
0554 
0555 /**
0556   * @}
0557   */
0558 
0559 /* Exported functions --------------------------------------------------------*/
0560 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
0561   * @ingroup RTEMSBSPsARMSTM32H7
0562   * @{
0563   */
0564 
0565 /** @addtogroup LPTIM_Exported_Functions_Group1
0566   *  @brief    Initialization and Configuration functions.
0567   * @{
0568   */
0569 /* Initialization/de-initialization functions  ********************************/
0570 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim);
0571 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim);
0572 
0573 /* MSP functions  *************************************************************/
0574 void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim);
0575 void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim);
0576 /**
0577   * @}
0578   */
0579 
0580 /** @addtogroup LPTIM_Exported_Functions_Group2
0581   *  @brief   Start-Stop operation functions.
0582   * @{
0583   */
0584 /* Start/Stop operation functions  *********************************************/
0585 /* ################################# PWM Mode ################################*/
0586 /* Blocking mode: Polling */
0587 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
0588 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim);
0589 /* Non-Blocking mode: Interrupt */
0590 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
0591 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim);
0592 
0593 /* ############################# One Pulse Mode ##############################*/
0594 /* Blocking mode: Polling */
0595 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
0596 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim);
0597 /* Non-Blocking mode: Interrupt */
0598 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
0599 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim);
0600 
0601 /* ############################## Set once Mode ##############################*/
0602 /* Blocking mode: Polling */
0603 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
0604 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim);
0605 /* Non-Blocking mode: Interrupt */
0606 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
0607 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim);
0608 
0609 /* ############################### Encoder Mode ##############################*/
0610 /* Blocking mode: Polling */
0611 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
0612 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim);
0613 /* Non-Blocking mode: Interrupt */
0614 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
0615 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim);
0616 
0617 /* ############################# Time out  Mode ##############################*/
0618 /* Blocking mode: Polling */
0619 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout);
0620 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim);
0621 /* Non-Blocking mode: Interrupt */
0622 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout);
0623 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim);
0624 
0625 /* ############################## Counter Mode ###############################*/
0626 /* Blocking mode: Polling */
0627 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
0628 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim);
0629 /* Non-Blocking mode: Interrupt */
0630 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
0631 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim);
0632 /**
0633   * @}
0634   */
0635 
0636 /** @addtogroup LPTIM_Exported_Functions_Group3
0637   *  @brief  Read operation functions.
0638   * @{
0639   */
0640 /* Reading operation functions ************************************************/
0641 uint32_t HAL_LPTIM_ReadCounter(const LPTIM_HandleTypeDef *hlptim);
0642 uint32_t HAL_LPTIM_ReadAutoReload(const LPTIM_HandleTypeDef *hlptim);
0643 uint32_t HAL_LPTIM_ReadCompare(const LPTIM_HandleTypeDef *hlptim);
0644 /**
0645   * @}
0646   */
0647 
0648 /** @addtogroup LPTIM_Exported_Functions_Group4
0649   *  @brief  LPTIM IRQ handler and callback functions.
0650   * @{
0651   */
0652 /* LPTIM IRQ functions  *******************************************************/
0653 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim);
0654 
0655 /* CallBack functions  ********************************************************/
0656 void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim);
0657 void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim);
0658 void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim);
0659 void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim);
0660 void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim);
0661 void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim);
0662 void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim);
0663 
0664 /* Callbacks Register/UnRegister functions  ***********************************/
0665 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
0666 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID,
0667                                              pLPTIM_CallbackTypeDef pCallback);
0668 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID);
0669 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
0670 /**
0671   * @}
0672   */
0673 
0674 /** @addtogroup LPTIM_Group5
0675   *  @brief   Peripheral State functions.
0676   * @{
0677   */
0678 /* Peripheral State functions  ************************************************/
0679 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(const LPTIM_HandleTypeDef *hlptim);
0680 /**
0681   * @}
0682   */
0683 
0684 /**
0685   * @}
0686   */
0687 
0688 /* Private types -------------------------------------------------------------*/
0689 /** @defgroup LPTIM_Private_Types LPTIM Private Types
0690   * @ingroup RTEMSBSPsARMSTM32H7
0691   * @{
0692   */
0693 
0694 /**
0695   * @}
0696   */
0697 
0698 /* Private variables ---------------------------------------------------------*/
0699 /** @defgroup LPTIM_Private_Variables LPTIM Private Variables
0700   * @ingroup RTEMSBSPsARMSTM32H7
0701   * @{
0702   */
0703 
0704 /**
0705   * @}
0706   */
0707 
0708 /* Private constants ---------------------------------------------------------*/
0709 /** @defgroup LPTIM_Private_Constants LPTIM Private Constants
0710   * @ingroup RTEMSBSPsARMSTM32H7
0711   * @{
0712   */
0713 
0714 /**
0715   * @}
0716   */
0717 
0718 /* Private macros ------------------------------------------------------------*/
0719 /** @defgroup LPTIM_Private_Macros LPTIM Private Macros
0720   * @ingroup RTEMSBSPsARMSTM32H7
0721   * @{
0722   */
0723 
0724 #define IS_LPTIM_CLOCK_SOURCE(__SOURCE__)       (((__SOURCE__) == LPTIM_CLOCKSOURCE_ULPTIM) || \
0725                                                  ((__SOURCE__) == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC))
0726 
0727 
0728 #define IS_LPTIM_CLOCK_PRESCALER(__PRESCALER__) (((__PRESCALER__) ==  LPTIM_PRESCALER_DIV1  ) || \
0729                                                  ((__PRESCALER__) ==  LPTIM_PRESCALER_DIV2  ) || \
0730                                                  ((__PRESCALER__) ==  LPTIM_PRESCALER_DIV4  ) || \
0731                                                  ((__PRESCALER__) ==  LPTIM_PRESCALER_DIV8  ) || \
0732                                                  ((__PRESCALER__) ==  LPTIM_PRESCALER_DIV16 ) || \
0733                                                  ((__PRESCALER__) ==  LPTIM_PRESCALER_DIV32 ) || \
0734                                                  ((__PRESCALER__) ==  LPTIM_PRESCALER_DIV64 ) || \
0735                                                  ((__PRESCALER__) ==  LPTIM_PRESCALER_DIV128))
0736 
0737 #define IS_LPTIM_CLOCK_PRESCALERDIV1(__PRESCALER__) ((__PRESCALER__) ==  LPTIM_PRESCALER_DIV1)
0738 
0739 #define IS_LPTIM_OUTPUT_POLARITY(__POLARITY__)  (((__POLARITY__) == LPTIM_OUTPUTPOLARITY_LOW ) || \
0740                                                  ((__POLARITY__) == LPTIM_OUTPUTPOLARITY_HIGH))
0741 
0742 #define IS_LPTIM_CLOCK_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION) || \
0743                                                     ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_2TRANSITIONS)     || \
0744                                                     ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_4TRANSITIONS)     || \
0745                                                     ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_8TRANSITIONS))
0746 
0747 #define IS_LPTIM_CLOCK_POLARITY(__POLARITY__)   (((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING)  || \
0748                                                  ((__POLARITY__) == LPTIM_CLOCKPOLARITY_FALLING) || \
0749                                                  ((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING_FALLING))
0750 
0751 #define IS_LPTIM_TRG_SOURCE(__TRIG__)           (((__TRIG__) == LPTIM_TRIGSOURCE_SOFTWARE) || \
0752                                                  ((__TRIG__) == LPTIM_TRIGSOURCE_0) || \
0753                                                  ((__TRIG__) == LPTIM_TRIGSOURCE_1) || \
0754                                                  ((__TRIG__) == LPTIM_TRIGSOURCE_2) || \
0755                                                  ((__TRIG__) == LPTIM_TRIGSOURCE_3) || \
0756                                                  ((__TRIG__) == LPTIM_TRIGSOURCE_4) || \
0757                                                  ((__TRIG__) == LPTIM_TRIGSOURCE_5) || \
0758                                                  ((__TRIG__) == LPTIM_TRIGSOURCE_6) || \
0759                                                  ((__TRIG__) == LPTIM_TRIGSOURCE_7))
0760 
0761 #define IS_LPTIM_EXT_TRG_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING         ) || \
0762                                                  ((__POLARITY__) == LPTIM_ACTIVEEDGE_FALLING        ) || \
0763                                                  ((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING_FALLING ))
0764 
0765 #define IS_LPTIM_TRIG_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION) || \
0766                                                    ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_2TRANSITIONS    ) || \
0767                                                    ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_4TRANSITIONS    ) || \
0768                                                    ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_8TRANSITIONS    ))
0769 
0770 #define IS_LPTIM_UPDATE_MODE(__MODE__)          (((__MODE__) == LPTIM_UPDATE_IMMEDIATE) || \
0771                                                  ((__MODE__) == LPTIM_UPDATE_ENDOFPERIOD))
0772 
0773 #define IS_LPTIM_COUNTER_SOURCE(__SOURCE__)     (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) || \
0774                                                  ((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL))
0775 
0776 #define IS_LPTIM_COMPARE(__COMPARE__)           ((__COMPARE__) <= 0x0000FFFFUL)
0777 
0778 #define IS_LPTIM_PERIOD(__PERIOD__)             ((0x00000001UL <= (__PERIOD__)) &&\
0779                                                  ((__PERIOD__) <= 0x0000FFFFUL))
0780 
0781 #define IS_LPTIM_PULSE(__PULSE__)               ((__PULSE__) <= 0x0000FFFFUL)
0782 
0783 #define IS_LPTIM_INPUT1_SOURCE(__INSTANCE__, __SOURCE__)     \
0784   ((((__INSTANCE__) == LPTIM1) &&                          \
0785     (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO) ||           \
0786      ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1)))           \
0787    ||                                                      \
0788    (((__INSTANCE__) == LPTIM2) &&                          \
0789     (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO) ||           \
0790      ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1) ||          \
0791      ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP2) ||          \
0792      ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1_COMP2)))     \
0793    ||                                                      \
0794    (((__INSTANCE__) == LPTIM3) &&                          \
0795     (((__SOURCE__) == LPTIM_INPUT1SOURCE_NOT_CONNECTED) ||  \
0796      ((__SOURCE__) == LPTIM_INPUT1SOURCE_SAI4_FSA) ||       \
0797      ((__SOURCE__) == LPTIM_INPUT1SOURCE_SAI4_FSB))))
0798 
0799 #define IS_LPTIM_INPUT2_SOURCE(__INSTANCE__, __SOURCE__)  \
0800   ((((__INSTANCE__) == LPTIM1) ||                      \
0801     ((__INSTANCE__) == LPTIM2)) &&                     \
0802    (((__SOURCE__) == LPTIM_INPUT2SOURCE_GPIO) ||        \
0803     ((__SOURCE__) == LPTIM_INPUT2SOURCE_COMP2)))
0804 
0805 /**
0806   * @}
0807   */
0808 
0809 /* Private functions ---------------------------------------------------------*/
0810 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
0811   * @ingroup RTEMSBSPsARMSTM32H7
0812   * @{
0813   */
0814 void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim);
0815 /**
0816   * @}
0817   */
0818 
0819 /**
0820   * @}
0821   */
0822 
0823 #endif /* LPTIM1 || LPTIM2 ||  LPTIM3 || LPTIM4 || LPTIM5 */
0824 /**
0825   * @}
0826   */
0827 
0828 #ifdef __cplusplus
0829 }
0830 #endif
0831 
0832 #endif /* STM32H7xx_HAL_LPTIM_H */