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0001 /**
0002   ******************************************************************************
0003   * @file    stm32h7xx_hal_i2s.h
0004   * @author  MCD Application Team
0005   * @brief   Header file of I2S HAL module.
0006   ******************************************************************************
0007   * @attention
0008   *
0009   * Copyright (c) 2017 STMicroelectronics.
0010   * All rights reserved.
0011   *
0012   * This software is licensed under terms that can be found in the LICENSE file
0013   * in the root directory of this software component.
0014   * If no LICENSE file comes with this software, it is provided AS-IS.
0015   *
0016   ******************************************************************************
0017   */
0018 
0019 /* Define to prevent recursive inclusion -------------------------------------*/
0020 #ifndef STM32H7xx_HAL_I2S_H
0021 #define STM32H7xx_HAL_I2S_H
0022 
0023 #ifdef __cplusplus
0024 extern "C" {
0025 #endif
0026 
0027 /* Includes ------------------------------------------------------------------*/
0028 #include "stm32h7xx_hal_def.h"
0029 
0030 /** @addtogroup STM32H7xx_HAL_Driver
0031   * @{
0032   */
0033 
0034 /** @addtogroup I2S
0035   * @{
0036   */
0037 
0038 /* Exported types ------------------------------------------------------------*/
0039 /** @defgroup I2S_Exported_Types I2S Exported Types
0040   * @ingroup RTEMSBSPsARMSTM32H7
0041   * @{
0042   */
0043 
0044 /**
0045   * @brief I2S Init structure definition
0046   */
0047 typedef struct
0048 {
0049   uint32_t Mode;                /*!< Specifies the I2S operating mode.
0050                                      This parameter can be a value of @ref I2S_Mode */
0051 
0052   uint32_t Standard;            /*!< Specifies the standard used for the I2S communication.
0053                                      This parameter can be a value of @ref I2S_Standard */
0054 
0055   uint32_t DataFormat;          /*!< Specifies the data format for the I2S communication.
0056                                      This parameter can be a value of @ref I2S_Data_Format */
0057 
0058   uint32_t MCLKOutput;          /*!< Specifies whether the I2S MCLK output is enabled or not.
0059                                      This parameter can be a value of @ref I2S_MCLK_Output */
0060 
0061   uint32_t AudioFreq;           /*!< Specifies the frequency selected for the I2S communication.
0062                                      This parameter can be a value of @ref I2S_Audio_Frequency */
0063 
0064   uint32_t CPOL;                /*!< Specifies the idle state of the I2S clock.
0065                                      This parameter can be a value of @ref I2S_Clock_Polarity */
0066 
0067   uint32_t FirstBit;            /*!< Specifies whether data transfers start from MSB or LSB bit.
0068                                      This parameter can be a value of @ref I2S_MSB_LSB_Transmission       */
0069 
0070   uint32_t WSInversion;         /*!< Control the Word Select Inversion.
0071                                      This parameter can be a value of @ref I2S_WSInversion                */
0072 
0073   uint32_t Data24BitAlignment;  /*!< Specifies the Data Padding for 24 bits data length
0074                                       This parameter can be a value of @ref I2S_Data_24Bit_Alignment       */
0075 
0076   uint32_t MasterKeepIOState;   /*!< Control of Alternate function GPIOs state
0077                                      This parameter can be a value of @ref I2S_Master_Keep_IO_State */
0078 
0079 } I2S_InitTypeDef;
0080 
0081 /**
0082   * @brief  HAL State structures definition
0083   */
0084 typedef enum
0085 {
0086   HAL_I2S_STATE_RESET      = 0x00UL,  /*!< I2S not yet initialized or disabled                */
0087   HAL_I2S_STATE_READY      = 0x01UL,  /*!< I2S initialized and ready for use                  */
0088   HAL_I2S_STATE_BUSY       = 0x02UL,  /*!< I2S internal process is ongoing                    */
0089   HAL_I2S_STATE_BUSY_TX    = 0x03UL,  /*!< Data Transmission process is ongoing               */
0090   HAL_I2S_STATE_BUSY_RX    = 0x04UL,  /*!< Data Reception process is ongoing                  */
0091   HAL_I2S_STATE_BUSY_TX_RX = 0x05UL,  /*!< Data Transmission and Reception process is ongoing */
0092   HAL_I2S_STATE_TIMEOUT    = 0x06UL,  /*!< I2S timeout state                                  */
0093   HAL_I2S_STATE_ERROR      = 0x07UL   /*!< I2S error state                                    */
0094 } HAL_I2S_StateTypeDef;
0095 
0096 /**
0097   * @brief I2S handle Structure definition
0098   */
0099 typedef struct __I2S_HandleTypeDef
0100 {
0101   SPI_TypeDef                *Instance;            /*!< I2S registers base address */
0102 
0103   I2S_InitTypeDef            Init;                 /*!< I2S communication parameters */
0104 
0105   const uint16_t             *pTxBuffPtr;          /*!< Pointer to I2S Tx transfer buffer */
0106 
0107   __IO uint16_t              TxXferSize;           /*!< I2S Tx transfer size */
0108 
0109   __IO uint16_t              TxXferCount;          /*!< I2S Tx transfer Counter */
0110 
0111   uint16_t                   *pRxBuffPtr;          /*!< Pointer to I2S Rx transfer buffer */
0112 
0113   __IO uint16_t              RxXferSize;           /*!< I2S Rx transfer size */
0114 
0115   __IO uint16_t              RxXferCount;          /*!< I2S Rx transfer counter
0116                                                       (This field is initialized at the
0117                                                        same value as transfer size at the
0118                                                        beginning of the transfer and
0119                                                        decremented when a sample is received
0120                                                        NbSamplesReceived = RxBufferSize-RxBufferCount) */
0121 
0122   void (*RxISR)(struct __I2S_HandleTypeDef *hi2s); /*!< function pointer on Rx ISR */
0123 
0124   void (*TxISR)(struct __I2S_HandleTypeDef *hi2s); /*!< function pointer on Tx ISR */
0125 
0126   DMA_HandleTypeDef          *hdmatx;              /*!< I2S Tx DMA handle parameters */
0127 
0128   DMA_HandleTypeDef          *hdmarx;              /*!< I2S Rx DMA handle parameters */
0129 
0130   __IO HAL_LockTypeDef       Lock;                 /*!< I2S locking object */
0131 
0132   __IO HAL_I2S_StateTypeDef  State;                /*!< I2S communication state */
0133 
0134   __IO uint32_t              ErrorCode;            /*!< I2S Error code
0135                                                         This parameter can be a value of @ref I2S_Error */
0136 
0137 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
0138   void (* TxCpltCallback)(struct __I2S_HandleTypeDef *hi2s);             /*!< I2S Tx Completed callback          */
0139   void (* RxCpltCallback)(struct __I2S_HandleTypeDef *hi2s);             /*!< I2S Rx Completed callback          */
0140   void (* TxRxCpltCallback)(struct __I2S_HandleTypeDef *hi2s);           /*!< I2S TxRx Completed callback        */
0141   void (* TxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s);         /*!< I2S Tx Half Completed callback     */
0142   void (* RxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s);         /*!< I2S Rx Half Completed callback     */
0143   void (* TxRxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s);       /*!< I2S TxRx Half Completed callback   */
0144   void (* ErrorCallback)(struct __I2S_HandleTypeDef *hi2s);              /*!< I2S Error callback                 */
0145   void (* MspInitCallback)(struct __I2S_HandleTypeDef *hi2s);            /*!< I2S Msp Init callback              */
0146   void (* MspDeInitCallback)(struct __I2S_HandleTypeDef *hi2s);          /*!< I2S Msp DeInit callback            */
0147 
0148 #endif  /* USE_HAL_I2S_REGISTER_CALLBACKS */
0149 } I2S_HandleTypeDef;
0150 
0151 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL)
0152 /**
0153 
0154   * @brief  HAL I2S Callback ID enumeration definition
0155   */
0156 typedef enum
0157 {
0158   HAL_I2S_TX_COMPLETE_CB_ID             = 0x00UL,    /*!< I2S Tx Completed callback ID         */
0159   HAL_I2S_RX_COMPLETE_CB_ID             = 0x01UL,    /*!< I2S Rx Completed callback ID         */
0160   HAL_I2S_TX_RX_COMPLETE_CB_ID          = 0x02UL,    /*!< I2S TxRx Completed callback ID       */
0161   HAL_I2S_TX_HALF_COMPLETE_CB_ID        = 0x03UL,    /*!< I2S Tx Half Completed callback ID    */
0162   HAL_I2S_RX_HALF_COMPLETE_CB_ID        = 0x04UL,    /*!< I2S Rx Half Completed callback ID    */
0163   HAL_I2S_TX_RX_HALF_COMPLETE_CB_ID     = 0x05UL,    /*!< I2S TxRx Half Completed callback ID  */
0164   HAL_I2S_ERROR_CB_ID                   = 0x06UL,    /*!< I2S Error callback ID                */
0165   HAL_I2S_MSPINIT_CB_ID                 = 0x07UL,    /*!< I2S Msp Init callback ID             */
0166   HAL_I2S_MSPDEINIT_CB_ID               = 0x08UL     /*!< I2S Msp DeInit callback ID           */
0167 
0168 } HAL_I2S_CallbackIDTypeDef;
0169 
0170 /**
0171   * @brief  HAL I2S Callback pointer definition
0172   */
0173 typedef  void (*pI2S_CallbackTypeDef)(I2S_HandleTypeDef *hi2s); /*!< pointer to an I2S callback function */
0174 
0175 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
0176 /**
0177   * @}
0178   */
0179 
0180 /* Exported constants --------------------------------------------------------*/
0181 /** @defgroup I2S_Exported_Constants I2S Exported Constants
0182   * @ingroup RTEMSBSPsARMSTM32H7
0183   * @{
0184   */
0185 /** @defgroup I2S_Error I2S Error
0186   * @ingroup RTEMSBSPsARMSTM32H7
0187   * @{
0188   */
0189 #define HAL_I2S_ERROR_NONE               (0x00000000UL)  /*!< No error                          */
0190 #define HAL_I2S_ERROR_TIMEOUT            (0x00000001UL)  /*!< Timeout error                     */
0191 #define HAL_I2S_ERROR_OVR                (0x00000002UL)  /*!< OVR error                         */
0192 #define HAL_I2S_ERROR_UDR                (0x00000004UL)  /*!< UDR error                         */
0193 #define HAL_I2S_ERROR_DMA                (0x00000008UL)  /*!< DMA transfer error                */
0194 #define HAL_I2S_ERROR_PRESCALER          (0x00000010UL)  /*!< Prescaler Calculation error       */
0195 #define HAL_I2S_ERROR_FRE                (0x00000020UL)  /*!< FRE error                         */
0196 #define HAL_I2S_ERROR_NO_OGT             (0x00000040UL)  /*!< No On Going Transfer error        */
0197 #define HAL_I2S_ERROR_NOT_SUPPORTED      (0x00000080UL)  /*!< Requested operation not supported */
0198 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL)
0199 #define HAL_I2S_ERROR_INVALID_CALLBACK   (0x00000100UL)  /*!< Invalid Callback error      */
0200 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
0201 /**
0202   * @}
0203   */
0204 
0205 /** @defgroup I2S_Mode I2S Mode
0206   * @ingroup RTEMSBSPsARMSTM32H7
0207   * @{
0208   */
0209 #define I2S_MODE_SLAVE_TX                (0x00000000UL)
0210 #define I2S_MODE_SLAVE_RX                (SPI_I2SCFGR_I2SCFG_0)
0211 #define I2S_MODE_MASTER_TX               (SPI_I2SCFGR_I2SCFG_1)
0212 #define I2S_MODE_MASTER_RX               (SPI_I2SCFGR_I2SCFG_0 | SPI_I2SCFGR_I2SCFG_1)
0213 #define I2S_MODE_SLAVE_FULLDUPLEX        (SPI_I2SCFGR_I2SCFG_2)
0214 #define I2S_MODE_MASTER_FULLDUPLEX       (SPI_I2SCFGR_I2SCFG_2 | SPI_I2SCFGR_I2SCFG_0)
0215 /**
0216   * @}
0217   */
0218 
0219 /** @defgroup I2S_Standard I2S Standard
0220   * @ingroup RTEMSBSPsARMSTM32H7
0221   * @{
0222   */
0223 #define I2S_STANDARD_PHILIPS             (0x00000000UL)
0224 #define I2S_STANDARD_MSB                 (SPI_I2SCFGR_I2SSTD_0)
0225 #define I2S_STANDARD_LSB                 (SPI_I2SCFGR_I2SSTD_1)
0226 #define I2S_STANDARD_PCM_SHORT           (SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1)
0227 #define I2S_STANDARD_PCM_LONG            (SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1 | SPI_I2SCFGR_PCMSYNC)
0228 /**
0229   * @}
0230   */
0231 
0232 /** @defgroup I2S_Data_Format I2S Data Format
0233   * @ingroup RTEMSBSPsARMSTM32H7
0234   * @{
0235   */
0236 #define I2S_DATAFORMAT_16B               (0x00000000UL)
0237 #define I2S_DATAFORMAT_16B_EXTENDED      (SPI_I2SCFGR_CHLEN)
0238 #define I2S_DATAFORMAT_24B               (SPI_I2SCFGR_DATLEN_0)
0239 #define I2S_DATAFORMAT_32B               (SPI_I2SCFGR_DATLEN_1)
0240 /**
0241   * @}
0242   */
0243 
0244 /** @defgroup I2S_MCLK_Output I2S MCLK Output
0245   * @ingroup RTEMSBSPsARMSTM32H7
0246   * @{
0247   */
0248 #define I2S_MCLKOUTPUT_ENABLE            (SPI_I2SCFGR_MCKOE)
0249 #define I2S_MCLKOUTPUT_DISABLE           (0x00000000UL)
0250 /**
0251   * @}
0252   */
0253 
0254 /** @defgroup I2S_Audio_Frequency I2S Audio Frequency
0255   * @ingroup RTEMSBSPsARMSTM32H7
0256   * @{
0257   */
0258 #define I2S_AUDIOFREQ_192K               (192000UL)
0259 #define I2S_AUDIOFREQ_96K                (96000UL)
0260 #define I2S_AUDIOFREQ_48K                (48000UL)
0261 #define I2S_AUDIOFREQ_44K                (44100UL)
0262 #define I2S_AUDIOFREQ_32K                (32000UL)
0263 #define I2S_AUDIOFREQ_22K                (22050UL)
0264 #define I2S_AUDIOFREQ_16K                (16000UL)
0265 #define I2S_AUDIOFREQ_11K                (11025UL)
0266 #define I2S_AUDIOFREQ_8K                 (8000UL)
0267 #define I2S_AUDIOFREQ_DEFAULT            (2UL)
0268 /**
0269   * @}
0270   */
0271 
0272 /** @defgroup I2S_Clock_Polarity I2S FullDuplex Mode
0273   * @ingroup RTEMSBSPsARMSTM32H7
0274   * @{
0275   */
0276 #define I2S_CPOL_LOW                     (0x00000000UL)
0277 #define I2S_CPOL_HIGH                    (SPI_I2SCFGR_CKPOL)
0278 /**
0279   * @}
0280   */
0281 
0282 /** @defgroup I2S_MSB_LSB_Transmission I2S MSB LSB Transmission
0283   * @ingroup RTEMSBSPsARMSTM32H7
0284   * @{
0285   */
0286 #define I2S_FIRSTBIT_MSB                 (0x00000000UL)
0287 #define I2S_FIRSTBIT_LSB                 SPI_CFG2_LSBFRST
0288 /**
0289   * @}
0290   */
0291 
0292 /** @defgroup I2S_WSInversion I2S Word Select Inversion
0293   * @ingroup RTEMSBSPsARMSTM32H7
0294   * @{
0295   */
0296 #define I2S_WS_INVERSION_DISABLE         (0x00000000UL)
0297 #define I2S_WS_INVERSION_ENABLE          SPI_I2SCFGR_WSINV
0298 /**
0299   * @}
0300   */
0301 
0302 /** @defgroup I2S_Data_24Bit_Alignment Data Padding 24Bit
0303   * @ingroup RTEMSBSPsARMSTM32H7
0304   * @{
0305   */
0306 #define I2S_DATA_24BIT_ALIGNMENT_RIGHT   (0x00000000UL)
0307 #define I2S_DATA_24BIT_ALIGNMENT_LEFT    SPI_I2SCFGR_DATFMT
0308 /**
0309   * @}
0310   */
0311 
0312 /** @defgroup I2S_Master_Keep_IO_State Keep IO State
0313   * @ingroup RTEMSBSPsARMSTM32H7
0314   * @{
0315   */
0316 #define I2S_MASTER_KEEP_IO_STATE_DISABLE (0x00000000U)
0317 #define I2S_MASTER_KEEP_IO_STATE_ENABLE  SPI_CFG2_AFCNTR
0318 /**
0319   * @}
0320   */
0321 
0322 /** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition
0323   * @ingroup RTEMSBSPsARMSTM32H7
0324   * @{
0325   */
0326 #define I2S_IT_RXP                       SPI_IER_RXPIE
0327 #define I2S_IT_TXP                       SPI_IER_TXPIE
0328 #define I2S_IT_DXP                       SPI_IER_DXPIE
0329 #define I2S_IT_UDR                       SPI_IER_UDRIE
0330 #define I2S_IT_OVR                       SPI_IER_OVRIE
0331 #define I2S_IT_FRE                       SPI_IER_TIFREIE
0332 #define I2S_IT_ERR                       (SPI_IER_UDRIE | SPI_IER_OVRIE | SPI_IER_TIFREIE)
0333 /**
0334   * @}
0335   */
0336 
0337 /** @defgroup I2S_Flags_Definition I2S Flags Definition
0338   * @ingroup RTEMSBSPsARMSTM32H7
0339   * @{
0340   */
0341 #define I2S_FLAG_RXP                     SPI_SR_RXP       /* I2S status flag : Rx-Packet available flag              */
0342 #define I2S_FLAG_TXP                     SPI_SR_TXP       /* I2S status flag : Tx-Packet space available flag        */
0343 #define I2S_FLAG_DXP                     SPI_SR_DXP       /* I2S status flag : Dx-Packet space available flag        */
0344 #define I2S_FLAG_UDR                     SPI_SR_UDR       /* I2S Error flag  : Underrun flag                         */
0345 #define I2S_FLAG_OVR                     SPI_SR_OVR       /* I2S Error flag  : Overrun flag                          */
0346 #define I2S_FLAG_FRE                     SPI_SR_TIFRE     /* I2S Error flag  : TI mode frame format error flag       */
0347 
0348 #define I2S_FLAG_MASK                    (SPI_SR_RXP | SPI_SR_TXP | SPI_SR_DXP |SPI_SR_UDR | SPI_SR_OVR | SPI_SR_TIFRE)
0349 /**
0350   * @}
0351   */
0352 
0353 /**
0354   * @}
0355   */
0356 
0357 /* Exported macros -----------------------------------------------------------*/
0358 /** @defgroup I2S_Exported_macros I2S Exported Macros
0359   * @ingroup RTEMSBSPsARMSTM32H7
0360   * @{
0361   */
0362 
0363 /** @brief  Reset I2S handle state
0364   * @param  __HANDLE__ specifies the I2S Handle.
0365   * @retval None
0366   */
0367 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL)
0368 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__)                do{                                                  \
0369                                                                     (__HANDLE__)->State = HAL_I2S_STATE_RESET;       \
0370                                                                     (__HANDLE__)->MspInitCallback = NULL;            \
0371                                                                     (__HANDLE__)->MspDeInitCallback = NULL;          \
0372                                                                   } while(0)
0373 #else
0374 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
0375 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
0376 
0377 /** @brief  Enable the specified SPI peripheral (in I2S mode).
0378   * @param  __HANDLE__ specifies the I2S Handle.
0379   * @retval None
0380   */
0381 #define __HAL_I2S_ENABLE(__HANDLE__)    (SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE))
0382 
0383 /** @brief  Disable the specified SPI peripheral (in I2S mode).
0384   * @param  __HANDLE__ specifies the I2S Handle.
0385   * @retval None
0386   */
0387 #define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE))
0388 
0389 /** @brief  Enable the specified I2S interrupts.
0390   * @param  __HANDLE__ specifies the I2S Handle.
0391   *        This parameter can be I2S where x: 1, 2 or 3 to select the I2S peripheral.
0392   * @param  __INTERRUPT__ specifies the interrupt source to enable or disable.
0393   *         This parameter can be one of the following values:
0394   *            @arg I2S_IT_RXP : Rx-Packet available interrupt
0395   *            @arg I2S_IT_TXP : Tx-Packet space available interrupt
0396   *            @arg I2S_IT_UDR : Underrun interrupt
0397   *            @arg I2S_IT_OVR : Overrun interrupt
0398   *            @arg I2S_IT_FRE : TI mode frame format error interrupt
0399   *            @arg I2S_IT_ERR : Error interrupt enable
0400   * @retval None
0401   */
0402 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__)    ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
0403 
0404 /** @brief  Disable the specified I2S interrupts.
0405   * @param  __HANDLE__ specifies the I2S Handle.
0406   *         This parameter can be I2S where x: 1, 2 or 3 to select the I2S peripheral.
0407   * @param  __INTERRUPT__ specifies the interrupt source to enable or disable.
0408   *         This parameter can be one of the following values:
0409   *            @arg I2S_IT_RXP : Rx-Packet available interrupt
0410   *            @arg I2S_IT_TXP : Tx-Packet space available interrupt
0411   *            @arg I2S_IT_UDR : Underrun interrupt
0412   *            @arg I2S_IT_OVR : Overrun interrupt
0413   *            @arg I2S_IT_FRE : TI mode frame format error interrupt
0414   *            @arg I2S_IT_ERR : Error interrupt enable
0415   * @retval None
0416   */
0417 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__)))
0418 
0419 /** @brief  Check if the specified I2S interrupt source is enabled or disabled.
0420   * @param  __HANDLE__ specifies the I2S Handle.
0421   *         This parameter can be I2S where x: 1, 2 or 3 to select the I2S peripheral.
0422   * @param  __INTERRUPT__ specifies the I2S interrupt source to check.
0423   *          This parameter can be one of the following values:
0424   *            @arg I2S_IT_RXP : Rx-Packet available interrupt
0425   *            @arg I2S_IT_TXP : Tx-Packet space available interrupt
0426   *            @arg I2S_IT_DXP : Tx-Packet space available interrupt
0427   *            @arg I2S_IT_UDR : Underrun interrupt
0428   *            @arg I2S_IT_OVR : Overrun interrupt
0429   *            @arg I2S_IT_FRE : TI mode frame format error interrupt
0430   *            @arg I2S_IT_ERR : Error interrupt enable
0431   * @retval The new state of __IT__ (TRUE or FALSE).
0432   */
0433 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER\
0434                                                               & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
0435 
0436 /** @brief  Check whether the specified I2S flag is set or not.
0437   * @param  __HANDLE__ specifies the I2S Handle.
0438   *         This parameter can be I2S where x: 1, 2 or 3 to select the I2S peripheral.
0439   * @param  __FLAG__ specifies the flag to check.
0440   *         This parameter can be one of the following values:
0441   *            @arg I2S_FLAG_RXP : Rx-Packet available flag
0442   *            @arg I2S_FLAG_TXP : Tx-Packet space available flag
0443   *            @arg I2S_FLAG_UDR : Underrun flag
0444   *            @arg I2S_FLAG_OVR : Overrun flag
0445   *            @arg I2S_FLAG_FRE : TI mode frame format error flag
0446   * @retval The new state of __FLAG__ (TRUE or FALSE).
0447   */
0448 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
0449 
0450 /** @brief Clear the I2S OVR pending flag.
0451   * @param  __HANDLE__ specifies the I2S Handle.
0452   * @retval None
0453   */
0454 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) SET_BIT((__HANDLE__)->Instance->IFCR , SPI_IFCR_OVRC)
0455 
0456 /** @brief Clear the I2S UDR pending flag.
0457   * @param  __HANDLE__ specifies the I2S Handle.
0458   * @retval None
0459   */
0460 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) SET_BIT((__HANDLE__)->Instance->IFCR , SPI_IFCR_UDRC)
0461 
0462 /** @brief  Clear the I2S FRE pending flag.
0463   * @param  __HANDLE__: specifies the I2S Handle.
0464   * @retval None
0465   */
0466 #define __HAL_I2S_CLEAR_TIFREFLAG(__HANDLE__) SET_BIT((__HANDLE__)->Instance->IFCR , SPI_IFCR_TIFREC)
0467 /**
0468   * @}
0469   */
0470 
0471 
0472 /* Exported functions --------------------------------------------------------*/
0473 /** @addtogroup I2S_Exported_Functions
0474   * @{
0475   */
0476 
0477 /** @addtogroup I2S_Exported_Functions_Group1
0478   * @{
0479   */
0480 /* Initialization/de-initialization functions  ********************************/
0481 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
0482 HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s);
0483 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
0484 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
0485 
0486 /* Callbacks Register/UnRegister functions  ***********************************/
0487 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL)
0488 HAL_StatusTypeDef HAL_I2S_RegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID,
0489                                            pI2S_CallbackTypeDef pCallback);
0490 HAL_StatusTypeDef HAL_I2S_UnRegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID);
0491 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
0492 /**
0493   * @}
0494   */
0495 
0496 /** @addtogroup I2S_Exported_Functions_Group2
0497   * @{
0498   */
0499 /* I/O operation functions  ***************************************************/
0500 /* Blocking mode: Polling */
0501 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, const uint16_t *pData, uint16_t Size, uint32_t Timeout);
0502 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
0503 HAL_StatusTypeDef HAL_I2SEx_TransmitReceive(I2S_HandleTypeDef *hi2s, const uint16_t *pTxData, uint16_t *pRxData,
0504                                             uint16_t Size, uint32_t Timeout);
0505 
0506 /* Non-Blocking mode: Interrupt */
0507 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, const uint16_t *pData, uint16_t Size);
0508 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
0509 HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_IT(I2S_HandleTypeDef *hi2s, const uint16_t *pTxData, uint16_t *pRxData,
0510                                                uint16_t Size);
0511 
0512 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
0513 
0514 /* Non-Blocking mode: DMA */
0515 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, const uint16_t *pData, uint16_t Size);
0516 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
0517 HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_DMA(I2S_HandleTypeDef *hi2s, const uint16_t *pTxData, uint16_t *pRxData,
0518                                                 uint16_t Size);
0519 
0520 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
0521 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
0522 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
0523 
0524 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
0525 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
0526 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
0527 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
0528 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
0529 void HAL_I2SEx_TxRxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
0530 void HAL_I2SEx_TxRxCpltCallback(I2S_HandleTypeDef *hi2s);
0531 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
0532 /**
0533   * @}
0534   */
0535 
0536 /** @addtogroup I2S_Exported_Functions_Group3
0537   * @{
0538   */
0539 /* Peripheral Control and State functions  ************************************/
0540 HAL_I2S_StateTypeDef HAL_I2S_GetState(const I2S_HandleTypeDef *hi2s);
0541 uint32_t HAL_I2S_GetError(const I2S_HandleTypeDef *hi2s);
0542 /**
0543   * @}
0544   */
0545 
0546 /**
0547   * @}
0548   */
0549 
0550 /* Private types -------------------------------------------------------------*/
0551 /* Private variables ---------------------------------------------------------*/
0552 /* Private constants ---------------------------------------------------------*/
0553 /** @defgroup I2S_Private_Constants I2S Private Constants
0554   * @ingroup RTEMSBSPsARMSTM32H7
0555   * @{
0556   */
0557 
0558 /**
0559   * @}
0560   */
0561 
0562 /* Private Functions ---------------------------------------------------------*/
0563 /** @defgroup I2S_Private_Functions I2S Private Functions
0564   * @ingroup RTEMSBSPsARMSTM32H7
0565   * @{
0566   */
0567 /* Private functions are defined in stm32h7xx_hal_i2S.c file */
0568 /**
0569   * @}
0570   */
0571 
0572 /* Private macros ------------------------------------------------------------*/
0573 /** @defgroup I2S_Private_Macros I2S Private Macros
0574   * @ingroup RTEMSBSPsARMSTM32H7
0575   * @{
0576   */
0577 
0578 /** @brief  Check whether the specified SPI flag is set or not.
0579   * @param  __SR__  copy of I2S SR register.
0580   * @param  __FLAG__ specifies the flag to check.
0581   *         This parameter can be one of the following values:
0582   *            @arg I2S_FLAG_RXP : Rx-Packet available flag
0583   *            @arg I2S_FLAG_TXP : Tx-Packet space available flag
0584   *            @arg I2S_FLAG_UDR : Underrun flag
0585   *            @arg I2S_FLAG_OVR : Overrun flag
0586   *            @arg I2S_FLAG_FRE : TI mode frame format error flag
0587   * @retval SET or RESET.
0588   */
0589 #define I2S_CHECK_FLAG(__SR__, __FLAG__)         ((((__SR__)\
0590                                                     & ((__FLAG__) & I2S_FLAG_MASK)) == ((__FLAG__) & I2S_FLAG_MASK))\
0591                                                   ? SET : RESET)
0592 
0593 /** @brief  Check whether the specified SPI Interrupt is set or not.
0594   * @param  __IER__  copy of I2S IER register.
0595   * @param  __INTERRUPT__ specifies the SPI interrupt source to check.
0596   *         This parameter can be one of the following values:
0597   *            @arg I2S_IT_RXP : Rx-Packet available interrupt
0598   *            @arg I2S_IT_TXP : Tx-Packet space available interrupt
0599   *            @arg I2S_IT_UDR : Underrun interrupt
0600   *            @arg I2S_IT_OVR : Overrun interrupt
0601   *            @arg I2S_IT_FRE : TI mode frame format error interrupt
0602   *            @arg I2S_IT_ERR : Error interrupt enable
0603   * @retval SET or RESET.
0604   */
0605 #define I2S_CHECK_IT_SOURCE(__IER__, __INTERRUPT__)      ((((__IER__)\
0606                                                             & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
0607 
0608 /** @brief  Checks if I2S Mode parameter is in allowed range.
0609   * @param  __MODE__ specifies the I2S Mode.
0610   *         This parameter can be a value of @ref I2S_Mode
0611   * @retval None
0612   */
0613 #define IS_I2S_MODE(__MODE__)                       (((__MODE__) == I2S_MODE_SLAVE_TX)                   || \
0614                                                      ((__MODE__) == I2S_MODE_SLAVE_RX)                   || \
0615                                                      ((__MODE__) == I2S_MODE_MASTER_TX)                  || \
0616                                                      ((__MODE__) == I2S_MODE_MASTER_RX)                  || \
0617                                                      ((__MODE__) == I2S_MODE_SLAVE_FULLDUPLEX)           || \
0618                                                      ((__MODE__) == I2S_MODE_MASTER_FULLDUPLEX))
0619 
0620 #define IS_I2S_MASTER(__MODE__)                     (((__MODE__) == I2S_MODE_MASTER_TX)                  || \
0621                                                      ((__MODE__) == I2S_MODE_MASTER_RX)                  || \
0622                                                      ((__MODE__) == I2S_MODE_MASTER_FULLDUPLEX))
0623 
0624 #define IS_I2S_SLAVE(__MODE__)                      (((__MODE__) == I2S_MODE_SLAVE_TX)                  || \
0625                                                      ((__MODE__) == I2S_MODE_SLAVE_RX)                  || \
0626                                                      ((__MODE__) == I2S_MODE_SLAVE_FULLDUPLEX))
0627 
0628 #define IS_I2S_FULLDUPLEX(__MODE__)                 (((__MODE__) == I2S_MODE_MASTER_FULLDUPLEX)         || \
0629                                                      ((__MODE__) == I2S_MODE_SLAVE_FULLDUPLEX))
0630 
0631 #define IS_I2S_STANDARD(__STANDARD__)               (((__STANDARD__) == I2S_STANDARD_PHILIPS)            || \
0632                                                      ((__STANDARD__) == I2S_STANDARD_MSB)                || \
0633                                                      ((__STANDARD__) == I2S_STANDARD_LSB)                || \
0634                                                      ((__STANDARD__) == I2S_STANDARD_PCM_SHORT)          || \
0635                                                      ((__STANDARD__) == I2S_STANDARD_PCM_LONG))
0636 
0637 #define IS_I2S_DATA_FORMAT(__FORMAT__)              (((__FORMAT__) == I2S_DATAFORMAT_16B)                || \
0638                                                      ((__FORMAT__) == I2S_DATAFORMAT_16B_EXTENDED)       || \
0639                                                      ((__FORMAT__) == I2S_DATAFORMAT_24B)                || \
0640                                                      ((__FORMAT__) == I2S_DATAFORMAT_32B))
0641 
0642 #define IS_I2S_MCLK_OUTPUT(__OUTPUT__)              (((__OUTPUT__) == I2S_MCLKOUTPUT_ENABLE)             || \
0643                                                      ((__OUTPUT__) == I2S_MCLKOUTPUT_DISABLE))
0644 
0645 #define IS_I2S_AUDIO_FREQ(__FREQ__)                ((((__FREQ__) >= I2S_AUDIOFREQ_8K)                    && \
0646                                                      ((__FREQ__) <= I2S_AUDIOFREQ_192K))                 || \
0647                                                     ((__FREQ__) == I2S_AUDIOFREQ_DEFAULT))
0648 
0649 #define IS_I2S_CPOL(__CPOL__)                       (((__CPOL__) == I2S_CPOL_LOW)                        || \
0650                                                      ((__CPOL__) == I2S_CPOL_HIGH))
0651 
0652 #define IS_I2S_FIRST_BIT(__BIT__)                   (((__BIT__) == I2S_FIRSTBIT_MSB)                     || \
0653                                                      ((__BIT__) == I2S_FIRSTBIT_LSB))
0654 
0655 #define IS_I2S_WS_INVERSION(__WSINV__)              (((__WSINV__) == I2S_WS_INVERSION_DISABLE)           || \
0656                                                      ((__WSINV__) == I2S_WS_INVERSION_ENABLE))
0657 
0658 #define IS_I2S_DATA_24BIT_ALIGNMENT(__ALIGNMENT__)  (((__ALIGNMENT__) == I2S_DATA_24BIT_ALIGNMENT_RIGHT) || \
0659                                                      ((__ALIGNMENT__) == I2S_DATA_24BIT_ALIGNMENT_LEFT))
0660 
0661 #define IS_I2S_MASTER_KEEP_IO_STATE(__AFCNTR__)     (((__AFCNTR__) == I2S_MASTER_KEEP_IO_STATE_DISABLE)  || \
0662                                                      ((__AFCNTR__) == I2S_MASTER_KEEP_IO_STATE_ENABLE))
0663 
0664 
0665 /**
0666   * @}
0667   */
0668 
0669 /**
0670   * @}
0671   */
0672 
0673 /**
0674   * @}
0675   */
0676 
0677 #ifdef __cplusplus
0678 }
0679 #endif
0680 
0681 #endif /* STM32H7xx_HAL_I2S_H */
0682
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